Difference between revisions of "ETRA SOM/ETRA Hardware/Peripherals/USB Host"
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__FORCETOC__ | __FORCETOC__ | ||
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==Peripheral USB Host == | ==Peripheral USB Host == | ||
| − | + | USB host controller supporting the standard registers used for full-speed (OHCI controller) and high-speed (EHCI controller). | |
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=== Description === | === Description === | ||
| − | The USB Host interface available on ETRA is based on | + | The USB Host interface available on ETRA SOM is based on STM32MP1 SoC. |
The USB Host port supports the following standards and features: | The USB Host port supports the following standards and features: | ||
| − | * | + | * two physical ports supported using an on-chip 2-port high-speed PHY |
| − | * | + | * the second port is shared with [[ETRA SOM/ETRA Hardware/Peripherals/USB OTG|USB OTG]] peripheral |
| − | * | + | * supports OHCI model for full- and low-speed operation |
| − | * | + | * supports EHCI model for high-speed operation |
| + | * LPM (link power management) support | ||
| + | * DMA engine with local 512 Byte packet buffer | ||
===Pin mapping=== | ===Pin mapping=== | ||
Latest revision as of 11:44, 8 January 2024
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| History | |||
|---|---|---|---|
| Issue Date | Notes | ||
| 2020/12/31 | First Release | ||
Peripheral USB Host[edit | edit source]
USB host controller supporting the standard registers used for full-speed (OHCI controller) and high-speed (EHCI controller).
Description[edit | edit source]
The USB Host interface available on ETRA SOM is based on STM32MP1 SoC.
The USB Host port supports the following standards and features:
- two physical ports supported using an on-chip 2-port high-speed PHY
- the second port is shared with USB OTG peripheral
- supports OHCI model for full- and low-speed operation
- supports EHCI model for high-speed operation
- LPM (link power management) support
- DMA engine with local 512 Byte packet buffer
Pin mapping[edit | edit source]
The Pin mapping is described in the Pinout table section
