Bureaucrats, dave_user, Administrators
8,226
edits
Changes
no edit summary
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes
|-
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|X1.Y0.Z0|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|Month YearJul 2021|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|TBD|-|-|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|[TBD_link X.Y.Z]|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|Month Year|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|TBDDESK release
|-
|}
==Booting from NAND flash==
With respect to the NOR flash memories, NAND devices are known to be quite challenging with regard to the reliability. This is especially true when the NAND flash is used as the boot device. Several techniques such as wear leveling and bad block management have to be implemented to achieve an acceptable reliability.
This document provides information about the NAND device management, in order to handle it properly when it is used as the boot device on NXP i.MX6-based products.
Even though the example shown here refers to an i.MX6 DualLite UltraLite board, the approach is substantially the same across all the i.MX6 family.
The test bed used in this example consists of an i.MX6 DualLite UltraLite board equipped with a 512MB 128MB 8-bit asynchronous 1-bit ECC SLC NAND memory which is connected to the EIM bus of the SoC. The boot firmware image is the U-Boot binary files (<code>mx6qdlaxel_SPLdesk-mx6ul-l-1.0.2_mx6uldesk_axelulite_nand_SPL</code> and <code>mx6qdlaxel_udesk-mx6ul-l-1.0.2_mx6uldesk_axelulite_nand_u-boot.img</code>). Its size is about 550 535 kB. From the point of view of MTD partitions, the boot partition for SPL is <code>mtd0</code> is 2MB while the second stage partition <code>mtd1</code> is 6MB.
===Boot partition organization===
<pre class="board-terminal">
root@imx6qdlxelkdesk-mx6ul-axelulite:~# kobs-ng -x -v -w desk-mxmx6ul-l-1.0.0_mx6qdlaxel_nand_SPL2_mx6uldesk_axelulite_nand_SPL
MTD CONFIG:
chip_0_device_path = "/dev/mtd0"
m_u32DISBBM = 0
m_u32BBMarkerPhysicalOffsetInSpareData = 0
m_u32OnfiSyncEnable = 0
m_NANDONFITiming.m_u32ONFISpeed = 0
m_NANDONFITiming.m_u32ONFITiming_ReadLatency = 0
m_NANDONFITiming.m_u32ONFITiming_CEDelay = 0
m_NANDONFITiming.m_u32ONFITiming_PreambleDelay = 0
m_NANDONFITiming.m_u32ONFITiming_PostambleDelay = 0
m_NANDONFITiming.m_u32ONFITiming_CmdAddPause = 0
m_NANDONFITiming.m_u32ONFITiming_DataPause = 0
m_NANDONFITiming.m_u32ONFITiming_BusyTimeout = 0
m_u32DISBBSearch = 0
m_u32RandomizerEnable = 0
m_u32ReadRetryEnable = 0
m_u32ReadRetrySeqLength = 0
DBBT
m_u32Checksum = 0x00000000
mtd: erasing @0:0x180000-0x1a0000
mtd: We write one page for save guard. *
root@imx6qdlxelkdesk-mx6ul-axelulite:~#
</pre>
<pre class="board-terminal">
root@imx6qdlxelkdesk-mx6ul-axelulite:~# flash_erase /dev/mtd1 0 0
Erasing 128 Kibyte @ 5e0000 -- 100 % complete
root@imx6qdlxelkdesk-mx6ul-axelulite:~# nandwrite -p /dev/mtd1 desk-mxmx6ul-l-1.0.0_mx6qdlaxel_u2_mx6uldesk_axelulite_nand_u-boot.img
Writing data to block 0 at offset 0x0
Writing data to block 1 at offset 0x20000
Writing data to block 3 at offset 0x60000
Writing data to block 4 at offset 0x80000
root@imx6qdlxelkdesk-mx6ul-axelulite:~#
</pre>
In this case, the SPL boot partition–<code>/dev/mtd0</code>, indicated as a parameter of the command line–is 2MB. The u-boot.img partition–<code>/dev/mtd1</code> is used for the second stage binary image.