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== Example: setting SYSCLK10 as reference clock for UART5 ==
→Default configuration
= Default configuration =
With the default configuration, UARTs 3/4/5 are driven by the SYSCLK8 clock, which runs at 192 MHz; UARTs 0/1/2 are driven by SYSCLK10, which runs at 48 MHz. In this situation, setting the port speed (using the '''stty''' command, for example) gives the following resultsat X baud means that UARTs 0/1/2 actually works at X baud, while UARTs 3/4/5 get a 4x multiplying factor on speed value, working at 4*X baud:
* stty -F /dev/ttyOx speed Y --> port 0/1/2 is configured to run @ X baud
Register McBSP_UART_CLKSRC (see the DM814x Technical Reference Manual, http://www.ti.com/litv/pdf/sprugz8c - section 2.10, page 672) of the Power, Reset, and Clock Management (PRCM) Module allows for selection of the reference clock. This register can be set on Linux adding an initialization function (<code>init_uartX_clk(void)</code> to the <code>arch/arm/mach-omap2/board-naon.c</code> file that writes the proper value into the register.
== Example: setting SYSCLK10 as reference clock for UART5 on Linux == The following snippet shows how the code to configure add to <code>arch/arm/mach-omap2/board-naon.c</code> for configuring SYSCLK10 (48 MHz) as reference clock for UART5:
<pre>