Changes

Jump to: navigation, search

Configuring UART3-4-5 (Naon)

74 bytes added, 16:08, 30 January 2013
m
Change UARTs 3/4/5 reference clock
Register McBSP_UART_CLKSRC (see the DM814x Technical Reference Manual, http://www.ti.com/litv/pdf/sprugz8c - section 2.10, page 672) of the Power, Reset, and Clock Management (PRCM) Module allows for selection of the reference clock. This register can be set on Linux adding an initialization function (<code>init_uartX_clk(void)</code> to the <code>arch/arm/mach-omap2/board-naon.c</code> file that writes the proper value into the register.
== Example: setting SYSCLK10 as reference clock for UART5 ==
== Example: setting SYSCLK10 as reference clock for UART5 on Linux == The following snippet shows how the code to configure add to <code>arch/arm/mach-omap2/board-naon.c</code> for configuring SYSCLK10 (48 MHz) as reference clock for UART5:
<pre>

Navigation menu