Carrier board design guidelines (SOM)

Info Box Applies to Naon Applies to Maya Applies to Lizard Applies to Diva

The information here provided are preliminary and subject to change.

Contents

IntroductionEdit

This page provides useful information and resources to system designers in order to design carrier boards hosting DAVE system-on-modules (SOM).

These guidelines are provided with the goal to help designers to design compliant systems with DAVE modules and they cover schematics and PCB aspects. They apply to several products that are listed on the top right corner of this page (see "Applies to" boxes).

Basics GuidelinesEdit

In this section basics hardware guidelines valid for all DAVE SOMs are analyzed.

SchematicsEdit

• Check mirroring and pinout for every connector on the board
• Check for TX and RX lines
• Add series resitors as interface needs (see interface details)
• TBD

PCBEdit

PCB TecnologyEdit

Use a PCB technology as advised in the following table

Parameter	Min	Typ	Max
Layers(number)	4	6	-
Power Layers	2	2	-
Clearence(mils)	4	6	-
Vias hole (mechanical)	0,3		-
Minimum number of via for each power signal layer changes	2	3	-
Minimum number of via for each power signal SOM connector pin	1	2	-
Component package size	0402	0603	-
PCB Height(mm)	1,4	1,6	-

• If vias smaller than minimum advised size are used, take care to maintain an adeguate number of via when you change layer on each power signal.
  
• PCB heights less than minimum advised can produce PCB heating and mechanical issues.

PCB Basics GuidelinsEdit

• Avoid stubs
• Isolate clock and HI-SPEED signal (differential lines i.e.) for at least two times trace width or gap for differential lines
• Avoid voids on planes

Interfaces GuidelinesEdit

This section provides guidelines for the most used interfaces on DAVE's SOMs module. Please refer to SOM's detailed pages for specific additional information.

Ethernet 10/100Edit

Case #1: PHY in integrated on SOMEdit

This section refers to the case of PHY integrated on SOM such as Lizard and Maya.

SchematicsEdit

• If LAN connector with integrated magnetic is used:
  • predispose some protection diodes on ethernet lines
  • Connect connector shield to an adeguate GND or shield Plane

PCBEdit

Parameter	Min	Typ	Max
Differential Impedance(ohm)	76	95	114
Common Mode Impedance	46,75	55	63,25
Gap between TX and RX lines	2xseparation	4xseparation	-
Gap between other signal	2xseparation	2xseparation	-
Intra pair matching(mils)	-	240	-
TX and RX via mismatch	0	0	1

• If LAN connector with integrated magnetic is used:
  • do not route traces under the connettor, neither on opposite side
  • place filter diode near connector
  • place others signals far from connector.
  • Connect connector shield to an adeguate GND or shield Plane or Copper through numerous vias if necessary
• If on board magnetic are used
  • adeguately isolate system GND from magnetic connector side
• try to match as best as possible each differential pair
• no TX and RX matching required