{{ObsoleteWikiPage|link==Introduction==DESK-XZ7-L}}

Bora Embedded Linux Kit ({{ImportantMessage|text='''For BELK for short) provides all 3.0.2 or older, the necessary components required to set up boot process was based on the developing environment for:* configuring the system FSBL+second-stage bootloader (PS and PLU-Boot) at hardware level* build combination. From BELK 4.0.0 on, the boot process is based on the first-stage bootloader (FSBLU-Boot SPL)* building the +second -stage bootloader (U-Boot)combination.'''* building and running Linux operating system on Bora-based systems* building Linux applications that will run on the target}}

'''DAVE Embedded Systems''' provides all the customization required (in particular at bootloader and Linux kernel levels) to enable customers use the standard Zynq-7000 development tools for building all the firmware<section begin="Unboxing" /software components that will run on the target system.>==Unboxing==

==Logical structure of Bora Embedded Linux Kit (BELKfor short)==To understand provides all the structure of BELK, it is necessary components required to describe set up the basic organization of Xilinx Vivado Design Suite/Xilinx SDK and to recall briefly the recent history of development tools provided by Xilinx.developing environment for: ===A little bit of history===At * building the time of this writing (October 2013) Xilinx is migrating from mature ISE 14.x Design Suite first- that should be the last series of this suite - to the new Vivado environmentstage bootloader:** FSBL for BELK 3. Both are composed by several programs and some of these are in common0. From the general standpoint, the main difference between ISE and Vivado 2 or older** U- even if ISE does support Zynq - is the the latter has been expressively conceived to support newer SOC architectures such as Zynq, besides traditional FPGAs. Thus, adopting Vivado as the default environment boot SPL for BELK would seem the natural choice. However, the migration process mentioned above has just begun and the majority of application notes and reference designs released by Xilinx still refers to ISE suite4. Plus Vivado is still a little bit "green" and several bug fixes and improvements are introduced by every new release0.0 or newer Since Bora was presented in 2013 and because this product addresses long longevity markets such as industrial and biomedical, '''DAVE Embedded Systems''' chose to build BELK upon Vivado that undoubtedly represents today * building the future of Xilinx development environments. ===Structure of BELK reference designs=== The typical linuxsecond-based Zynq design is composed by the following parts:* FSBL* stage bootloader (U-Boot)* device tree file* building and running Linux kernel* Root file operating system* Executable image of core #1 (in case of AMP on Bora-based systems)* FPGA bitstream. Generally speaking, this parts - in the binary/sinthesized form - are combined together in one monolithic file building Linux applications that is stored in a non-volatile memory such as SPI NOR flash. Generating this file is quite easy as described by Vivado documentation. However in real world products, this may be too rigid because developers may want to handle these parts separately and independently.  ===Basic structure of Vivado Design Suite and integration into BELK===Vivado/SDK (1) can be viewed as a collection of programs required to deal with all of the development aspects related to Xilinx components (software running will run on ARM cores, FPGA fabric verification and programming, power estimation etc.). These include strictly FPGA-related tools such as Floorplanner and pure-software development tools such as SDK.The ambitious objective is to provide a complete, user friendly, integrated environment that allows software developers to deal with FPGA development even if they are not familiar with this technology, by hiding a lot of its complexities (2). As usual this ease of use comes at the expence of control and flexibility. This could not be acceptable in many cases where engineers need to control and customize many aspects of the project to implement what is required by system specifications. For this reason BELK has been built around Vivado but some deviations from the default development approach suggested by Xilinx have been introduced, in order to push the modularization and the maintainability of the projects to the maximum extent. The following pictures are retrieved from BELK Quick Start Guide and shows respectively the Vivado/SDK default development flow and how this has been integrated in the BELK infrastructuretarget. [[File:Belk-vivado-sdk-development-flow.png|thumbnail|center|300px|Vivado/SDK development flow]][[File:Belk-vivado-sdk-integration.png|thumbnail|center|300px|Vivado/SDK integration into BELK]] 

'''DAVE Embedded Systems''' provides all the customization required (1in particular at bootloader and Linux kernel levels) The Software Development Kit (SDK) is to enable customers to use the Xilinx Integrated Design Environment for creating embedded applications on Zynq™standard Zynq-7000 All Programmable SoCs. SDK is development tools for building all the first application IDE to deliver true homogenous and heterogenous multi-processor design and debug, it is optionally included with firmware/software components that will run on the Vivado Design Suite or ISE Design Suite, or available as a separate free download for application developerstarget system.<section end="Unboxing" />

==Kit Contents== {| class="wikitable" style="margin: auto;"

|style="text-align: center;" | [[File:Bora5-small.jpg|60px]]|[[Bora_SOM :Category:Bora| Bora ]] SOM Default option is DBRF4110S2R (see [[#Order codes|Order codes]]<br>CPUfor more options)*SoC: Xilinx Zynx 7000XC7Z020 (866Mhz, Speed "-3", Tj 0-100°C)*SDRAM: 1 GB DDR3*NOR: bootable SPI flash 16 MB*NAND: 1GB (SLC)|Please * For more details, please refer to the[[Hardware Manual (Bora) | Bora Hardware Manual]]* By default, ARM cores frequency is set to 667 MHz and the [[Creating and building example Vivado project (BELK/BXELK)|example Vivado project]] is implemented for a "-1" device. This choice makes the software released with the kit compatible with possible variants based on different SoM models. In this regard, see also the [[#Order codes|order codes section]].

|style="text-align: center;" | [[File:Boraevb-02.png|80px]]|BoraEVB BORA Carrier board|Please refer to Se also the[[BoraEVB | BoraEVB]] page

|style="text-align: center;" | [[File:Alimentatore.jpg|40px]]

|style="text-align: center;" | [[File:ProdSDCFTDI-MBLYCHIPI-thumbX10.png|50px]]60px|MicroSDHC card with SD adapter and USB adapter|Please refer to Belk Quick Start Guide|-|}  == BELK software components == '''DAVE Embedded Systems''' adds to the latest Linux BSP from Xilinx the customization required to support the Bora platform, in particular at bootloader and linux kernel levels. The following table reports the XELK releases information.{| class="wikitable" !!colspan="3" | BELK version|-|Release number|1.0.0|1.1.0|2.0.0|-|Status|Released|Released|Released|-|Release date|July 2013|November 2013|May 2014|-|'''Release notes'''|[[Bora_Embedded_Linux_Kit_(BELK)#BELK 1.0.0 | Ver 1.0.0]]|[[Bora_Embedded_Linux_Kit_(BELK)#BELK 1.1.0 | Ver 1.1.0]]|[[Bora_Embedded_Linux_Kit_(BELK)#BELK 2.0.0 | Ver 2.0.0]]|-|SOM PCB version|CS020313A|CS020313A|CS020313B|--|Supported carrier boards|[[BoraEVB-Litecenter]]|[[BoraEVB-Lite]]|[[BoraEVB]]|-|U-Boot version|2013.04-belk-1.0.0|2013.04-belk-1.1.0|2013.04-belk-2.0.0|-|Linux version|3.9.0-bora-1.0.0|3.9.0-bora-1.1.0|3.9.0-bora-2.0.0|- |Drivers|valign="top" | -|valign="top" | -|valign="top" | Gigabit Eth #0<br>UART<br>NOR<br>NAND<br>SD/MMC<br>FTDI USB Host/DeviceRS232 cable adapter<br>RTC<br>CAN<br>I2C|-|Vivado version|valign="top" | 2013.2|valign="top" | 2013.3|valign="top" | 2013.3|-|} === How to update BELK === {{ImportantMessage|text=It's recommended to use the latest available BELK version. Please refer to FTDI code: [[Bora_Embedded_Linux_Kit_(BELK)#Release_notes | Release notes]] for further information.}} ==== Updating git repositories ==== In BELK, the following source trees are clones of '''DAVE Embedded Systems''' public git repositorieshttps: {| class="wikitable" |-!| Component!GIT Remote|-|Vivado project|git@git//ftdichip.dave.eu:davecom/boraproducts/bora.gitchipi-x10/ CHIPI-X10]

|Linux|git@git.dave.eu[[File:dave/bora/linuxEVK-kit-DB9-serial-xlnxcable.png.gitpng|60px|center]]| D9 Female to D9 Female null modem cable|

|U-Boot[[File:Sandisk_Industrial_32GB.png|60px|center]]| MicroSDHC card|git@git.dave.eu:dave/bora/u-boot-xlnx.git

This means that these components can be kept in sync and up to date with '''DAVE Embedded Systems''' repositories. ==== RSA key generation Order codes==== Please follow the procedure reported below to generate the RSA ssh key: * select your username (ad es. username@myhost.com)* start your Linux development server machine* start a shell session* make sure the '''ssh''' client components are installed* enter the .ssh subdirectory into your home directory: <code>cd ~/.ssh/</code>* launch the following command: <br><pre>ssh-keygen -t rsa -C "username@myhost.com"</pre>* this command creates the files <code>~/.ssh/username@myhost.com</code> ('''private key''') and <code>~/.ssh/username@myhost.com.pub</code> ('''public key''')* edit your <code>~/.ssh/config</code> adding the following lines: <pre>Host git.dave.eu User git Hostname git.dave.eu PreferredAuthentications publickey IdentityFile ~/.ssh/username@myhost.com.pub</pre> Please send the public key file to the following email support addresses: * [mailto:support-bora@dave.eu support-bora@dave.eu] with the request for the creation of a new public git account associated to your username. The support team will enable the account and send you a confirmation as soon as possible.  ==== Synchronizing the repositories ==== When the account is enabled, you can synchronize a source tree entering the repository directory and launching the <code>git fetch</code> command. Please note that <code>git fetch</code> doesn't merge the commits on the current branch. To do that, you should run the <code>git merge</code> command or replace the ''fetch-merge'' process with a single <code>git pull</code> command. Please note that the recommended method is the ''fetch-merge'' process. For further information on Git, please refer to [http://git-scm.com/documentation Git Documentation]. === Release notes === ==== BELK 2.0.0 ==== Updates:# Added support for the BoraEVB carrier board# Updated supported drivers list (please refer to [[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components | BELK_software_components]]) ==== Known Limitations ==== The following table reports the known limitations of this BELK release: {| class="wikitable" style="margin: auto;" |-+!IssueOrder code

|External DDR3 bank |The DDR3 SDRAM bank on the BoraEVB is not supported in this BELK version.|-|ETH1 interface|The additional Gigabit Ethernet interface (ETH1) is not supported in this BELK version.|L-S-S|RTC|Date/time retention is limited This code refers to about 4 hours.the default configuration detailed above

<section end==== BELK 1.1.0 ===="Kit Content" />

Updates:==Logical structure of Bora Embedded Linux Kit (BELK)==# Switched Please refer to Vivado 2013[[Logical_structure_of_Bora_and_BoraX_Embedded_Linux_Kits_(BELK/BXELK)|this page]].3# Added application note "AMP on Bora"

==BELK software components == Please refer to [[BELK 1/BXELK_software_components|this page]].0.0 ====

* [[BoraEVB | BoraEVBBORAEVB]]* Belk [[BELK/BXELK Quick Start Guide (available for BELK kit owners)* Application Note: [http://www.dave.eu/sites/default/files/files/an-belk-001-amp-linux-freertos.pdf AN-BELK-001: Asymmetric Multiprocessing (AMP) on Bora – Linux + FreeRTOS]]* [[FAQs_(Bora) | Bora BORA FAQs]]