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!Notes
|-
|1, 112, 125,<br>6, 16|| DGND || Ground || -|-|3 || CLK125_NDO|| - || -|-|4 || ETH1_CLK125_NDO || - || -
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|2 7 || NAND_BUSYETH_MDC || - || -
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|3 8 || ZYNQ_NAND_CLE ETH1_MDC || - || -
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|4 9 || NAND_IO3 ETH_MDIO || - || -
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|5 10 || NAND_IO4 ETH1_MDIO || - || -
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|6 11 || NAND_IO5 ETH_INTn || - || -
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|7 12 || NAND_IO6 ETH1_INTn || - || -
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|8 13 || NAND_IO7 PS_MIO51_501 || - || -
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|9 14 || CONN_SPI_RSTn ETH1_RESETn || - || -
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|10 15 || MEM_WPn PS_MIO50_501 || - || -
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|}
==== SPI,NAND - JP19 ====
JP19 is a 16-pin 8x2x2.54 pitch vertical header. The following table reports the pinout of the connector:
{| class="wikitable"
|-
!Notes
|-
|1, 211, 5,<br>6, 1612|| DGND || Ground || -
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|3 2 || CLK125_NDONAND_BUSY|| - || -
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|4 3 || ETH1_CLK125_NDO ZYNQ_NAND_CLE || - || -
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|7 4 || ETH_MDC NAND_IO3 || - || -
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|8 5 || ETH1_MDC NAND_IO4 || - || -
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|9 6 || ETH_MDIO NAND_IO5 || - || -
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|10 7 || ETH1_MDIO NAND_IO6 || - || -
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|11 8 ||ETH_INTn NAND_IO7 || - || -
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|12 9 || ETH1_INTn CONN_SPI_RSTn || - || -
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|13 10 || PS_MIO51_501 || - || -|-|14 || ETH1_RESETn || - || -|-|15 || PS_MIO50_501 MEM_WPn || - || -
|-
|}
