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BoraEVB

433 bytes added, 10:58, 28 January 2015
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Known limitations
Board version CS040713A has the following limitations:
* {| class="wikitable" |-!Issue!Description|-| ETH0 interface| Mistake in the connection of the center tap pins. They should be separated from one another and connected through separate 0.1μF common-mode capacitors to ground (for further details (eg: connection and selection of the magnetics), please refer to the Micrel KSZ9031RNX datasheet).|-|External DDR3 bank |The DDR3 SDRAM bank is not supported in BELK 2.0.0* |-|ETH1 interface|The additional Gigabit Ethernet interface (ETH1) is not supported in BELK 2.0.0|-|}
== Connectors pinout ==

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