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BoraEVB

242 bytes added, 14:36, 24 March 2014
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* 10/100/1000 Ethernet #0 (PS)
* 10/100/1000 Ethernet #1 (Routed through EMIO)
* 1x USB 2.0 OTG(MicroAB connector)* 1x Serial port (RS232DB9)
* 1x MicroSD
* External DDR3 SDRAM bank
* XADC
** Some signals of Bank 35 can be configured as XADC signals. For this reason they can be routed alternatively to 2.54mm-pitch connectors, instead of DDR3 memory.
* JTAG port
* Trace port
* Socket for [[Wireless_Module_(DWM) | DWM Wireless Module]]
* PMOD expansion connectors
* Headers for external for NAND flash and SPI NOR flash
* 2.54mm-pitch pin-strip connectors for Bora PS and PL configurable peripherals (MIO and EMIO interfaces, GPIOs, custom IPs, ..)
* Jumpers for voltage selection of the PL banks
* +12V power connector
* JTAG
* 2.54mm-pitch pin-strip connectors for Bora PS and PL configurable peripherals (MIO and EMIO interfaces, GPIOs, custom IPs, ..)
== Known limitations ==

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