3,260
edits
Changes
m
==== PMOD - JP17 ====
JP17 is a 12-pin 6x2x2.54 pitch vertical header. The following table reports the pinout of the connector:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 ||PMOD_A0 || || -
|-
|2 ||PMOD_A4 || || -
|-
|3 ||PMOD_A1 || || -
|-
|4 ||PMOD_A5 || || -
|-
|5 ||PMOD_A2 || || -
|-
|6 ||PMOD_A6 || || -
|-
|7 ||PMOD_A3 || || -
|-
|8 ||PMOD_A7 || || -
|-
|9, 10 ||DGND ||Ground || -
|-
|11, 12 ||3.3V || || -
|-
|}
Please note that:
* Signals used to implement LVDS LCD interface can alternatively routed to PMOD compatible connector
* PMOD interface - defined by Digilent Inc. - allows to quickly connect several pre-built I/O modules to PL:
** http://www.digilentinc.com/Products/Catalog.cfm?NavPath=2,401&Cat=9&CFID=3145471&CFTOKEN=69407812
** http://www.maximintegrated.com/products/evkits/fpga-modules/
no edit summary
== Features ==
* 10/100/1000 Ethernet#0 (PS)* 10/100/1000 Ethernet #1 (Routed through EMIO)
* 1x USB OTG
* Serial port (RS232)
|-
|}
|-
|}
=== PMODs ===
Please note that:
* Signals used to implement LVDS LCD interface can alternatively routed to PMOD compatible connector
* PMOD interface - defined by Digilent Inc. - allows to quickly connect several pre-built I/O modules to PL:
** http://www.digilentinc.com/Products/Catalog.cfm?NavPath=2,401&Cat=9&CFID=3145471&CFTOKEN=69407812
** http://www.maximintegrated.com/products/evkits/fpga-modules/
==== PMOD - JP17 ====
JP17 is a 12-pin 6x2x2.54 pitch vertical header. The following table reports the pinout of the connector:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 ||PMOD_A0 || || -
|-
|2 ||PMOD_A4 || || -
|-
|3 ||PMOD_A1 || || -
|-
|4 ||PMOD_A5 || || -
|-
|5 ||PMOD_A2 || || -
|-
|6 ||PMOD_A6 || || -
|-
|7 ||PMOD_A3 || || -
|-
|8 ||PMOD_A7 || || -
|-
|9, 10 ||DGND ||Ground || -
|-
|11, 12 ||3.3V || || -
|-
|}
==== PMOD - JP23 ====
