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<section end=micro SD/>
<section begin=TRACE/>
J22 is a QSH–060–01–L–D–A 0,50 mm Hi-speed socket. It is connected to the Debug Trace Port. From the physical standpoint, trace port exploits the '''advanced routing of bank 13 signals implemented on Bora''', combined with the '''possibility to select the I/O voltage of bank itself'''. Connector is compatible with ETMv1/ETMv3 specification. Please refer to http://www.lauterbach.com/frames.html?adetmmipi60.html for more details.
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<section end=LVDS/>
<section begin=PinStrip/>
=== Pin strip connectors ===
|}
<section end=RTC/>
<section end=PinStrip/>
<section begin=PMOD/>
=== Digilent Pmod™ Compatible headers ===
<section end=PMOD/>
<section begin=Schematics/>
==Schematics==
{{ImportantMessage|text=The following list details the schematic version/serial number association.
*From S-EVBBxyz 00E6 to 00DE
*From S-EVBBxyz 00E0 to 00FB.}}
{{ImportantMessage|text=U14 DDR3 chip can be populated alternatively with Micron MT41K64M16JT-15E or ISSI IS43TR16256BL-125KBLI}}
==== Release 2.4.0 ====
* ORCAD: [[mirrorhttps:bora/hw/BoraEVB/boraevb-2www.4dave.0-BELK-dsn.zip|eu/links/p/B6VMD9szrL0MSPlz boraevb-2.4.0-BELK-dsn.zip]]* PDF : [[mirrorhttps:bora/hw/BoraEVB/boraevb_Swww.EVBB0000I1R_2dave.4.0_color.pdf|eu/links/p/SKDqnaHRBVWwA0MV boraevb_S.EVBB0000I1R_2.4.0.pdf]]
==== Release 2.2.1 ====
* ORCAD: [[mirrorhttps:bora/hw/BoraEVB/boraevb-2www.2dave.1-BELK-dsn.zip|eu/links/p/orPSBGIESKeGcy38 boraevb-2.2.1-BELK-dsn.zip]]* PDF : [[mirrorhttps:bora/hw/BoraEVB/boraevb_Swww.EVBB0000I1R_2dave.2.1_color.pdf|eu/links/p/KTjZOWQBT1t66Umw boraevb_S.EVBB0000I1R_2.2.1.pdf]]
===BOM===
{{ImportantMessage|text=The following list details the BOM version/serial number association.
<section end=Schematics/>
<section begin=Mechanicals/>
==Mechanical==
* DXF: [https://www.dave.eu/links/p/ndf9AsBgti3TnGRF boraevb_CS040713A.dxf.zip]
* 3D: [https://www.dave.eu/links/p/l2wRddTIcC3RSZb8 boraevb_CS040713A.emn]
<section end=Mechanicals/>