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BoraEVB

182 bytes added, 10:57, 7 December 2023
Schematics
<section end=CPU/>
<section begin=Power Supply/>
 
=== Power supply - J7 ===
|-
|}
 
==== POWER GOOD signals selector - J10 ====
J10 is a 8-pin 4x2x2.54 pitch vertical header used for the selection - through jumpers - of the POWER GOOD options. The following table reports the pinout of the connector:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || BOARD_PGOOD|| - || -
|-
|2, 4 || 3.3V_SOM|| - || -
|-
|3 || 1.5V_POWER_GOOD || - || -
|-
|5 || VREF_POWER_GOOD || - || -
|-
|6, 8 || 3.3V_SBY || - || -
|-
|7 || 1.8V_POWER_GOOD || - || -
|-
|}
 
The available configurations are:
* No jumpers mounted (DEFAULT)
* Jumper on 1-2 -> supply BOARD_PGOOD with 3.3V_SOM
* Jumper on 3-4 -> supply 1.5V_POWER_GOOD with 3.3V_SOM
* Jumper on 5-6 -> supply 1.5V_VREF_POWER_GOOD with 3.3V_SBY
* Jumper on 7-8 -> supply 1.8V_VREF_POWER_GOOD with 3.3V_SBY
 
==== BANK35, BANK13 VDDIO selector - J11 ====
J11 is a 8-pin 4x2x2.54 pitch vertical header used for the selection - through jumpers - of the bank supply voltages. The following table reports the pinout of the connector:
 
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1, 5 || 3.3V|| - || -
|-
|2, 4 || VDDIO_BANK35|| - || -
|-
|3 || EVB_VDDQ_1V5 || - || -
|-
|6, 8 || VDDIO_BANK13|| - || -
|-
|7 || EVB_VDDIO_BANK13|| - || -
|-
|}
 
The available configurations are:
# Jumper on 1-2 -> supply VDDIO_BANK35 with 3.3V ('''requirerd when EVBB DDR3 device is used''')
# Jumper on 3-4 -> ('''Not Available''') supply VDDIO_BANK35 with EVB_VDDQ_1V5 ('''requirerd when EVBB DDR3 device is used''')
# Jumper on 5-6 -> supply VDDIO_BANK13 with 3.3V
# Jumper on 7-8 -> supply VDDIO_BANK35 with EVB_VDDIO_BANK13 ('''requirerd when TRACE is used''')
 
The following rules must be observed:
* Because of a hardware limitation, VDDIO_BANK35 '''must be configured for 3.3V power supply (Jumper on 1-2)'''.
* The configuration 1. (Jumper on 1-2) excludes 2. (Jumper on 3-4) (and viceversa)
* The configuration 3. (Jumper on 5-6) excludes 4. (Jumper on 7-8) (and viceversa)
 
The DEFAULT configuration is:
* Jumper on 1-2 ('''please note that this jumper must not be removed''')
* Jumper on 5-6
<section end=Power Supply/>
<section begin=Reset button/>
|}
<section end=Ethernet1/>
=== POWER GOOD signals selector - J10 ===
J10 is a 8-pin 4x2x2.54 pitch vertical header used for the selection - through jumpers - of the POWER GOOD options. The following table reports the pinout of the connector:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || BOARD_PGOOD|| - || -
|-
|2, 4 || 3.3V_SOM|| - || -
|-
|3 || 1.5V_POWER_GOOD || - || -
|-
|5 || VREF_POWER_GOOD || - || -
|-
|6, 8 || 3.3V_SBY || - || -
|-
|7 || 1.8V_POWER_GOOD || - || -
|-
|}
 
The available configurations are:
* No jumpers mounted (DEFAULT)
* Jumper on 1-2 -> supply BOARD_PGOOD with 3.3V_SOM
* Jumper on 3-4 -> supply 1.5V_POWER_GOOD with 3.3V_SOM
* Jumper on 5-6 -> supply 1.5V_VREF_POWER_GOOD with 3.3V_SBY
* Jumper on 7-8 -> supply 1.8V_VREF_POWER_GOOD with 3.3V_SBY
 
=== BANK35, BANK13 VDDIO selector - J11 ===
J11 is a 8-pin 4x2x2.54 pitch vertical header used for the selection - through jumpers - of the bank supply voltages. The following table reports the pinout of the connector:
 
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1, 5 || 3.3V|| - || -
|-
|2, 4 || VDDIO_BANK35|| - || -
|-
|3 || EVB_VDDQ_1V5 || - || -
|-
|6, 8 || VDDIO_BANK13|| - || -
|-
|7 || EVB_VDDIO_BANK13|| - || -
|-
|}
 
The available configurations are:
# Jumper on 1-2 -> supply VDDIO_BANK35 with 3.3V ('''requirerd when EVBB DDR3 device is used''')
# Jumper on 3-4 -> ('''Not Available''') supply VDDIO_BANK35 with EVB_VDDQ_1V5 ('''requirerd when EVBB DDR3 device is used''')
# Jumper on 5-6 -> supply VDDIO_BANK13 with 3.3V
# Jumper on 7-8 -> supply VDDIO_BANK35 with EVB_VDDIO_BANK13 ('''requirerd when TRACE is used''')
 
The following rules must be observed:
* Because of a hardware limitation, VDDIO_BANK35 '''must be configured for 3.3V power supply (Jumper on 1-2)'''.
* The configuration 1. (Jumper on 1-2) excludes 2. (Jumper on 3-4) (and viceversa)
* The configuration 3. (Jumper on 5-6) excludes 4. (Jumper on 7-8) (and viceversa)
 
The DEFAULT configuration is:
* Jumper on 1-2 ('''please note that this jumper must not be removed''')
* Jumper on 5-6
 
<section begin=JTAG/>
=== JTAG ===
|}
<section end=micro SD/>
<section begin=TRACE/>
=== Trace Port - J22 ===
|-
|}
<section end=TRACE/>
<section begin=DWM/>
 
=== DWM (DAVE Wifi/BT module) socket - J23 ===
J23 is a 52991-0308 connector type (30 pins, vertical, 0.50mm picth). This socket connects the [[Wireless_Module_(DWM) | DWM Wireless Module]] (optional) to the BoraEVB. The following table reports the pinout of the connector:
|}
<section end=LVDS/>
<section begin=PinStrip/>
=== Pin strip connectors ===
|}
<section end=RTC/>
<section end=PinStrip/>
<section begin=PMOD/>
 
=== Digilent Pmod™ Compatible headers ===
<section end=PMOD/>
<section begin=Schematics/>
 
==Schematics==
{{ImportantMessage|text=The following list details the schematic version/serial number association.
*From S-EVBBxyz 00E6 to 00DE
*From S-EVBBxyz 00E0 to 00FB.}}
 
{{ImportantMessage|text=U14 DDR3 chip can be populated alternatively with Micron MT41K64M16JT-15E or ISSI IS43TR16256BL-125KBLI}}
==== Release 2.4.0 ====
* ORCAD: [[mirrorhttps:bora/hw/BoraEVB/boraevb-2www.4dave.0-BELK-dsn.zip|eu/links/p/B6VMD9szrL0MSPlz boraevb-2.4.0-BELK-dsn.zip]]* PDF : [[mirrorhttps:bora/hw/BoraEVB/boraevb_Swww.EVBB0000I1R_2dave.4.0_color.pdf|eu/links/p/SKDqnaHRBVWwA0MV boraevb_S.EVBB0000I1R_2.4.0.pdf]]
==== Release 2.2.1 ====
* ORCAD: [[mirrorhttps:bora/hw/BoraEVB/boraevb-2www.2dave.1-BELK-dsn.zip|eu/links/p/orPSBGIESKeGcy38 boraevb-2.2.1-BELK-dsn.zip]]* PDF : [[mirrorhttps:bora/hw/BoraEVB/boraevb_Swww.EVBB0000I1R_2dave.2.1_color.pdf|eu/links/p/KTjZOWQBT1t66Umw boraevb_S.EVBB0000I1R_2.2.1.pdf]] 
===BOM===
{{ImportantMessage|text=The following list details the BOM version/serial number association.
<section end=Schematics/>
<section begin=Mechanicals/>
 
==Mechanical==
* DXF: [https://www.dave.eu/links/p/ndf9AsBgti3TnGRF boraevb_CS040713A.dxf.zip]
* 3D: [https://www.dave.eu/links/p/l2wRddTIcC3RSZb8 boraevb_CS040713A.emn]
<section end=Mechanicals/>
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