a000298_approval, dave_user
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→Programmable Logic
mettere in evidenza l'accessibilità ai registri da PS e da I2C
There are two ways to access on the PL logic register, from the
This allows the VTM to works as:
1) stand-alone device - a dedicated sw (bare metal or linux OS) that runs on PS can setup the PL logic and verify the video streams
2) slave device of the ATE - an external master I2C can setup the PL logic and verify the video streams through a I2C bridge (implemented on PL logic)
This is possible with a single PL configuration bitstream thanks to use of Xilinx® LogiCORE™ IP AXI Interconnect core. It permits to connect one or more AXI memory-mapped master devices to one or more memory-mapped slave devices.
===The automatic test procedure===
The automatic test procedure consists of the following steps:
