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Implementation
==Implementation==
From the system standpoint, the The additional test module (VTM) consists of a carrier board hosting the BoraX SOM. This board was designed according to the guidelines detailed [[Integration_guide_(Bora/BoraX)|here]].
Thanks to the rich set of available interfaces of BoraX, the integration of the new module was straightforward. It acts as a slave with respect to the main test module which implements the business logic of the entire ATE.
[[File:TBD.png|thumb|center|600px|caption]]
 
 
TBD
 
The automatic test procedure consist of the following steps:
*The master test module computes the CRC32 of the test frame (Ref_CRC)
*The master test module sends this value to the VTM; this is stored in a register implemented in the PL
*The master test module configures the DUT in order to visualize at the same time the test frame on the video outputs LVDS0, LVDS1, and HDMI
*The master test module enables the testing of the video streams
*The logic implemented in the PL:
**Synchronizes the video streams
**For each stream, it computes the CRC32 for every received frame in real-time. In case the computed value matches Ref_CRC, the counter of valid frames is incremented. Otherwise, the frame of the corrupted frames is increased.
*After a while, the master test module stops the video test and verify the counters. If all of the transmitted frames are good, the test is passed.
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