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BORA Xpress SOM

4,392 bytes added, 11:13, 20 December 2016
Introduction
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{{WarningMessage|text=The information here provided are preliminary and subject to change.}}=Introduction==
==Introduction==BORA Xpress (also denoted as BoraX) is the top-class Dual Cortex-A9 + FPGA CPU module by DAVE Embedded Systems, based on the recent Xilinx "Zynq" XC7Z015 / XC7Z030 application processor.BORA Xpress offers great computational power, thanks to the rich set of peripherals, the Dual Cortex-A9 and the Artix-7 FPGA inside. BORA Xpress is designed in order to keep full compatibility with the ULTRA Line CPU modules, to guarantee the premium quality and technical value of those customers that require top performances.
The [[BORA_Xpress_SOM#Hardware | Hardware]] section provides detailed information about hardware interfaces and characteristics. This document will provide a functional overview of the module and will focus on system-related issues.
== Product Highlights ==
 
* Unmatched performance thanks to Dual ARM Cortex-A9 @ up to 1GHz
* SERDES: Xpress lanes up to 6.25 Gbps
* All memories you need: on-board NOR and NAND Flash
* Enabling smarter system thanks to Artix-7 or Kintex-7 FPGA integrated on-chip
* FPGA banks wide range PSU input from 1.2V to 3.3V
* Highest security and reliability: internal voltage monitoring and power good enable
* Reduced carrier complexity: dual CAN, USB, Ethernet GB and native 3.3 V I/O
* Easy to fit thanks to its small form factor
* Accurate timing application thanks to on-board 5ppm RTC
* Pin2Pin Compatibility with BORA SOM based on Zynq XC7Z010/XC7Z020
== Feature Summary ==
{| class="wikitable" |
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
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| CPU||Xilinx Dual ARM Cortex-A9<br>ZYNQ XC7Z015/ZC7Z030 @ 666MHz (up to 1GHz) ||
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| Cache||L1: 32Kbyte instruction, 32Kbyte data<br>L2: 512Kbyte for each core ||
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| RAM|| DDR3 SDRAM @ 533 MHz<br>Up to 1 GB ||
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| SRAM|| On-chip RAM, 256 KB ||
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| Storage||Flash NOR SPI (8, 16 MB)<br>Flash NAND (all sizes up to 1GB, on request) ||
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|+ align="bottom" style="caption-side: bottom" | Table: CPU and Memories
|}
 
{| class="wikitable" |
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
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| Coprocessors|| NEON™ & Single / Double Precision<br>Floating Point for each processor||
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| USB||Up to 2x 2.0 OTG ports ||
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| UARTs||Up to 2x UART ports ||
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| GPIO||Up to x lines, shared with other functions (interrupts available) ||
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| Networks||Ethernet 10/100/1000 Mbps ||
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| CAN||2x full CAN 2.0B compliant interfaces ||
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| SD/MMC||2x SD/SDIO 2.0/MMC3.31 compliant controllers ||
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| Serial buses||2x full-duplex SPI ports with three peripheral chip selects<br>2x master and slave I²C interfaces ||
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| Timers||2x triple timers/counters (TTC) ||
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| RTC ||On board (DS3232), external battery powered ||
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| Debug||JTAG IEEE 1149.1 Test Access Port<br>CoreSight™ and Program Trace Macrocell (PTM) ||
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|+ align="bottom" style="caption-side: bottom" | Table: Peripherals
|}
 
{| class="wikitable" |
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
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| FPGA models||Artix™-7 / Kintex™-7||
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| Logic cells||74K to 125K||
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| LUTs||46K to 78K||
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| Flip flops||92K to 157K||
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| RAM||3.3Mb to 9.3Mb||
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| DSP slices||160 to 400||
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| Differential pairs||Up to 72 differential pairs for high freq. interfaces||
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| Serial Transceivers||4 Lanes up to 6.6Gbps
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|+ align="bottom" style="caption-side: bottom" | Table: Electrical, Mechanical and Environmental Specifications
|}
 
{| class="wikitable" |
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
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| Supply Voltage||3.3V, on-board voltage regulation||
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| Active power consumption|| Please refer to [[Power_(BORAXpress)| Power consumption]] section||
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| Dimensions||85mm x 50mm||
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| Weight|| ||
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| MTBF|| ||
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| Operating temperature||0..70 °C<br>-40..+85 °C||
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| Connectors||3 x 140 pins 0.6mm pitch||
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|+ align="bottom" style="caption-side: bottom" | Table: Electrical, Mechanical and Environmental Specifications
|}
 
==Hardware==
Please refer to [[Hardware BORA_Xpress_SOM | Harware Manual (BoraX)]] for detailed hardware related information on Bora BORA Xpress SOM.
=== Design Overview ===
Please refer to [[Design Overview (BoraXBORAXpress)|this page]] for more details.
===Mechanicals===
Please refer to [[Mechanicals (BoraXBORAXpress)|this page]] for more details.
===Pinout===
Please refer to [[Pinout (BoraXBORAXpress)|this page]] for more details.
===Power===
Please refer to [[Power (BoraXBORAXpress)|this page]] for more details.
===Reset scheme===
Bora provides several different resets signals. Please refer to [[Reset scheme (BoraXBORAXpress)|Reset scheme]] for more details.
===Processing system (PS) peripherals===
Please refer to [[Processing system peripherals (BoraXBORAXpress)|this page]] for more details.
===Programmable logic (PL)===
Please refer to [[Programmable logic (BoraXBORAXpress)|this page]] for more details.
=== RTC ===
Please refer to [[RTC (BoraXBORAXpress)|this page]] for more details.
=== Thermal IC ===
Please refer to [[Thermal IC (BoraXBORAXpress)|this page]] for more details.
=== Watchdog ===
Please refer to [[Watchdog (BoraXBORAXpress)|this page]] for more details. == Software ==Reference software is delivered as part of the [[BoraX_Embedded_Linux_Kit_(BXELK)|BoraX Embedded Linux Kit (BXELK)]]. [[BXELK_software_components|This page]] details how the software is organized. However, reading of [[Host_setup_and_development_flow_(BXELK)|this document]] is recommended to have a complete overview of the kit's organization.
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