Difference between revisions of "BORA SOM/BORA Hardware/Peripherals/EEPROM"
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An on-board Microchip 24AA32AT device provides an added storage device for factory settings: | An on-board Microchip 24AA32AT device provides an added storage device for factory settings: | ||
* the first 32 bytes of the device '''are RESERVED''': this region stores the bytes for the [[ConfigID_and_UniqueID#I2C_Eeprom|ConfigID]] on BORA SOMs configured for booting from NAND device (without NOR SPI on board) | * the first 32 bytes of the device '''are RESERVED''': this region stores the bytes for the [[ConfigID_and_UniqueID#I2C_Eeprom|ConfigID]] on BORA SOMs configured for booting from NAND device (without NOR SPI on board) | ||
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* three address pins for configuring the I2C adddress A0, A1, A2 internally configured as A[0..2]='000' | * three address pins for configuring the I2C adddress A0, A1, A2 internally configured as A[0..2]='000' | ||
* the EEPROM_WP is connected to J2.78 pin and '''should not be externally connected''' | * the EEPROM_WP is connected to J2.78 pin and '''should not be externally connected''' | ||
| + | <section end=Body/> | ||
Revision as of 13:49, 29 October 2021
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An on-board Microchip 24AA32AT device provides an added storage device for factory settings:
- the first 32 bytes of the device are RESERVED: this region stores the bytes for the ConfigID on BORA SOMs configured for booting from NAND device (without NOR SPI on board)
- the device is write protected using the EEPROM_WP
The device has some configuration pins:
- three address pins for configuring the I2C adddress A0, A1, A2 internally configured as A[0..2]='000'
- the EEPROM_WP is connected to J2.78 pin and should not be externally connected
