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BORA Lite SOM/BORA Lite Hardware/pdf

568 bytes added, 08:28, 18 July 2023
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{{#lst:BORA Lite SOM/BORA Lite Hardware/General Information/Processor and memory subsystem|Body}}
{{#lst:BORA Lite SOM/BORA Lite Hardware/General Information/Hardware versioning and tracking|Body}}
{{#lst:Processor and memory subsystem (BoraLite)|Body}}
{{#lst:BORA Lite SOM/Part number composition|Body}}
=Pinout Table=
{{#lst:Pinout_(BoraLite)BORA Lite SOM/BORA Lite Hardware/Pinout Table|Body}}
=Power and reset=
{{#lst:Power_(Bora/BoraLite)|Body}}
{{#lst:Reset_scheme_(BoraBORA Lite SOM/BoraLite)BORA Lite Hardware/Power_and_Reset/Reset_scheme_and_control_signals|Body}}
{{#lst:PL initialization signals (Bora/BoraX/BoraLite)|Body}}
{{#lst:Processor BORA Lite SOM/BORA Lite Hardware/Power and memory subsystem (BoraLite)Reset/System boot|Body}}
{{#lst:On board JTAG connector (BoraLite)|Body}}
=Peripherals=
== Processing System =={{#lst:Programmable logic Processing system peripherals (Bora)|PS}}{{#lst:Programmable_logic_(BoraLite) |Body}}
==Gigabit Ethernet==
{{#lst:Processing system peripherals (BoraLite)|Ethernet}}
==USB==
{{#lst:Processing system peripherals (BoraLite)|USB}}
==SD/SDIO==
{{#lst:Processing system peripherals (BoraLite)|SDIO}}
==QUAD SPI==
{{#lst:Processing system peripherals (BoraLite)|SPI}}
==Static memory controller (NAND)==
{{#lst:Processing system peripherals (Bora)|NAND}}
==I^2C0==
{{#lst:Processing system peripherals (BoraLite)|I2C0}}
==SD/SDIO==
{{#lst:Processing system peripherals (BoraLite)|SDIO}}
==UART 1==
{{#lst:Processing system peripherals (BoraLite)|UART1}}
==JTAG==
{{#lst:Processing system peripherals (BoraLite)|JTAG}}
==EEPROM==
{{#lst:BORA Lite SOM/BORA Lite Hardware/Peripherals/EEPROM|Body}}
==Real Time Clock==
{{#lst:BORA Lite SOM/BORA Lite Hardware/Peripherals/Real_Time_Clock|Body}}
==Watchdog==
{{#lst:BORA Lite SOM/BORA Lite Hardware/Peripherals/Watchdog|Body}}
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