Bureaucrats, dave_user, Administrators
8,226
edits
Changes
→Pre-built binaries
{{Applies To Bora}}
{{Applies To BoraX}}
{{Applies To BoraLite}}
{{AppliesToBORA_AN}}
{{AppliesToBORA_Xpress_AN}}
{{AppliesToBORA Lite AN}}
{{InfoBoxBottom}}
{{WarningMessage|text=This application note was validated against specific versions of the kit only. It may not work with other versions. Supported versions are listed in the ''History'' section.}}
{{ImportantMessage|text=It is assumed to use ZYNQ SOC with <b><i>speed grade -1</i></b> (even using command line script or GUI). In any case, there are no issues using <b><i>speed grade -3</i></b> SOC provided with BELK kit}}
==History==
{| class="wikitable" border="1"
|-
|1.0.0
|08:48, 16 September 2015 (CEST)
|[[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components|2.2.0]]
|First release
|-
|1.1.0
|14:25, 13 January 2016 (CET)
|[[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components|2.2.0, 3.0.0]]
|Added support for BoraX/BoraXEVB platform
|-
|{{oldid|8290|1.1.1}}
|29 September 2016
|[[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components|2.2.0, 3.0.0]]
|Added more information about MII buses organization
|-
|2.0.0
|TBDJanuary 2020
|[[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components|4.1.0 / 2.1.0]]
|Migrated AN migration to BELK 4.1.0 / BXELK 2.1.0
|-
|}
|}
Since bank #34 is powered at 3.3V (High Range I/O mode), RGMII duty cycle distortion specification is not matched. In case of carrier board designed for production environments, <u>it is recommended to use a lower voltage levels and thus a different PL bank</u>. For more details please see section ''I/O Standard and Placement'' of [httphttps://xgoogledocs.xilinx.com/search?output=xml_no_dtd&ie=UTFr/en-US/pg160-gmii-8&oe=UTFto-8&getfields=*&filter=0&site=EntireSite&num=200&client=xilinx&proxystylesheet=xilinx&show_dynamic_navigation=0&allVersions=rgmii/GMII-to-RGMII-v4.1&sort=meta:Last%2520Modified%2520Date%3AD%3AED&q=+inmeta:Document%2520Class%3DDocument+inmeta:-LogiCORE-IP-Product%2520Type%3DIP%2520Cores+inmeta:IP%3DGMII%2520to%2520RGMII -Guide ''PG160 GMII to RGMII LogiCORE IP Product Guide''] and [[Power_(Bora)|this page]].
The Vivado project archive can also be downloaded build with the procedure explained [https://www.dave.eu/system/files/area-riservata[Creating_and_building_example_Vivado_project_(BELK/AN-BELK-006-Enabling-dual-Gigabit.zip BXELK)#Command_line_based_procedure|here]].
===BoraLite + Adapter + BoraXEVB===
| ETH1_RXCK||IO_L14P_T2_SRCC_13
|-
| ETH1_RXCTL||IO_L15N_T2_DQS_13IO_L14N_T2_SRCC_13
|-
| ETH1_MDC||IO_L21N_T3_DQS_13
|}
The Vivado project archive can also be downloaded build with the procedure explained [https:/[Creating_and_building_example_Vivado_project_(BELK/www.dave.eu/system/files/area-riservata/AN-BELK-006-Enabling-dual-Gigabit.zip BXELK)#Command_line_based_procedure|here] '''TODO''': add binaries].
===Borax + BoraXEVB===
|}
The Vivado project archive can also be downloaded build with the procedure explained [https:/[Creating_and_building_example_Vivado_project_(BELK/www.dave.eu/system/files/area-riservata/AN-BELK-006-Enabling-dual-Gigabit.zip BXELK)#Command_line_based_procedure|here]].
==Enabling dual Ethernet configuration in linux kernel==
To enable dual Ethernet user needs to get the pre-built binaries from this [https://www.dave.eu/system/files/area[BELK-riservata/AN-BELK-006:_Enabling_dual_Gigabit_Ethernet_support_on_BoraEVB/BoraXEVB#Pre-Enabling-dual-Gigabit.zip linkbuilt_binaries |here]]
Alternatively kernel and device tree can be built from sources with the following procedure:
* update Bora kernel repository (as described [[Bora_Embedded_Linux_Kit_(BELK)/BXELK_software_components#Updating_the_repositories_from_BELK_2.1.0_to_BELK_2.2.0Updating_git_repositories|here]])* apply build the patch <code>0001-dts-bora-add-ETH1-phy-supportan006.patchdtb</code> included in the pre-build binaries packagedevicetree
* build the updated kernel source as usual.
Put the binaries on the first (FAT32) partition of your BELK SD card, overwriting the original one if needed. Please note that you need the following files:
* <code>uImage</code>
* <code>fpga.bin</code>
* <code>u-boot.img</code>
* <code>uEnv.txt</code>
root@bora:~#
</pre>
=== Pre-built binaries ===
* For Bora SoM use:
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.1_bora_mmc_an006_boot.bin u-boot (SPL)]
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.1_bora_mmc_an006_u-boot.img u-boot (img)]
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.0_uImage uImage]
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.0_bora-an006.dtb dtb]
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.0_bora_ETH1_fpga.bit fpga]
* For BoraLite SoM use:
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.1_bora_mmc_an006_boot.bin u-boot (SPL)]
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.1_bora_mmc_an006_u-boot.img u-boot (img)]
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.0_uImage uImage]
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.0_bora-an006.dtb dtb]
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.0_boralite_ETH1_fpga.bit fpga]
* For BoraX SoM use:
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.1_borax_mmc_an006_boot.bin u-boot (SPL)]
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.1_borax_mmc_an006_u-boot.img u-boot (img)]
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.0_uImage uImage]
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.0_bora-an006.dtb dtb]
** [http://mirror.dave.eu/bora/belk-4.1.0/belk-4.1.0_borax_ETH1_fpga.bit fpga]
===Performance tests===