Changes

Since bank #34 is powered at 3.3V (High Range I/O mode), RGMII duty cycle distortion specification is not matched. In case of carrier board designed for production environments, <u>it is recommended to use a lower voltage levels and thus a different PL bank</u>. For more details please see section ''I/O Standard and Placement'' of [httphttps://xgoogledocs.xilinx.com/search?output=xml_no_dtd&ie=UTFr/en-US/pg160-gmii-8&oe=UTFto-8&getfields=*&filter=0&site=EntireSite&num=200&client=xilinx&proxystylesheet=xilinx&show_dynamic_navigation=0&allVersions=rgmii/GMII-to-RGMII-v4.1&sort=meta:Last%2520Modified%2520Date%3AD%3AED&q=+inmeta:Document%2520Class%3DDocument+inmeta:-LogiCORE-IP-Product%2520Type%3DIP%2520Cores+inmeta:IP%3DGMII%2520to%2520RGMII -Guide ''PG160 GMII to RGMII LogiCORE IP Product Guide''] and [[Power_(Bora)|this page]].