Difference between revisions of "AXEL ULite SOM/AXEL ULite Hardware/Peripherals/Ethernet"
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| + | ==Peripheral Ethernet== | ||
AXEL ULite system-on-module (SOM for short) has an internal ethernet PHY connected to the <code>enet1</code> MAC port. | AXEL ULite system-on-module (SOM for short) has an internal ethernet PHY connected to the <code>enet1</code> MAC port. | ||
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The following picture shows an external ethernet magnetic connection example. | The following picture shows an external ethernet magnetic connection example. | ||
[[File: AxelULite-ethernet.png]] | [[File: AxelULite-ethernet.png]] | ||
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Latest revision as of 10:14, 9 January 2024
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| 2017/09/14 | New documentation layout | ||
Peripheral Ethernet[edit | edit source]
AXEL ULite system-on-module (SOM for short) has an internal ethernet PHY connected to the enet1 MAC port.
On-board Ethernet PHY (Micrel KSZ8091RNA) provides interface signals required to implement the 10/100 Mbps Ethernet port. The transceiver is connected to the Ethernet MAC (ENET module) through RMII interface.
The following table describes the interface signals:
| Pin | Pin name | Internal connection | Ball/pin # | Notes |
|---|---|---|---|---|
| J2.13 | ETH_LED1 | LAN.LED0/PME_N1 | 23 | |
| J2.19 | ETH_TX_P | LAN.TXP | 6 | |
| J2.21 | ETH_TX_M | LAN.TXM | 5 | |
| J2.23 | ETH_RX_P | LAN.RXP | 4 | |
| J2.25 | ETH_RX_M | LAN.RXM | 3 | |
| J2.31 | SNVS_TAMPER2 | CPU.SNVS_TAMPER2 | P11 | PHY INT |
| J2.127 | GPIO1_IO06 | CPU.GPIO_IO06 | K17 | PHY MDIO |
| J2.129 | GPIO1_IO07 | CPU.GPIO_IO07 | L16 | PHY MDC |
Magnetic Connector example[edit | edit source]
The following picture shows an external ethernet magnetic connection example.
