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AXEL Lite SOM/AXEL Lite Hardware/Pinout Table

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<section begin="History" />
{| style="border-collapse:collapse; "
!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
|-
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Version!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Issue Date!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes
|-
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|1.0.0{{oldid|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"13761|Sep 2020/12/18}}|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|New documentation layout
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|15218|2021/11/17}}
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |More details about BOOT_MODE_SEL signal
|-
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |2021/11/26
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |Voltage domains legend added. Fixed the "Type" field of ETH0_LED1 and ETH0_LED2.
|}
<section end="History" />
<section begin="Body" />
==Connectors and Pinout Table==
=== Connectors description ===
In the following table are described all available connectors integrated on [[AXEL Lite SOM]]:
{| class="wikitable"
|-
!Connector name
!Connector Type
!Notes
!Carrier board counterpart
|-
|J1
|SODIMM DDR3 edge connector 204 pin
|
|TE Connectivity 2-2013289-1
|}
<section end=History/><section begin=Body/>==Pinout Table==The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to AXEL Lite pinout specifications. See the images below for reference:
===Introduction===[[File:AXEL_Lite-top-pin1-203.png|500px|thumb|AXEL Lite TOP view|none]][[File:AXEL_Lite-bottom-pin2-204.png|500px|thumb|AXEL Lite BOTTOM view|none]]
===Pinout table naming conventions === This chapter contains the pinout description of the [[AXEL Lite SOM]] module, grouped in two tables (odd and even pins) that report the pin mapping of the 204-pin SO-DIMM AXEL Lite connector.
Each row in the pinout tables contains the following information:
{|class="wikitable" style="width:50%;"
|-
|'''Pin'''
|-
|'''Internal<br>connections'''
| Connections to the Axel Ultra components
* CPU.<x> : pin connected to CPU pad named <x>
* CAN.<x> : pin connected to the CAN transceiver(TI SN65HVD232)* PMIC.<x> : pin connected to the Power Manager IC(NXP MMPF0100)* LAN.<x> : pin connected to the LAN PHY(Microchip KSZ9031)
* NOR.<x>: pin connected to the flash NOR
* SV.<x>: pin connected to voltage supervisor
| Component ball/pin number connected to signal
|-
|'''Voltagedomain''' || I/O The voltage levels domain the pin belongs to
|-
|'''Type'''
|}
===Pinout Table Voltage domains === {| class="wikitable"! latexfontsize="scriptsize" | Voltage domain! latexfontsize="scriptsize" | Nominal voltage [V]! latexfontsize="scriptsize" | Notes|-|3.3VIN|3.3|See [[AXEL_Lite_SOM/AXEL_Lite_Hardware/Electrical_Thermal_and_Mechanical_Features/Operational_characteristics#Recommended_ratings|Operational_characteristics]] of the SoM wiki page|-|VCC_ENET_1V8|1.8|Voltage generated by the internal PSU. See [[AXEL_Lite_SOM/AXEL_Lite_Hardware/Power_and_Reset/Power_Supply_Unit_(PSU)_and_recommended_power-up_sequence | Power Supply Unit (PSU)]] wiki page|-|AXEL_IO_3V3|3.3|Voltage generated by the internal PSU. See [[AXEL_Lite_SOM/AXEL_Lite_Hardware/Power_and_Reset/Power_Supply_Unit_(PSU)_and_recommended_power-up_sequence | Power Supply Unit (PSU)]] wiki page|-|GEN_2V5|2.5|Voltage generated by the internal PSU. See [[AXEL_Lite_SOM/AXEL_Lite_Hardware/Power_and_Reset/Power_Supply_Unit_(PSU)_and_recommended_power-up_sequence | Power Supply Unit (PSU)]] wiki page|-|} ==SODIMM ODD pins declaration ===
{| class="wikitable"
! latexfontsize="scriptsize"| Pin ! latexfontsize="scriptsize"| Pin Name! latexfontsize="scriptsize"| Internal Connections ! latexfontsize="scriptsize"| Ball/pin # ! latexfontsize="scriptsize"| Voltage|domain! latexfontsize="scriptsize"| Type ! latexfontsize="scriptsize"| Notes! colspan="2" latexfontsize="scriptsize"| Alternative Functions
|-
|J2.1
|17
|VCC_ENET_1V8
|DO|This signal is @ 1.8V and should be|Internal 10k pull-up to 1.8VThis signal requires voltage level translated shifters if used @ 3V3at 3.3V
|
|
|15
|VCC_ENET_1V8
|DO|This signal is @ 1.8V and should be|Internal 10k pull-up to 1.8VThis signal requires voltage level translated shifters if used @ 3V3at 3.3V
|
|
|
|-
|rowspan="3"| J2.37|rowspan="3"| SD3_RST|rowspan="3"| CPU.SD3_RST|rowspan="3"| D15|rowspan="3"| AXEL_IO_3V3|rowspan="3"| IO|rowspan="3"|
|Pin ALT-0
|SD3_RESET
|GPIO7_IO08
|-
|rowspan="4"|J2.39|rowspan="4"|SD3_DATA0|rowspan="4"|CPU.SD3_DATA0|rowspan="4"|E14|rowspan="4"|AXEL_IO_3V3|rowspan="4"|IO|rowspan="4&quot;"|
|Pin ALT-0
|SD3_DATA0
|GPIO7_IO04
|-
|rowspan="4"|J2.41|rowspan="4"|SD3_DATA1|rowspan="4"|CPU.SD3_DATA1|rowspan="4"|F14|rowspan="4"|AXEL_IO_3V3|rowspan="4"|IO|rowspan="4"|
|Pin ALT-0
|SD3_DATA1
|GPIO7_IO05
|-
|rowspan="2"|J2.43|rowspan="2"|SD3_DATA2|rowspan="2"|CPU.SD3_DATA2|rowspan="2"|A15|rowspan="2"|AXEL_IO_3V3|rowspan="2"|IO|rowspan="2"|
|Pin ALT-0
|SD3_DATA2
|GPIO7_IO06
|-
|rowspan="3"|J2.45|rowspan="3"|SD3_DATA3|rowspan="3"|CPU.SD3_DATA3|rowspan="3"|B15|rowspan="3"|AXEL_IO_3V3|rowspan="3"|IO|rowspan="3"|
|Pin ALT-0
|SD3_DATA3
|GPIO7_IO07
|-
|rowspan="3"|J2.47|rowspan="3"|SD3_DATA4|rowspan="3"|CPU.SD3_DATA4|rowspan="3"|D13|rowspan="3"|AXEL_IO_3V3|rowspan="3"|IO|rowspan="3"|
|Pin ALT-0
|SD3_DATA4
|GPIO7_IO01
|-
|rowspan="3"|J2.49|rowspan="3"|SD3_DATA5|rowspan="3"|CPU.SD3_DATA5|rowspan="3"|C13|rowspan="3"|AXEL_IO_3V3|rowspan="3"|IO|rowspan="3"|
|Pin ALT-0
|SD3_DATA5
|GPIO7_IO00
|-
|rowspan="3"|J2.51|rowspan="3"|SD3_DATA6|rowspan="3"|CPU.SD3_DATA6|rowspan="3"|E13|rowspan="3"|AXEL_IO_3V3|rowspan="3"|IO|rowspan="3"|
|Pin ALT-0
|SD3_DATA6
|GPIO6_IO18
|-
|rowspan="3"|J2.53|rowspan="3"|SD3_DATA7|rowspan="3"|CPU.SD3_DATA7|rowspan="3"|F13|rowspan="3"|AXEL_IO_3V3|rowspan="3"|IO|rowspan="3"|
|Pin ALT-0
|SD3_DATA7
|GPIO6_IO17
|-
|rowspan="4"|J2.55|rowspan="4"|SD3_CMD|rowspan="4"|CPU.SD3_CMD|rowspan="4"|B13|rowspan="4"|AXEL_IO_3V3|rowspan="4"|IO|rowspan="4"|
|Pin ALT-0
|SD3_CMD
|
|-
|rowspan="4"|J2.59|rowspan="4"|SD3_CLK|rowspan="4"|CPU.SD3_CLK|rowspan="4"|D14|rowspan="4"|AXEL_IO_3V3|rowspan="4"|IO|rowspan="4"|
|Pin ALT-0
|SD3_CLK
|GPIO7_IO03
|-
|rowspan="6"|J2.61|rowspan="6"|SD2_DATA0|rowspan="6"|CPU.SD2_DATA0|rowspan="6"|A22|rowspan="6"|AXEL_IO_3V3|rowspan="6"|IO|rowspan="6"|
|Pin ALT-0
|SD2_DATA0
|DCIC2_OUT
|-
|rowspan="6"|J2.63|rowspan="6"|SD2_DATA1|rowspan="6"|CPU.SD2_DATA1|rowspan="6"|E20|rowspan="6"|AXEL_IO_3V3|rowspan="6"|IO|rowspan="6"|
|Pin ALT-0
|SD2_DATA1
|GPIO1_IO14
|-
|rowspan="6"|J2.65|rowspan="6"|SD2_DATA2|rowspan="6"|CPU.SD2_DATA2|rowspan="6"|A23|rowspan="6"|AXEL_IO_3V3|rowspan="6"|IO|rowspan="6"|
|Pin ALT-0
|SD2_DATA2
|GPIO1_IO13
|-
|rowspan="5"|J2.67|rowspan="5"|SD2_DATA3|rowspan="5"|CPU.SD2_DATA3|rowspan="5"|B22|rowspan="5"|AXEL_IO_3V3|rowspan="5"|IO|rowspan="5"|
|Pin ALT-0
|SD2_DATA3
|GPIO1_IO12
|-
|rowspan="5"|J2.69|rowspan="5"|SD2_CMD|rowspan="5"|CPU.SD2_CMD|rowspan="5"|F19|rowspan="5"|AXEL_IO_3V3|rowspan="5"|IO|rowspan="5"|
|Pin ALT-0
|SD2_CMD
|GPIO1_IO11
|-
|rowspan="5"|J2.71|rowspan="5"|SD2_CLK|rowspan="5"|CPU.SD2_CLK|rowspan="5"|C21|rowspan="5"|AXEL_IO_3V3|rowspan="5"|IO|rowspan="5"|
|Pin ALT-0
|SD2_CLK
|
|-
|rowspan="4"|J2.75|rowspan="4"|SD1_DAT0|rowspan="4"|CPU.SD1_DAT0|rowspan="4"|A21|rowspan="4"|AXEL_IO_3V3|rowspan="4"|IO|rowspan="4"|
|Pin ALT-0
|SD1_DATA0
|GPIO1_IO16
|-
|rowspan="5"|J2.77|rowspan="5"|SD1_DAT1|rowspan="5"|CPU.SD1_DAT1|rowspan="5"|C20|rowspan="5"|AXEL_IO_3V3|rowspan="5"|IO|rowspan="5"|
|Pin ALT-0
|SD1_DATA1
|GPIO1_IO17
|-
|rowspan="7"|J2.79|rowspan="7"|SD1_DAT2|rowspan="7"|CPU.SD1_DAT2|rowspan="7"|E19|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|SD1_DATA2
|WDOG1_RESET_B_DEB
|-
|rowspan="7"|J2.81|rowspan="7"|SD1_DAT3|rowspan="7"|CPU.SD1_DAT3|rowspan="7"|F18|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|SD1_DATA3
|WDOG2_RESET_B_DEB
|-
|rowspan="5"|J2.83|rowspan="5"|SD1_CMD|rowspan="5"|CPU.SD1_CMD|rowspan="5"|B21|rowspan="5"|AXEL_IO_3V3|rowspan="5"|IO|rowspan="5"|
|Pin ALT-0
|SD1_CMD
|GPIO1_IO18
|-
|rowspan="4"|J2.85|rowspan="4"|SD1_CLK|rowspan="4"|CPU.SD1_CLK|rowspan="4"|D20|rowspan="4"|AXEL_IO_3V3|rowspan="4"|IO|rowspan="4"|
|Pin ALT-0
|SD1_CLK
|
|-
|rowspan="7"|J2.89|rowspan="7"|<nowiki>KEY_COL0/|ECSPI1_SCLK</nowiki>|rowspan="7"|CPU.KEY_COL0|rowspan="7"|W5|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ECSPI1_SCLK
|DCIC1_OUT
|-
|rowspan="7"|J2.91|rowspan="7"|<nowiki>KEY_ROW0/|ECSPI1_MOSI</nowiki>|rowspan="7"|CPU.KEY_ROW0|rowspan="7"|V6|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ECSPI1_MOSI
|DCIC2_OUT
|-
|rowspan="7"|J2.93|rowspan="7"|<nowiki>KEY_COL1/|ECSPI1_MISO</nowiki>|rowspan="7"|CPU.KEY_COL1|rowspan="7"|U7|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ECSPI1_MISO
|SD1_VSELECT
|-
|rowspan="7"|J2.95|rowspan="7"|<nowiki>KEY_ROW1/|ECSPI1_SS0</nowiki>|rowspan="7"|CPU.KEY_ROW1|rowspan="7"|U6|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ECSPI1_SS0
|SD2_VSELECT
|-
|rowspan="7"|J2.97|rowspan="7"|<nowiki>KEY_COL2/|ECSPI1_SS1</nowiki>|rowspan="7"|CPU.KEY_COL2|rowspan="7"|W6|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ECSPI1_SS1
|USB_H1_PWR_CTL_WAKE
|-
|rowspan="7"|J2.99|rowspan="7"|KEY_ROW2|rowspan="7"|CPU.KEY_ROW2|rowspan="7"|W4|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ECSPI1_SS2
|HDMI_TX_CEC_LINE
|-
|rowspan="7"|J2.101|rowspan="7"|<nowiki>KEY_COL3/|I2C2_SCL</nowiki>|rowspan="7"|CPU.KEY_COL3|rowspan="7"|U5|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|Internally connected to PMIC I2C interface
|Pin ALT-0
|ECSPI1_SS3
|SPDIF_IN
|-
|rowspan="6"|J2.103|rowspan="6"|<nowiki>KEY_ROW3/|I2C2_SDA</nowiki>|rowspan="6"|CPU.KEY_ROW3|rowspan="6"|T7|rowspan="6"|AXEL_IO_3V3|rowspan="6"|IO|rowspan="6"|Internally connected to PMIC I2C interface
|Pin ALT-1
|ASRC_EXT_CLK
|SD1_VSELECT
|-
|rowspan="6"|J2.105|rowspan="6"|KEY_COL4|rowspan="6"|CPU.KEY_COL4|rowspan="6"|T6|rowspan="6"|AXEL_IO_3V3|rowspan="6"|IO|rowspan="6"|
|Pin ALT-0
|FLEXCAN2_TX
|GPIO4_IO14
|-
|rowspan="6"|J2.107|rowspan="6"|KEY_ROW4|rowspan="6"|CPU.KEY_ROW4|rowspan="6"|V5|rowspan="6"|AXEL_IO_3V3|rowspan="6"|IO|rowspan="6"|
|Pin ALT-0
|FLEXCAN2_RX
|
|-
|rowspan="7"|J2.177|rowspan="7"|EIM_D19|rowspan="7"|CPU.EIM_D19|rowspan="7"|G21|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ECSPI1_SS1
|EPDC_DATA12
|-
|rowspan="6"|J2.179|rowspan="6"|EIM_D20|rowspan="6"|CPU.EIM_D20|rowspan="6"|G20|rowspan="6"|AXEL_IO_3V3|rowspan="6"|IO|rowspan="6"|
|Pin ALT-0
|ECSPI4_SS0
|EPIT2_OUT
|-
|rowspan="7"|J2.181|rowspan="7"|EIM_D21|rowspan="7"|CPU.EIM_D21|rowspan="7"|H20|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ECSPI4_SCLK
|SPDIF_IN
|-
|rowspan="7"|J2.183|rowspan="7"|EIM_D22|rowspan="7"|CPU.EIM_D22|rowspan="7"|E23|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ECSPI4_MISO
|EPDC_SDCE6
|-
|rowspan="8"|J2.185|rowspan="8"|EIM_D23|rowspan="8"|CPU.EIM_D23|rowspan="8"|D25|rowspan="8"|AXEL_IO_3V3|rowspan="8"|IO|rowspan="8"|
|Pin ALT-0
|IPU1_DI0_D0_CS
|EPDC_DATA11
|-
|rowspan="8"|J2.187|rowspan="8"|EIM_D24|rowspan="8"|CPU.EIM_D24|rowspan="8"|F22|rowspan="8"|AXEL_IO_3V3|rowspan="8"|IO|rowspan="8"|
|Pin ALT-0
|ECSPI4_SS2
|EPDC_SDCE7
|-
|rowspan="8"|J2.189|rowspan="8"|EIM_D25|rowspan="8"|CPU.EIM_D25|rowspan="8"|G22|rowspan="8"|AXEL_IO_3V3|rowspan="8"|IO|rowspan="8"|
|Pin ALT-0
|ECSPI4_SS3
|EPDC_SDCE8
|-
|rowspan="8"|J2.191|rowspan="8"|EIM_D26|rowspan="8"|CPU.EIM_D26|rowspan="8"|E24|rowspan="8"|AXEL_IO_3V3|rowspan="8"|IO|rowspan="8"|
|Pin ALT-0
|IPU1_DI1_PIN11
|EPDC_SDOED
|-
|rowspan="8"|J2.193|rowspan="8"|EIM_D27|rowspan="8"|CPU.EIM_D27|rowspan="8"|E25|rowspan="8"|AXEL_IO_3V3|rowspan="8"|IO|rowspan="8"|
|Pin ALT-0
|IPU1_DI1_PIN13
|EPDC_SDOE
|-
|rowspan="8"|J2.195|rowspan="8"|EIM_D28|rowspan="8"|CPU.EIM_D28|rowspan="8"|G23|rowspan="8"|AXEL_IO_3V3|rowspan="8"|IO|rowspan="8"|
|Pin ALT-0
|I2C1_SDA
|EPDC_PWR_CTRL3
|-
|rowspan="7"|J2.197|rowspan="7"|EIM_D29|rowspan="7"|CPU.EIM_D29|rowspan="7"|J19|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|IPU1_DI1_PIN15
|EPDC_PWR_WAKE
|-
|rowspan="7"|J2.199|rowspan="7"|EIM_D30|rowspan="7"|CPU.EIM_D30|rowspan="7"|J20|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|IPU1_DISP1_DATA21
|EPDC_SDOEZ
|-
|rowspan="8"|J2.201|rowspan="8"|EIM_D31|rowspan="8"|CPU.EIM_D31|rowspan="8"|H21|rowspan="8"|AXEL_IO_3V3|rowspan="8"|IO|rowspan="8"|
|Pin ALT-0
|IPU1_DISP1_DATA20
|}
=== Pinout Table SODIMM EVEN pins declaration ===
{| class="wikitable"
! latexfontsize="scriptsize" | Internal Connections
! latexfontsize="scriptsize" | Ball/pin #
! latexfontsize="scriptsize" | <nowiki> Voltage|domain</nowiki>
! latexfontsize="scriptsize" | Type
! latexfontsize="scriptsize" | Notes
|
|
* If this power supply is not used, the pin can be left open.
* Even if this power supply is not used, NXP recommends to connect a capacitor. A 100nF capacitor is connected on the SoM.
|
|
|
|
|This is a pulled-up input. Leave unconnected to select "1". Connect to ground to select "0". For more details, please see also the following pages:* [[AXEL_Lite_SOM/AXEL_Lite_Hardware/Power_and_Reset/Reset_scheme_and_control_signals | Reset scheme and control signals]]* [[AXEL_Lite_SOM/AXEL_Lite_Hardware/Power_and_Reset/System_boot | System boot]]
|
|
|-
|J2.22
|CPU_PORNCPU_PORn|CPU.CPU_PORNCPU_PORn
|C11
|
|
|-
|rowspan="6"|J2.26|rowspan="6"|GPIO_0|rowspan="6"|CPU.GPIO_0|rowspan="6"|T5|rowspan="6"|AXEL_IO_3V3|rowspan="6"|IO|rowspan="6"|
|Pin ALT-0
|CCM_CLKO1
|SNVS_VIO_5
|-
|rowspan="7"|J2.28|rowspan="7"|GPIO_1|rowspan="7"|CPU.GPIO_1|rowspan="7"|T4|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|[[AXEL_Lite_SOM/AXEL_Lite_Hardware/Power_and_Reset/Reset_scheme_and_control_signals#Handling_CPU-initiated_software_reset | Reset_scheme_and_control_signals#Handling_CPU-initiated_software_reset]]
|Pin ALT-0
|ESAI_RX_CLK
|
|-
|rowspan="5"|J2.32|rowspan="5"|GPIO_2|rowspan="5"|CPU.GPIO_2|rowspan="5"|T1|rowspan="5"|AXEL_IO_3V3|rowspan="5"|IO|rowspan="5"|
|Pin ALT-0
|ESAI_TX_FS
|MLB_DATA
|-
|rowspan="7"|J2.34|rowspan="7"|GPIO_3/I2C3_SCL|rowspan="7"|CPU.GPIO_3|rowspan="7"|R7|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ESAI_RX_HF_CLK
|MLB_CLK
|-
|rowspan="4"|J2.36|rowspan="4"|GPIO_4|rowspan="4"|CPU.GPIO_4|rowspan="4"|R6|rowspan="4"|AXEL_IO_3V3|rowspan="4"|IO|rowspan="4"|
|Pin ALT-0
|ESAI_TX_HF_CLK
|SD2_CD_B
|-
|rowspan="6"|J2.38|rowspan="6"|GPIO_5|rowspan="6"|CPU.GPIO_5|rowspan="6"|R4|rowspan="6"|AXEL_IO_3V3|rowspan="6"|IO|rowspan="6"|
|Pin ALT-0
|ESAI_TX2_RX3
|ARM_EVENTI
|-
|rowspan="5"|J2.40|rowspan="5"|GPIO_6/I2C3_SDA|rowspan="5"|CPU.GPIO_6|rowspan="5"|T3|rowspan="5"|AXEL_IO_3V3|rowspan="5"|IO|rowspan="5"|
|Pin ALT-0
|ESAI_TX_CLK
|MLB_SIG
|-
|rowspan="9"|J2.42|rowspan="9"|GPIO_7//FLEXCAN1_H|rowspan="9"|CPU.GPIO_7|rowspan="9"|R3|rowspan="9"|AXEL_IO_3V3|rowspan="9"|IO|rowspan="9"| <nowiki> Hardware mounting option depending on order code|CAN_TX (PHY onboard) or GPIO_7</nowiki>
|Pin ALT-0
|ESAI_TX4_RX1
|I2C4_SCL
|-
|rowspan="9"|J2.44|rowspan="9"|GPIO_8//FLEXCAN1_L|rowspan="9"|CPU.GPIO_8|rowspan="9"|R5|rowspan="9"|AXEL_IO_3V3|rowspan="9"|IO|rowspan="9"| <nowiki> Hardware mounting option depending on order code|CAN_RX (PHY onboard) or GPIO_8</nowiki>
|Pin ALT-0
|ESAI_TX5_RX0
|I2C4_SDA
|-
|rowspan="7"|J2.46|rowspan="7"|GPIO_9|rowspan="7"|CPU.GPIO_9|rowspan="7"|T2|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ESAI_RX_FS
|SD1_WP
|-
|rowspan="7"|J2.48|rowspan="7"|GPIO_16|rowspan="7"|CPU.GPIO_16|rowspan="7"|R2|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ESAI_TX3_RX2
|JTAG_DE_B
|-
|rowspan="6"|J2.50|rowspan="6"|GPIO_17|rowspan="6"|CPU.GPIO_17|rowspan="6"|R1|rowspan="6"|AXEL_IO_3V3|rowspan="6"|IO|rowspan="6"|
|Pin ALT-0
|ESAI_TX0
|GPIO7_IO12
|-
|rowspan="7"|J2.52|rowspan="7"|GPIO_18|rowspan="7"|CPU.GPIO_18|rowspan="7"|P6|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|ESAI_TX1
|SNVS_VIO_5_CTL
|-
|rowspan="7"|J2.54|rowspan="7"|GPIO_19|rowspan="7"|CPU.GPIO_19|rowspan="7"|P5|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|KEY_COL5
|-
|Pin ALT-21
|ENET_1588_EVENT0_OUT
|-
|Pin ALT-32
|SPDIF_OUT
|-
|Pin ALT-43
|CCM_CLKO1
|-
|Pin ALT-54
|ECSPI1_RDY
|-
|Pin ALT-65
|GPIO4_IO05
|-
|????????????Pin ALT-6
|ENET_TX_ER
|-
|
|-
|rowspan="3"|J2.58|rowspan="3"|CSI0_PIXCLK|rowspan="3"|CPU.CSI0_PIXCLK|rowspan="3"|P1|rowspan="3"|AXEL_IO_3V3|rowspan="3"|IO|rowspan="3"|
|Pin ALT-0
|IPU1_CSI0_PIXCLK
|ARM_EVENTO
|-
|rowspan="4"|J2.60|rowspan="4"|CSI0_MCLK|rowspan="4"|CPU.CSI0_MCLK|rowspan="4"|P4|rowspan="4"|AXEL_IO_3V3|rowspan="4"|IO|rowspan="4"|
|Pin ALT-0
|IPU1_CSI0_HSYNC
|ARM_TRACE_CTL
|-
|rowspan="4"|J2.62|rowspan="4"|CSI0_VSYNC|rowspan="4"|CPU.CSI0_VSYNC|rowspan="4"|N2|rowspan="4"|AXEL_IO_3V3|rowspan="4"|IO|rowspan="4"|
|Pin ALT-0
|IPU1_CSI0_VSYNC
|ARM_TRACE00
|-
|rowspan="4"|J2.64|rowspan="4"|CSI0_DATA_EN|rowspan="4"|CPU.CSI0_DATA_EN|rowspan="4"|P3|rowspan="4"|AXEL_IO_3V3|rowspan="4"|IO|rowspan="4"|
|Pin ALT-0
|IPU1_CSI0_DATA_EN
|ARM_TRACE_CLK
|-
|rowspan="87"|J2.66|rowspan="87"|CSI0_DAT4|rowspan="87"|CPU.CSI0_DAT4|rowspan="87"|N1|rowspan="87"|AXEL_IO_3V3|rowspan="87"|IO|rowspan="87"|
|Pin ALT-0
|IPU1_CSI0_DATA04
|Pin ALT-5
|GPIO5_IO22
|-
|Pin ALT-6
|?????????????
|-
|Pin ALT-7
|ARM_TRACE01
|-
|rowspan="7"|J2.68|rowspan="7"|CSI0_DAT5|rowspan="7"|CPU.CSI0_DAT5|rowspan="7"|P2|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|IPU1_CSI0_DATA05
|ARM_TRACE02
|-
|rowspan="7"|J2.70|rowspan="7"|CSI0_DAT6|rowspan="7"|CPU.CSI0_DAT6|rowspan="7"|N4|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|IPU1_CSI0_DATA06
|ARM_TRACE03
|-
|rowspan="7"|J2.72|rowspan="7"|CSI0_DAT7|rowspan="7"|CPU.CSI0_DAT7|rowspan="7"|N3|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|IPU1_CSI0_DATA07
|ARM_TRACE04
|-
|rowspan="7"|J2.74|rowspan="7"|CSI0_DAT8|rowspan="7"|CPU.CSI0_DAT8|rowspan="7"|N6|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|IPU1_CSI0_DATA08
|ARM_TRACE05
|-
|rowspan="7"|J2.76|rowspan="7"|CSI0_DAT9|rowspan="7"|CPU.CSI0_DAT9|rowspan="7"|N5|rowspan="7"|AXEL_IO_3V3|rowspan="7"|IO|rowspan="7"|
|Pin ALT-0
|IPU1_CSI0_DATA09
|ARM_TRACE06
|-
|rowspan="6"|J2.78|rowspan="6"|CSI0_DAT10|rowspan="6"|CPU.CSI0_DAT10|rowspan="6"|M1|rowspan="6"|AXEL_IO_3V3|rowspan="6"|IO|rowspan="6"|
|Pin ALT-0
|IPU1_CSI0_DATA10
|ARM_TRACE07
|-
|rowspan="6"|J2.80|rowspan="6"|CSI0_DAT11|rowspan="6"|CPU.CSI0_DAT11|rowspan="6"|M3|rowspan="6"|AXEL_IO_3V3|rowspan="6"|IO|rowspan="6"|
|Pin ALT-0
|IPU1_CSI0_DATA11
|
|-
| rowspan="4" |J2.124| rowspan="4" |DI0_PIN15| rowspan="4" |CPU.DI0_PIN15| rowspan="4" |N21| rowspan="4" |AXEL_IO_3V3| rowspan="4" |IO|rowspan="4" ||Pin ALT-0|IPU1_DI0_PIN15|-|Pin ALT-1|IPU2_DI0_PIN15
|-
|J2.126|DI0_PIN4|CPU.DI0_PIN4|P25|AXEL_IO_3V3|IO||Pin ALT-2|AUD6_TXC
|-
|J2.128|DI0_PIN3|CPU.DI0_PIN3|N20|AXEL_IO_3V3|IO||Pin ALT-5|GPIO4_IO17
|-
| rowspan="4" |J2.130126|DI0_PIN2rowspan="4" |DI0_PIN4| rowspan="4" |CPU.DI0_PIN2DI0_PIN4|N25rowspan="4" |P25| rowspan="4" |AXEL_IO_3V3| rowspan="4" |IO| rowspan="4" ||Pin ALT-0|IPU1_DI0_PIN04
|-
|J2.132|DI0_DISP_CLK|CPU.DI0_DISP_CLK|N19|AXEL_IO_3V3|IO||Pin ALT-1|IPU2_DI0_PIN04
|-
|J2.134Pin ALT-2|DISP0_DAT0|CPU.DISP0_DAT0|P24|AXEL_IO_3V3|IOAUD6_RXD|-|Pin ALT-5|GPIO4_IO20
|-
| rowspan="4" |J2.136128|DISP0_DAT1rowspan="4" |DI0_PIN3| rowspan="4" |CPU.DISP0_DAT1DI0_PIN3|P22rowspan="4" |N20| rowspan="4" |AXEL_IO_3V3| rowspan="4" |IO| rowspan="4" ||Pin ALT-0|IPU1_DI0_PIN03
|-
|J2.138|DISP0_DAT2|CPU.DISP0_DAT2|P23|AXEL_IO_3V3|IO||Pin ALT-1|IPU2_DI0_PIN03
|-
|J2.140|DISP0_DAT3|CPU.DISP0_DAT3|P21|AXEL_IO_3V3|IO||Pin ALT-2|AUD6_TXFS
|-
|J2.142|DISP0_DAT4|CPU.DISP0_DAT4|P20|AXEL_IO_3V3|IO||Pin ALT-5|GPIO4_IO19
|-
| rowspan="4" |J2.144130|DISP0_DAT5rowspan="4" |DI0_PIN2| rowspan="4" |CPU.DISP0_DAT5DI0_PIN2|R25rowspan="4" |N25| rowspan="4" |AXEL_IO_3V3| rowspan="4" |IO| rowspan="4" ||Pin ALT-0|IPU1_DI0_PIN02
|-
|J2.146|DGND|DGND| Pin ALT-1| -|G|||IPU2_DI0_PIN02
|-
|J2.148|DISP0_DAT6|CPU.DISP0_DAT6|R23|AXEL_IO_3V3|IO||Pin ALT-2|AUD6_TXD
|-
|J2.150|DISP0_DAT7|CPU.DISP0_DAT7|R24|AXEL_IO_3V3|IO||Pin ALT-5|GPIO4_IO18
|-
| rowspan="3" |J2.152132|DISP0_DAT8rowspan="3" |DI0_DISP_CLK| rowspan="3" |CPU.DISP0_DAT8DI0_DISP_CLK|R22rowspan="3" |N19| rowspan="3" |AXEL_IO_3V3| rowspan="3" |IO| rowspan="3" ||Pin ALT-0|IPU1_DI0_DISP_CLK
|-
|J2.154|DISP0_DAT9|CPU.DISP0_DAT9|T25|AXEL_IO_3V3|IO||Pin ALT-1|IPU2_DI0_DISP_CLK
|-
|J2.156|DISP0_DAT10|CPU.DISP0_DAT10|R21|AXEL_IO_3V3|IO||Pin ALT-5|GPIO4_IO16
|-
| rowspan="4" |J2.158134|DISP0_DAT11rowspan="4" |DISP0_DAT0| rowspan="4" |CPU.DISP0_DAT11DISP0_DAT0|T23rowspan="4" |P24| rowspan="4" |AXEL_IO_3V3| rowspan="4" |IO| rowspan="4" ||Pin ALT-0|IPU1_DISP0_DATA00
|-
|J2.160|DISP0_DAT12|CPU.DISP0_DAT12|T24|AXEL_IO_3V3|IO||Pin ALT-1|IPU2_DISP0_DATA00
|-
|J2.162|DISP0_DAT13|CPU.DISP0_DAT13|R20|AXEL_IO_3V3|IO||Pin ALT-2|ECSPI3_SCLK
|-
|J2.164|DGND|DGND| Pin ALT-5| -|G|||GPIO4_IO21
|-
| rowspan="4" |J2.166136|DISP0_DAT14rowspan="4" |DISP0_DAT1| rowspan="4" |CPU.DISP0_DAT14DISP0_DAT1|U25rowspan="4" |P22| rowspan="4" |AXEL_IO_3V3| rowspan="4" |IO| rowspan="4" ||Pin ALT-0|IPU1_DISP0_DATA01
|-
|J2.168|DISP0_DAT15|CPU.DISP0_DAT15|T22|AXEL_IO_3V3|IO||Pin ALT-1|IPU2_DISP0_DATA01
|-
|J2.170|DISP0_DAT16|CPU.DISP0_DAT16|T21|AXEL_IO_3V3|IO||Pin ALT-2|ECSPI3_MOSI
|-
|J2.172|DISP0_DAT17|CPU.DISP0_DAT17|U24|AXEL_IO_3V3|IO||Pin ALT-5|GPIO4_IO22
|-
| rowspan="4" |J2.174138|DISP0_DAT18rowspan="4" |DISP0_DAT2| rowspan="4" |CPU.DISP0_DAT18DISP0_DAT2|V25rowspan="4" |P23| rowspan="4" |AXEL_IO_3V3| rowspan="4" |IO| rowspan="4" ||Pin ALT-0|IPU1_DISP0_DATA02
|-
|J2.176|DISP0_DAT19|CPU.DISP0_DAT19|U23|AXEL_IO_3V3|IO||Pin ALT-1|IPU2_DISP0_DATA02
|-
|J2.178|DISP0_DAT20|CPU.DISP0_DAT20|U22|AXEL_IO_3V3|IO||Pin ALT-2|ECSPI3_MISO
|-
|J2.180|DISP0_DAT21|CPU.DISP0_DAT21|T20|AXEL_IO_3V3|IO||Pin ALT-5|GPIO4_IO23
|-
| rowspan="4" |J2.182140|DISP0_DAT22rowspan="4" |DISP0_DAT3| rowspan="4" |CPU.DISP0_DAT22DISP0_DAT3|V24rowspan="4" |P21| rowspan="4" |AXEL_IO_3V3| rowspan="4" |IO| rowspan="4" ||Pin ALT-0|IPU1_DISP0_DATA03
|-
|Pin ALT-1|IPU2_DISP0_DATA03|-|Pin ALT-2|ECSPI3_SS0|-|Pin ALT-5|GPIO4_IO24|-| rowspan="4" |J2.142| rowspan="4" |DISP0_DAT4| rowspan="4" |CPU.DISP0_DAT4| rowspan="4" |P20| rowspan="4" |AXEL_IO_3V3| rowspan="4" |IO| rowspan="4" ||Pin ALT-0|IPU1_DISP0_DATA04|-|Pin ALT-1|IPU2_DISP0_DATA04|-|Pin ALT-2|ECSPI3_SS1|-|Pin ALT-5|GPIO4_IO25|-| rowspan="5" |J2.184144|DISP0_DAT23rowspan="5" |DISP0_DAT5| rowspan="5" |CPU.DISP0_DAT23DISP0_DAT5|W24rowspan="5" |P24| rowspan="5" |AXEL_IO_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|IPU1_DISP0_DATA05|-|Pin ALT-1|IPU2_DISP0_DATA05|-|Pin ALT-2|ECSPI3_SS2|-|Pin ALT-3|AUD6_RXFS|-|Pin ALT-5|GPIO4_IO26|-|J2.146|DGND|DGND| -| -|G
|
|
|
|-
| rowspan="5" |J2.186148|USB_OTG_VBUSrowspan="5" |DISP0_DAT6| rowspan="5" |CPU.USB_OTG_VBUSDISP0_DAT6|E9rowspan="5" |R23| rowspan="5" |AXEL_IO_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|IPU1_DISP0_DATA06|-|Pin ALT-1|IPU2_DISP0_DATA06
|-
|J2.188|USB_H1_VBUS|CPU.USB_H1_VBUS|D10||||Pin ALT-2|ECSPI3_SS3
|-
|J2.190|DGND|DGND| Pin ALT-3| - |G|||AUD6_RXC
|-
|J2.192|ENET_RX_ER|CPU.ENET_RX_ER|W23|VCC_ENET_1V8|IO|This pin is 1V8 tolerant (i.e. must be connected to a 1V8 power domain)|Pin ALT-5|GPIO4_IO27
|-
| rowspan="4" |J2.150| rowspan="4" |DISP0_DAT7| rowspan="4" |CPU.DISP0_DAT7| rowspan="4" |R24| rowspan="4" |AXEL_IO_3V3| rowspan="4" |IO| rowspan="4" ||Pin ALT-0|IPU1_DISP0_DATA07|-|Pin ALT-1|IPU2_DISP0_DATA07|-|Pin ALT-2|ECSPI3_RDY|-|Pin ALT-5|GPIO4_IO28|-| rowspan="5" |J2.152| rowspan="5" |DISP0_DAT8| rowspan="5" |CPU.DISP0_DAT8| rowspan="5" |R22| rowspan="5" |AXEL_IO_3V3| rowspan="5" |IO| rowspan="5" ||Pin ALT-0|IPU1_DISP0_DATA08|-|Pin ALT-1|IPU2_DISP0_DATA08|-|Pin ALT-2|PWM1_OUT|-|Pin ALT-3|WDOG1_B|-|Pin ALT-5|GPIO4_IO29|-| rowspan="5" |J2.194154|ENET_RXD0rowspan="5" |DISP0_DAT9| rowspan="5" |CPU.ENET_RXD0DISP0_DAT9|W21rowspan="5" |T25|VCC_ENET_1V8rowspan="5" |AXEL_IO_3V3| rowspan="5" |IO|This pin is 1V8 tolerant (irowspan="5" ||Pin ALT-0|IPU1_DISP0_DATA09|-|Pin ALT-1|IPU2_DISP0_DATA09|-|Pin ALT-2|PWM2_OUT|-|Pin ALT-3|WDOG2_B|-|Pin ALT-5|GPIO4_IO30|-| rowspan="3" |J2.e156| rowspan="3" |DISP0_DAT10| rowspan="3" |CPU. must be connected to a 1V8 power domain)DISP0_DAT10| rowspan="3" |R21| rowspan="3" |AXEL_IO_3V3| rowspan="3" |IO| rowspan="3" ||Pin ALT-0|IPU1_DISP0_DATA10|-|Pin ALT-1|IPU2_DISP0_DATA10|-|Pin ALT-5|GPIO4_IO31|-| rowspan="3" |J2.158| rowspan="3" |DISP0_DAT11| rowspan="3" |CPU.DISP0_DAT11| rowspan="3" |T23| rowspan="3" |AXEL_IO_3V3| rowspan="3" |IO| rowspan="3" ||Pin ALT-0|IPU1_DISP0_DATA11|-|Pin ALT-1|IPU2_DISP0_DATA11|-|Pin ALT-5|GPIO5_IO05|-| rowspan="3" |J2.160| rowspan="3" |DISP0_DAT12| rowspan="3" |CPU.DISP0_DAT12| rowspan="3" |T24| rowspan="3" |AXEL_IO_3V3| rowspan="3" |IO| rowspan="3" ||Pin ALT-0|IPU1_DISP0_DATA12|-|Pin ALT-1|IPU2_DISP0_DATA12|-|Pin ALT-5|GPIO5_IO06|-| rowspan="4" |J2.162| rowspan="4" |DISP0_DAT13| rowspan="4" |CPU.DISP0_DAT13| rowspan="4" |R20| rowspan="4" |AXEL_IO_3V3| rowspan="4" |IO| rowspan="4" ||Pin ALT-0|IPU1_DISP0_DATA13|-|Pin ALT-1|IPU2_DISP0_DATA13|-|Pin ALT-3|AUD5_RXFS|-|Pin ALT-5|GPIO5_IO07|-|J2.164|DGND|DGND| -| -|G|
|
|
|-
| rowspan="4" |J2.166
| rowspan="4" |DISP0_DAT14
| rowspan="4" |CPU.DISP0_DAT14
| rowspan="4" |U25
| rowspan="4" |AXEL_IO_3V3
| rowspan="4" |IO
| rowspan="4" |
|Pin ALT-0
|IPU1_DISP0_DATA14
|-
|Pin ALT-1
|IPU2_DISP0_DATA14
|-
|Pin ALT-3
|AUD5_RXC
|-
|Pin ALT-5
|GPIO5_IO08
|-
| rowspan="5" |J2.168
| rowspan="5" |DISP0_DAT15
| rowspan="5" |CPU.DISP0_DAT15
| rowspan="5" |T22
| rowspan="5" |AXEL_IO_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|IPU1_DISP0_DATA15
|-
|Pin ALT-1
|IPU2_DISP0_DATA15
|-
|Pin ALT-2
|ECSPI1_SS1
|-
|Pin ALT-3
|ECSPI2_SS1
|-
|Pin ALT-5
|GPIO5_IO09
|-
| rowspan="6" |J2.170
| rowspan="6" |DISP0_DAT16
| rowspan="6" |CPU.DISP0_DAT16
| rowspan="6" |T21
| rowspan="6" |AXEL_IO_3V3
| rowspan="6" |IO
| rowspan="6" |
|Pin ALT-0
|IPU1_DISP0_DATA16
|-
|Pin ALT-1
|IPU2_DISP0_DATA16
|-
|Pin ALT-2
|ECSPI2_MOSI
|-
|Pin ALT-3
|AUD5_TXC
|-
|Pin ALT-4
|SDMA_EXT_EVENT0
|-
|Pin ALT-5
|GPIO5_IO10
|-
| rowspan="6" |J2.172
| rowspan="6" |DISP0_DAT17
| rowspan="6" |CPU.DISP0_DAT17
| rowspan="6" |U24
| rowspan="6" |AXEL_IO_3V3
| rowspan="6" |IO
| rowspan="6" |
|Pin ALT-0
|IPU1_DISP0_DATA17
|-
|Pin ALT-1
|IPU2_DISP0_DATA17
|-
|Pin ALT-2
|ECSPI2_MISO
|-
|Pin ALT-3
|AUD5_TXD
|-
|Pin ALT-4
|SDMA_EXT_EVENT1
|-
|Pin ALT-5
|GPIO5_IO11
|-
| rowspan="6" |J2.174
| rowspan="6" |DISP0_DAT18
| rowspan="6" |CPU.DISP0_DAT18
| rowspan="6" |V25
| rowspan="6" |AXEL_IO_3V3
| rowspan="6" |IO
| rowspan="6" |
|Pin ALT-0
|IPU1_DISP0_DATA18
|-
|Pin ALT-1
|IPU2_DISP0_DATA18
|-
|Pin ALT-2
|ECSPI2_SS0
|-
|Pin ALT-3
|AUD5_TXFS
|-
|Pin ALT-4
|AUD4_RXFS
|-
|Pin ALT-5
|GPIO5_IO12
|-
| rowspan="6" |J2.176
| rowspan="6" |DISP0_DAT19
| rowspan="6" |CPU.DISP0_DAT19
| rowspan="6" |U23
| rowspan="6" |AXEL_IO_3V3
| rowspan="6" |IO
| rowspan="6" |
|Pin ALT-0
|IPU1_DISP0_DATA19
|-
|Pin ALT-1
|IPU2_DISP0_DATA19
|-
|Pin ALT-2
|ECSPI2_SCLK
|-
|Pin ALT-3
|AUD5_RXD
|-
|Pin ALT-4
|AUD4_RXC
|-
|Pin ALT-5
|GPIO5_IO13
|-
| rowspan="5" |J2.178
| rowspan="5" |DISP0_DAT20
| rowspan="5" |CPU.DISP0_DAT20
| rowspan="5" |U22
| rowspan="5" |AXEL_IO_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|IPU1_DISP0_DATA20
|-
|Pin ALT-1
|IPU2_DISP0_DATA20
|-
|Pin ALT-2
|ECSPI1_SCLK
|-
|Pin ALT-3
|AUD4_TXC
|-
|Pin ALT-5
|GPIO5_IO14
|-
| rowspan="5" |J2.180
| rowspan="5" |DISP0_DAT21
| rowspan="5" |CPU.DISP0_DAT21
| rowspan="5" |T20
| rowspan="5" |AXEL_IO_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|IPU1_DISP0_DATA21
|-
|Pin ALT-1
|IPU2_DISP0_DATA21
|-
|Pin ALT-2
|ECSPI1_MOSI
|-
|Pin ALT-3
|AUD4_TXD
|-
|Pin ALT-5
|GPIO5_IO15
|-
| rowspan="5" |J2.182
| rowspan="5" |DISP0_DAT22
| rowspan="5" |CPU.DISP0_DAT22
| rowspan="5" |V24
| rowspan="5" |AXEL_IO_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|IPU1_DISP0_DATA22
|-
|Pin ALT-1
|IPU2_DISP0_DATA22
|-
|Pin ALT-2
|ECSPI1_MISO
|-
|Pin ALT-3
|AUD4_TXFS
|-
|Pin ALT-5
|GPIO5_IO16
|-
| rowspan="5" |J2.184
| rowspan="5" |DISP0_DAT23
| rowspan="5" |CPU.DISP0_DAT23
| rowspan="5" |W24
| rowspan="5" |AXEL_IO_3V3
| rowspan="5" |IO
| rowspan="5" |
|Pin ALT-0
|IPU1_DISP0_DATA23
|-
|Pin ALT-1
|IPU2_DISP0_DATA23
|-
|Pin ALT-2
|ECSPI1_SS0
|-
|Pin ALT-3
|AUD4_RXD
|-
|Pin ALT-5
|GPIO5_IO17
|-
|J2.186
|USB_OTG_VBUS
|CPU.USB_OTG_VBUS
|E9
|
|
|
|
|
|-
|J2.188
|USB_H1_VBUS
|CPU.USB_H1_VBUS
|D10
|
|
|
|
|
|-
|J2.190
|DGND
|DGND
| -
| -
|G
|
|
|
|-
| rowspan="6" |J2.192
| rowspan="6" |ENET_RX_ER
| rowspan="6" |CPU.ENET_RX_ER
| rowspan="6" |W23
| rowspan="6" |VCC_ENET_1V8
| rowspan="6" |IO
| rowspan="6" |This pin is 1V8 tolerant (i.e. must be connected to a 1V8 power domain)
|Pin ALT-0
|USB_OTG_ID
|-
|Pin ALT-1
|ENET_RX_ER
|-
|Pin ALT-2
|ESAI_RX_HF_CLK
|-
|Pin ALT-3
|SPDIF_IN
|-
|Pin ALT-4
|ENET_1588_EVENT2_OUT
|-
|Pin ALT-5
|GPIO1_IO24
 
|-
| rowspan="4" |J2.194
| rowspan="4" |ENET_RXD0
| rowspan="4" |CPU.ENET_RXD0
| rowspan="4" |W21
| rowspan="4" |VCC_ENET_1V8
| rowspan="4" |IO
| rowspan="4" |This pin is 1V8 tolerant (i.e. must be connected to a 1V8 power domain)
|Pin ALT-1
|ENET_RX_DATA0
|-
|Pin ALT-2
|ESAI_TX_HF_CLK
|-
|Pin ALT-3
|SPDIF_OUT
|-
|Pin ALT-5
|GPIO1_IO27
|-
|J2.196
U0007
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