Difference between revisions of "ETRA SOM/ETRA Hardware/Peripherals/GPIOs"
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! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History | ! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History | ||
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date | ||
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes | ||
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__FORCETOC__ | __FORCETOC__ | ||
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=== Description === | === Description === | ||
| − | The primary GPIOs interface available on ETRA | + | The primary GPIOs interface available on ETRA SoM is based on STM32MP1 SoC. |
The STM32MP1 GPIO ports supports the following standards and features: | The STM32MP1 GPIO ports supports the following standards and features: | ||
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* external interrupt capability (unavailable in analog mode) | * external interrupt capability (unavailable in analog mode) | ||
A secondary GPIOs interface available on ETRA SoM is based on ADP5589 I/O expander. This expander is controlled by an internal I2C BUS. | A secondary GPIOs interface available on ETRA SoM is based on ADP5589 I/O expander. This expander is controlled by an internal I2C BUS. | ||
| + | |||
| + | The ADP5589 GPIO ports supports the following standards and features: | ||
| + | * output states: push-pull or open drain + pull-up/down | ||
| + | * input states: floating, pull-up/down, IRQ | ||
| + | * keypad decoding for matrix up to 11 × 8 | ||
| + | * key press/release interrupts | ||
| + | * dual programmable logic blocks | ||
| + | * PWM generator | ||
| + | * clock divider | ||
| + | * reset generators | ||
===Pin mapping=== | ===Pin mapping=== | ||
Revision as of 14:52, 30 December 2020
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| Version | Issue Date | Notes | |
| 0.9.0 | Dec 2020 | First Draft | |
| [TBD_link X.Y.Z] | Month Year | TBD | |
| ... | ... | ... | |
Peripheral GPIOs[edit | edit source]
The general-purpose input/output (GPIO) peripheral provides dedicated general-purpose pins that can be configured as either inputs or outputs.
Description[edit | edit source]
The primary GPIOs interface available on ETRA SoM is based on STM32MP1 SoC.
The STM32MP1 GPIO ports supports the following standards and features:
- output states: push-pull or open drain + pull-up/down
- speed selection for each I/O
- input states: floating, pull-up/down, analog
- bit set and reset register for atomic read/modify access
- analog function
- fast toggle capable of changing every two clock cycles
- external interrupt capability (unavailable in analog mode)
A secondary GPIOs interface available on ETRA SoM is based on ADP5589 I/O expander. This expander is controlled by an internal I2C BUS.
The ADP5589 GPIO ports supports the following standards and features:
- output states: push-pull or open drain + pull-up/down
- input states: floating, pull-up/down, IRQ
- keypad decoding for matrix up to 11 × 8
- key press/release interrupts
- dual programmable logic blocks
- PWM generator
- clock divider
- reset generators
Pin mapping[edit | edit source]
The Pin mapping is described in the Pinout table section
