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| − | <section begin="History" />
| + | {{ImportantMessage|text=This information is in common between [[MITO 8M Mini SOM|MITO 8M Mini]] and [[MITO 8M Nano SOM|MITO 8M Nano]]}} |
| − | {| style="border-collapse:collapse; " | + | {{:MITO 8M Mini SOM/MITO 8M Mini Hardware/General Information/Processor and memory subsystem}} |
| − | ! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
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| − | |-
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| − | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
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| − | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
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| − | |-
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| − | | style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|13164|2021/02/24}}
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| − | | style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | First release
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| − | |-
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| − | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | 2022/10/07
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| − | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | Added Solo version
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| − | |}
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| − | <section end="History" />
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| − | <section begin="Body" />
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| − | | |
| − | == Processor and memory subsystem ==
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| − | | |
| − | The heart of MITO 8M Nano module is composed by the following components:
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| − | *i.MX8M Nano SoC application processor
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| − | * Power supply unit
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| − | * LPDDR4 memory bank
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| − | * eMMC or NAND flash banks
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| − | * Connectors:
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| − | ** 1 x 204 pins SO-DIMM edge connector with interfaces signals
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| − | *** partially compatible with [[AXEL Lite SOM]]
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| − | | |
| − | This chapter shortly describes the main MITO 8M Nano components.
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| − | | |
| − | === Processor Info ===
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| − | | |
| − | {| class="wikitable" |
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| − | | align="center" style="background:#f0f0f0;" |'''Processor'''
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| − | | align="center" style="background:#f0f0f0;" |'''i.MX8M Nano Solo'''
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| − | | align="center" style="background:#f0f0f0;" |'''i.MX8M Nano Dual'''
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| − | | align="center" style="background:#f0f0f0;" |'''i.MX8M Nano Quad'''
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| − | |-
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| − | |# Cores
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| − | |1x Arm® Cortex®-A53
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| − | 1x Arm® Cortex®-M7
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| − | |2x Arm® Cortex®-A53
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| − | 1x Arm® Cortex®-M7
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| − | |4x Arm® Cortex®-A53
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| − | 1x Arm® Cortex®-M7
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| − | |-
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| − | |Clock|| colspan="3" |1.4 GHz (Industrial)<br>1.5 GHz (Commercial)
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| − | |-
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| − | |L2
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| − | Cache
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| − | | colspan="3" |1 MB
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| − | |-
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| − | |LPDDR4
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| − | | colspan="3" |16 bit @ 1600 MHz
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| − | (LPDDR4-3200)
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| − | |-
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| − | |GPU
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| − | | colspan="3" |Vivante GC 7000UL (2 Shader)
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| − | OpenGL ES 3.1<br>Vulkan<br>Open VG 1.1<br>Open CL 1.2
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| − | |-
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| − | |Display
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| − | Controller
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| − | | colspan="3" |Dual Independent LVDS channel
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| − | Display Support
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| − | up to 1080p60
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| − | |-
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| − | |Video
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| − | Output
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| − | | colspan="3" |1x MIPI-DSI (with MIPI to LVDS bridge)
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| − | |-
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| − | |Camera
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| − | Input
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| − | | colspan="3" |1x MIPI CSI (4-lanes)
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| − | |-
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| − | |USB
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| − | | colspan="3" |2x USB 2.0 OTG
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| − | |-
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| − | |+ align="bottom" style="caption-side: bottom" | Table: i.MX8M Nano models comparison
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| − | |}
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| − | | |
| − | === RAM memory bank ===
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| − | | |
| − | LPDD4 SDRAM memory bank is composed by 1x 16-bit width chip. The following table reports the SDRAM specifications:
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| − | | |
| − | {| class="wikitable" |
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| − | |-
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| − | | '''CPU connection'''||Multi-mode DDR controller (MMDC)
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| − | |-
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| − | | '''Size max'''||4 GB
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| − | |-
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| − | | '''Width'''||16 bit
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| − | |-
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| − | | '''Speed'''||1600 MHz
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| − | |-
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| − | |}
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| − | | |
| − | === eMMC flash bank ===
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| − | | |
| − | On board main storage memory eMMC is connected to the SDIO1 interface and it can act as boot peripheral. The following table reports the eMMC flash specifications:
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| − | | |
| − | {| class="wikitable" | | |
| − | |-
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| − | | '''CPU connection'''||SDIO1
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| − | |-
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| − | | '''Size min'''||4 GB
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| − | |-
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| − | | '''Size max'''||64 GB
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| − | |-
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| − | | '''Bootable'''||Yes
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| − | |-
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| − | |}
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| − | | |
| − | === NAND flash bank ===
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| − | {| style="color:#000000; border:solid 2px #73B2C7; background-color:#ededed;font-size:95%; vertical-align:middle;" | |
| − | | [[File:TBD.png|30px]]
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| − | | '''Not available yet'''
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| − | |}
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| − | | |
| − | Alternative option for main storage memory can be a 8-bit wide NAND flash connected to the CPU's Raw NAND flash controller. It can act as boot peripheral. The following table reports the NAND flash specifications:
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| − | | |
| − | {| class="wikitable" |
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| − | |-
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| − | | '''CPU connection'''||Raw NAND flash controller
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| − | |-
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| − | | '''Page size'''|| 512 byte, 2 kbyte or 4 kbyte
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| − | |-
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| − | | '''Size min'''||512MB
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| − | |-
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| − | | '''Size max'''||2GB
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| − | |-
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| − | | '''Width'''||8 bit
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| − | |-
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| − | | '''Chip select'''||NANC_CE0
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| − | |-
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| − | | '''Bootable'''||Yes
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| − | |-
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| − | |}
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| − | | |
| − | === Memory map ===
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| − | | |
| − | For detailed information, please refer to chapter 2 “Memory Maps” of the [https://www.nxp.com/webapp/Download?colCode=IMX8MNRM i.MX8M Nano Applications Processor Reference Manual]
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| − | | |
| − | === Power supply unit ===
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| − | | |
| − | MITO 8M Nano embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the ranges power supply can assume as well as all other parameters.
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| − | | |
| − | ----
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| − | | |
| − | [[Category:MITO 8M Nano]]
| |
| History
|
| Issue Date
|
Notes
|
|
2021/02/24
|
First release
|
| 2022/10/07
|
Added Solo version
|
Processor and memory subsystem[edit | edit source]
The heart of MITO 8M Mini module is composed by the following components:
- i.MX8M Mini SoC application processor
- Power supply unit
- LPDDR4 memory bank
- eMMC or NAND flash banks
- Connectors:
- 1 x 204 pins SO-DIMM edge connector with interfaces signals
This chapter shortly describes the main MITO 8M Mini components.
| Processor
|
i.MX8M Mini Solo
|
i.MX8M Mini Dual
|
i.MX8M Mini Quad
|
| # Cores
|
1x Arm® Cortex®-A53
1x Arm® Cortex®-M4
|
2x Arm® Cortex®-A53
1x Arm® Cortex®-M4
|
4x Arm® Cortex®-A53
1x Arm® Cortex®-M4
|
| Clock |
1.6 GHz (Industrial)
1.8 GHz (Commercial)
|
| L2
Cache
|
1 MB
|
| LPDDR4
|
32 bit @ 1600 MHz
(LPDDR4-3200)
|
| GPU
|
3D: Vivante GC NanoUltra (1 Shader)
2D: Vivante GC320
OpenGL ES 2.0
Open CL 1.2
|
| VPU
|
1080p60 HEVC/H.264, VP8, VP9, H.265 decoder
1080p60 H.264, VP8 encoder
|
| Display
Controller
|
Dual Independent LVDS channel
Display Support
up to 1080p60
|
| Video
Output
|
1x MIPI-DSI (with MIPI to LVDS bridge)
|
| Camera
Input
|
1x MIPI CSI (4-lanes)
|
| PCIe
|
1x PCIe 2.1 (1-lane)
|
| USB
|
2x USB 2.0 OTG
|
Table: i.MX8M Mini models comparison
LPDD4 SDRAM memory bank is composed by 1x 32-bit width chip. The following table reports the SDRAM specifications:
| CPU connection |
Multi-mode DDR controller (MMDC)
|
| Size max |
4 GB
|
| Width |
32 bit
|
| Speed |
1600 MHz
|
On board main storage memory eMMC is connected to the SDIO1 interface and it can act as boot peripheral. The following table reports the eMMC flash specifications:
| CPU connection |
SDIO1
|
| Size min |
4 GB
|
| Size max |
64 GB
|
| Bootable |
Yes
|
|
Not available yet
|
Alternative option for main storage memory can be a 8-bit wide NAND flash connected to the CPU's Raw NAND flash controller. It can act as boot peripheral. The following table reports the NAND flash specifications:
| CPU connection |
Raw NAND flash controller
|
| Page size |
512 byte, 2 kbyte or 4 kbyte
|
| Size min |
512MB
|
| Size max |
2GB
|
| Width |
8 bit
|
| Chip select |
NAND_CE0
|
| Bootable |
Yes
|
For detailed information, please refer to chapter 2 “Memory Maps” of the i.MX8M Mini Applications Processor Reference Manual
MITO 8M Mini embeds all the elements required for powering the unit, therefore power sequencing is self-contained and simplified. Nevertheless, power must be provided from carrier board, and therefore users should be aware of the ranges power supply can assume as well as all other parameters.
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