Difference between revisions of "ETRA SOM/ETRA Hardware/Pinout Table"

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(Alternate function for ODD pins)
(20 intermediate revisions by 2 users not shown)
Line 3: Line 3:
 
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
 
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
 
|-  
 
|-  
 +
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Version
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
 
|-
 
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|13190|2020/12/31}}
+
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |X.Y.Z
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |First release
+
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Month Year
 +
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |TBD
 
|-
 
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|18542|2023/06/09}}
 
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Pinout update
 
 
|-
 
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|18979|2023/11/23}}
+
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |[TBD_link X.Y.Z]
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Pinout update
+
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Month Year
 +
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |TBD
 
|-
 
|-
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |2023/11/28
+
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |...
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |Add pinmux spreadsheet download
+
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |...
 +
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |...
 
|-
 
|-
 
|}
 
|}
 +
<section end="History" />
 +
<section begin="Body" />
 +
''TBD:  modificare la tabella seguente con le caratteristiche dei pin del SOM''
 +
 +
''TBD:  modificare le due tabelle ODD e EVEN con la mappa completa dei pins''
 +
 +
'''TBD:  nella tabella naming conventions,  inserire il codice dei vari IC presenti (PMIC, PHY ETH, ecc.)'''
  
<section end="History" /><section begin="Body" /><section end="History" /><section begin="Body" />
 
 
==Connectors and Pinout Table==
 
==Connectors and Pinout Table==
  
 
=== Connectors description ===
 
=== Connectors description ===
In the following table are described all available connectors integrated on [[ETRA SOM]]:
+
In the following table are described all available connectors integrated on [[ETRA]]:
 
{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
Line 39: Line 47:
 
The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:
 
The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:
  
[[File:ETRA_SOM_-_top_pin1_203.png|500px|thumb|ETRA TOP view|none]]
+
[[File:ETRA-top.png|500px|thumb|ETRA TOP view|none]]
[[File:ETRA_SOM_-_bottom_pin2_204.png|500px|thumb|ETRA BOTTOM view|none]]
+
[[File:ETRA-bottom.png|500px|thumb|ETRA BOTTOM view|none]]
  
 
===Pinout table naming conventions ===
 
===Pinout table naming conventions ===
  
This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the SODIMM-DDR3 edge connector.
+
This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the ''TBD: connector type'' ETRA connector.
  
 
Each row in the pinout tables contains the following information:
 
Each row in the pinout tables contains the following information:
Line 92: Line 100:
 
|-
 
|-
 
|}
 
|}
 
===Pinout table XLS file ===
 
For your convenience, please find a spreadsheet with the STM32MP15x pinout and pinmux table [https://www.dave.eu/links/p/2hxFRECdQPg6uJOy here].
 
  
 
==Pinout Table ODD pins declaration ==
 
==Pinout Table ODD pins declaration ==
Line 179: Line 184:
 
|-
 
|-
 
|J1.15
 
|J1.15
| VINTLDO
+
| -
|PMIC.INTLDO
+
|NC
|40
+
| -
|INTLDO
+
| -
|S
+
| -
|do not connect
+
|
 
|
 
|
 
|
 
|
Line 269: Line 274:
 
|-
 
|-
 
|J1.33
 
|J1.33
|ETH_INT
+
| -
|LAN.INTRP
+
|NC
|18
+
| -
|VDD
+
| -
|O
+
| -
|open drain with internal pull-up to VDD
+
|
 
|
 
|
 
|
 
|
Line 285: Line 290:
 
|G
 
|G
 
|
 
|
|
 
|
 
|-
 
|J1.37
 
(NAND on board)
 
|PD1
 
|CPU.PD1
 
|A4
 
|VDD
 
|I/O
 
|internally used for NAND flash,
 
do not connect
 
 
|
 
|
 
|
 
|
Line 336: Line 329:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|J1.39
 
(NAND on board)
 
|PD4
 
|CPU.PD4
 
|D6
 
|VDD
 
|I/O
 
|internally used for NAND flash,
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="6" |J1.39
 
| rowspan="6" |J1.39
Line 355: Line 336:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
| rowspan="6" |
+
| rowspan="6" |TBD
 
|Pin AF6
 
|Pin AF6
 
|SAI3_FS_A
 
|SAI3_FS_A
Line 373: Line 354:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|J1.41
 
(NAND on board)
 
|PD5
 
|CPU.PD5
 
|D7
 
|VDD
 
|I/O
 
|internally used for NAND flash,
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="4" |J1.41
 
| rowspan="4" |J1.41
Line 392: Line 361:
 
| rowspan="4" |VDD
 
| rowspan="4" |VDD
 
| rowspan="4" |I/O
 
| rowspan="4" |I/O
| rowspan="4" |
+
| rowspan="4" |TBD
 
|Pin AF7
 
|Pin AF7
 
|USART2_TX
 
|USART2_TX
Line 411: Line 380:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
| rowspan="9" |
+
| rowspan="9" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED6
 
|TRACED6
Line 439: Line 408:
 
|EVENTOUT
 
|EVENTOUT
 
|-
 
|-
|J1.45
+
| rowspan="10" |J1.45
 
+
| rowspan="10" |PD0
(NAND on board)
+
| rowspan="10" |CPU.PD0
|PD0
 
|CPU.PD0
 
|A3
 
|VDD
 
|I/O
 
|internally used for NAND flash,
 
 
 
do not connect
 
|
 
|
 
|-
 
| rowspan="10" |J1.45
 
| rowspan="10" |PD0
 
| rowspan="10" |CPU.PD0
 
 
| rowspan="10" |A3
 
| rowspan="10" |A3
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
| rowspan="10" |
+
| rowspan="10" |TBD
 
|Pin AF2
 
|Pin AF2
 
|I2C6_SDA
 
|I2C6_SDA
Line 496: Line 451:
 
| rowspan="8" |VDD
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |I/O
| rowspan="8" |
+
| rowspan="8" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED7
 
|TRACED7
Line 520: Line 475:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|J1.49
 
(NOR on board)
 
|PF10
 
|CPU.PF10
 
|U9
 
|VDD
 
|I/O
 
|internally used for NOR flash,
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="9" |J1.49
 
| rowspan="9" |J1.49
Line 539: Line 482:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
| rowspan="9" |
+
| rowspan="9" |TBD
 
|Pin AF1
 
|Pin AF1
 
|TIM16_BKIN
 
|TIM16_BKIN
Line 566: Line 509:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|J1.51
 
(NAND on board)
 
|PE7
 
|CPU.PE7
 
|T10
 
|VDD
 
|I/O
 
|internally used for NAND flash,
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="7" |J1.51
 
| rowspan="7" |J1.51
Line 585: Line 516:
 
| rowspan="7" |VDD
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |I/O
| rowspan="7" |
+
| rowspan="7" |TBD
 
|Pin AF1
 
|Pin AF1
 
|TIM1_ETR
 
|TIM1_ETR
Line 606: Line 537:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|J1.53
 
(NAND on board)
 
|PE8
 
|CPU.PE8
 
|T11
 
|VDD
 
|I/O
 
|internally used for NAND flash,
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="6" |J1.53
 
| rowspan="6" |J1.53
Line 625: Line 544:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
| rowspan="6" |
+
| rowspan="6" |TBD
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH1N
 
|TIM1_CH1N
Line 645: Line 564:
 
|-
 
|-
 
|J1.55
 
|J1.55
|NOR_WP#
+
| -
|NOR.WPn
+
|NC
|C4
+
| -
|VDD
+
| -
|I/O
+
| -
|internal pull-up to VDD,
+
|
this NOR pin is shared with QSPI_IO2 function
 
 
|
 
|
 
|
 
|
Line 672: Line 590:
 
| -
 
| -
 
|
 
|
|
 
|
 
|-
 
|J1.61
 
(eMMC on board)
 
|PB14
 
|CPU.PB14
 
|C9
 
|VDD
 
|I/O
 
|internally used for eMMC flash,
 
do not connect
 
 
|
 
|
 
|
 
|
Line 693: Line 599:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
| rowspan="9" |
+
| rowspan="9" |TBD
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH2N
 
|TIM1_CH2N
Line 721: Line 627:
 
|EVENTOUT
 
|EVENTOUT
 
|-
 
|-
|J1.63
+
| rowspan="9" |J1.63
 
 
(eMMC on board)
 
|PB15
 
|CPU.PB15
 
|A8
 
|VDD
 
|I/O
 
|internally used for eMMC flash,
 
 
 
do not connect
 
|
 
|
 
|-
 
| rowspan="9" |J1.63
 
 
| rowspan="9" |PB15
 
| rowspan="9" |PB15
 
| rowspan="9" |CPU.PB15
 
| rowspan="9" |CPU.PB15
Line 741: Line 633:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
| rowspan="9" |
+
| rowspan="9" |TBD
 
|Pin AF0
 
|Pin AF0
 
|RTC_REFIN
 
|RTC_REFIN
Line 768: Line 660:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|J1.65
 
 
(eMMC on board)
 
|PB3
 
|CPU.PB3
 
|A7
 
|VDD
 
|I/O
 
|internally used for eMMC flash,
 
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="10" |J1.65
 
| rowspan="10" |J1.65
Line 789: Line 667:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
| rowspan="10" |
+
| rowspan="10" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED9
 
|TRACED9
Line 819: Line 697:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|J1.67
 
 
(eMMC on board)
 
|PB4
 
|CPU.PB4
 
|B9
 
|VDD
 
|I/O
 
|internally used for eMMC flash,
 
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="12" |J1.67
 
| rowspan="12" |J1.67
Line 840: Line 704:
 
| rowspan="12" |VDD
 
| rowspan="12" |VDD
 
| rowspan="12" |I/O
 
| rowspan="12" |I/O
| rowspan="12" |
+
| rowspan="12" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED8
 
|TRACED8
Line 876: Line 740:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|J1.69
 
(eMMC on board)
 
|PG6
 
|CPU.PG6
 
|A6
 
|VDD
 
|I/O
 
|internally used for eMMC flash,
 
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="6" |J1.69
 
| rowspan="6" |J1.69
Line 896: Line 747:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
| rowspan="6" |
+
| rowspan="6" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED14
 
|TRACED14
Line 914: Line 765:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|J1.71
 
(eMMC on board)
 
|PE3
 
|CPU.PE3
 
|A5
 
|VDD
 
|I/O
 
|internally used for eMMC flash,
 
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="6" |J1.71
 
| rowspan="6" |J1.71
Line 934: Line 772:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
| rowspan="6" |
+
| rowspan="6" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED0
 
|TRACED0
Line 969: Line 807:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
| rowspan="9" |
+
| rowspan="9" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED0
 
|TRACED0
Line 1,003: Line 841:
 
| rowspan="11" |VDD
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |I/O
| rowspan="11" |
+
| rowspan="11" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED1
 
|TRACED1
Line 1,043: Line 881:
 
| rowspan="13" |VDD
 
| rowspan="13" |VDD
 
| rowspan="13" |I/O
 
| rowspan="13" |I/O
| rowspan="13" |for LCD_G1 function
+
| rowspan="13" |TBD
use pin J1.180
 
 
 
(RGB lenght match)
 
 
|Pin AF0
 
|Pin AF0
 
|TRACED2
 
|TRACED2
Line 1,080: Line 915:
 
|DCMI_D7
 
|DCMI_D7
 
|-
 
|-
|<s>Pin AF14</s>
+
|Pin AF14
|<s>LCD_G1</s>
+
|LCD_G1
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
Line 1,092: Line 927:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
| rowspan="10" |
+
| rowspan="10" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED3
 
|TRACED3
Line 1,129: Line 964:
 
| rowspan="7" |VDD
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |I/O
| rowspan="7" |
+
| rowspan="7" |TBD
 
|Pin AF2
 
|Pin AF2
 
|TIM3_ETR
 
|TIM3_ETR
Line 1,157: Line 992:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
| rowspan="10" |
+
| rowspan="10" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACECLK
 
|TRACECLK
Line 1,204: Line 1,039:
 
| rowspan="7" |VDD
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |I/O
| rowspan="7" |
+
| rowspan="7" |TBD
 
|Pin AF3
 
|Pin AF3
 
|DFSDM1_CKIN3
 
|DFSDM1_CKIN3
Line 1,232: Line 1,067:
 
| rowspan="7" |VDD
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |I/O
| rowspan="7" |
+
| rowspan="7" |TBD
 
|Pin AF3
 
|Pin AF3
 
|DFSDM1_DATIN3
 
|DFSDM1_DATIN3
Line 1,254: Line 1,089:
 
|EVENTOUT
 
|EVENTOUT
 
|-
 
|-
|J1.93
+
| rowspan="6" |J1.93
(I/O EXP on board)
+
| rowspan="6" |PC2
|PC2
+
| rowspan="6" |CPU.PC2
|CPU.PC2
+
| rowspan="6" |T2
|T2
+
| rowspan="6" |VDD
|VDD
+
| rowspan="6" |I/O
|I/O
+
| rowspan="6" |TBD
|internally used for I/O EXP,
 
 
 
do not connect
 
|
 
|
 
|-
 
| rowspan="7" |J1.93
 
| rowspan="7" |PC2
 
| rowspan="7" |CPU.PC2
 
| rowspan="7" |T2
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |
 
 
|Pin AF3
 
|Pin AF3
 
|DFSDM1_CKIN1
 
|DFSDM1_CKIN1
Line 1,296: Line 1,118:
 
|EVENTOUT
 
|EVENTOUT
 
|-
 
|-
|Additional
+
| rowspan="10" |J1.95
functions
+
| rowspan="10" |PA0
|ADC1_INP12
+
| rowspan="10" |CPU.PA0
 
+
| rowspan="10" |R3
ADC1_INN11
+
| rowspan="10" |VDD
|-
+
| rowspan="10" |I/O
|J1.95
+
| rowspan="10" |TBD
|PA0
 
|CPU.PA0
 
|R3
 
|VDD
 
|I/O
 
|internally used for PMIC,
 
 
 
do not connect
 
|
 
|
 
|-
 
| rowspan="11" |J1.97
 
| rowspan="11" |PD13
 
| rowspan="11" |CPU.PD13
 
| rowspan="11" |U12
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |
 
 
|Pin AF1
 
|Pin AF1
|LPTIM1_OUT
+
|TIM2_CH1/TIM2_ETR
 
|-
 
|-
 
|Pin AF2
 
|Pin AF2
|TIM4_CH2
+
|TIM5_CH1
 +
|-
 +
|Pin AF3
 +
|TIM8_ETR
 
|-
 
|-
 
|Pin AF4
 
|Pin AF4
|I2C4_SDA
+
|TIM15_BKIN
 
|-
 
|-
|Pin AF5
+
|Pin AF7
|I2C1_SDA
+
|USART2_CTS/USART2_NSS
|-
 
|Pin AF6
 
|I2S3_MCK
 
 
|-
 
|-
 
|Pin AF8
 
|Pin AF8
|SDMMC1_D123DIR
+
|UART4_TX
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
|QUADSPI_BK1_IO3
+
|SDMMC2_CMD
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
|SAI2_SCK_A
+
|SAI2_SD_B
 
|-
 
|-
|Pin AF12
+
|Pin AF11
|FMC_A18
+
|ETH1_GMII_CRS/
|-
+
 
|Pin AF13
+
ETH1_MII_CRS
|DSI_TE
 
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
 
|-
 
|-
|J1.99
+
| rowspan="13" |J1.97
(NAND on board)
+
| rowspan="13" |PD13
|PD12
+
| rowspan="13" |CPU.PD13
|CPU.PD12
+
| rowspan="13" |U12
|U11
+
| rowspan="13" |VDD
|VDD
+
| rowspan="13" |I/O
|I/O
+
| rowspan="13" |TBD
|internally used for NAND flash,
 
do not connect
 
|
 
|
 
|-
 
| rowspan="10" |J1.99
 
| rowspan="10" |PD12
 
| rowspan="10" |CPU.PD12
 
| rowspan="10" |U11
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |
 
 
|Pin AF1
 
|Pin AF1
|LPTIM1_IN1
+
|LPTIM1_OUT
 
|-
 
|-
 
|Pin AF2
 
|Pin AF2
|TIM4_CH1
+
|TIM4_CH2
|-
 
|Pin AF3
 
|LPTIM2_IN1
 
 
|-
 
|-
 
|Pin AF4
 
|Pin AF4
|I2C4_SCL
+
|I2C4_SDA
 
|-
 
|-
 
|Pin AF5
 
|Pin AF5
|I2C1_SCL
+
|I2C1_SDA
 +
|-
 +
|Pin AF6
 +
|I2S3_MCK
 
|-
 
|-
|Pin AF7
+
|Pin AF8
|USART3_RTS/USART3_DE
+
|SDMMC1_D123DIR
 
|-
 
|-
 
|Pin AF9
 
|Pin AF9
|QUADSPI_BK1_IO1
+
|SDMMC2_D7
 
|-
 
|-
 
|Pin AF10
 
|Pin AF10
|SAI2_FS_A
+
|SDMMC2_D123DIR
 +
|-
 +
|Pin AF11
 +
|SDMMC1_D7
 
|-
 
|-
 
|Pin AF12
 
|Pin AF12
|FMC_A17/FMC_ALE
+
|FMC_CLK
 +
|-
 +
|Pin AF13
 +
|DCMI_D5
 +
|-
 +
|Pin AF14
 +
|LCD_G7
 
|-
 
|-
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
 
|-
 
|-
|J1.101
+
| rowspan="10" |J1.99
(NAND on board)
+
| rowspan="10" |PD12
|PD11
+
| rowspan="10" |CPU.PD12
|CPU.PD11
+
| rowspan="10" |U11
|V8
+
| rowspan="10" |VDD
|VDD
+
| rowspan="10" |I/O
|I/O
+
| rowspan="10" |TBD
|internally used for NAND flash,
+
|Pin AF1
 
+
|LPTIM1_IN1
do not connect
+
|-
|
+
|Pin AF2
|
+
|TIM4_CH1
 
|-
 
|-
| rowspan="8" |J1.101
 
| rowspan="8" |PD11
 
| rowspan="8" |CPU.PD11
 
| rowspan="8" |V8
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |
 
 
|Pin AF3
 
|Pin AF3
|LPTIM2_IN2
+
|LPTIM2_IN1
 +
|-
 +
|Pin AF4
 +
|I2C4_SCL
 +
|-
 +
|Pin AF5
 +
|I2C1_SCL
 +
|-
 +
|Pin AF7
 +
|USART3_RTS/USART3_DE
 +
|-
 +
|Pin AF9
 +
|QUADSPI_BK1_IO1
 +
|-
 +
|Pin AF10
 +
|SAI2_FS_A
 +
|-
 +
|Pin AF12
 +
|FMC_A17/FMC_ALE
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 +
|-
 +
| rowspan="8" |J1.101
 +
| rowspan="8" |PD11
 +
| rowspan="8" |CPU.PD11
 +
| rowspan="8" |V8
 +
| rowspan="8" |VDD
 +
| rowspan="8" |I/O
 +
| rowspan="8" |TBD
 +
|Pin AF3
 +
|LPTIM2_IN2
 
|-
 
|-
 
|Pin AF4
 
|Pin AF4
Line 1,454: Line 1,278:
 
| -
 
| -
 
|
 
|
|
 
|
 
|-
 
|J1.105
 
(NAND on board)
 
|PG9
 
|CPU.PG9
 
|T14
 
|VDD
 
|I/O
 
|internally used for NAND flash,
 
 
do not connect
 
 
|
 
|
 
|
 
|
Line 1,476: Line 1,287:
 
| rowspan="9" |VDD
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |I/O
| rowspan="9" |
+
| rowspan="9" |TBD
 
|Pin AF0
 
|Pin AF0
 
|DBTRGO
 
|DBTRGO
Line 1,640: Line 1,451:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
| rowspan="2" |
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 7
 
|Keypad row 7
Line 1,653: Line 1,464:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
| rowspan="2" |
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 6
 
|Keypad row 6
Line 1,666: Line 1,477:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
| rowspan="2" |
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 5
 
|Keypad row 5
Line 1,679: Line 1,490:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
| rowspan="3" |
+
| rowspan="3" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 4
 
|Keypad row 4
Line 1,695: Line 1,506:
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
| rowspan="5" |
+
| rowspan="5" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 3
 
|Keypad row 3
Line 1,717: Line 1,528:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
| rowspan="3" |
+
| rowspan="3" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 2
 
|Keypad row 2
Line 1,733: Line 1,544:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
| rowspan="3" |
+
| rowspan="3" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 1
 
|Keypad row 1
Line 1,749: Line 1,560:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
| rowspan="3" |
+
| rowspan="3" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad row 0
 
|Keypad row 0
Line 1,765: Line 1,576:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
| rowspan="2" |
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 0
 
|Keypad column 0
Line 1,778: Line 1,589:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
| rowspan="2" |
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 1
 
|Keypad column 1
Line 1,801: Line 1,612:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
| rowspan="2" |
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 2
 
|Keypad column 2
Line 1,814: Line 1,625:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
| rowspan="2" |
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 3
 
|Keypad column 3
Line 1,827: Line 1,638:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
| rowspan="3" |
+
| rowspan="3" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 4
 
|Keypad column 4
Line 1,843: Line 1,654:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
| rowspan="2" |
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 5
 
|Keypad column 5
Line 1,856: Line 1,667:
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
| rowspan="5" |
+
| rowspan="5" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 6
 
|Keypad column 6
Line 1,878: Line 1,689:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
| rowspan="3" |
+
| rowspan="3" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 7
 
|Keypad column 7
Line 1,894: Line 1,705:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
| rowspan="3" |
+
| rowspan="3" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 8
 
|Keypad column 8
Line 1,910: Line 1,721:
 
| rowspan="3" |VDD
 
| rowspan="3" |VDD
 
| rowspan="3" |I/O
 
| rowspan="3" |I/O
| rowspan="3" |
+
| rowspan="3" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 9
 
|Keypad column 9
Line 1,926: Line 1,737:
 
| rowspan="2" |VDD
 
| rowspan="2" |VDD
 
| rowspan="2" |I/O
 
| rowspan="2" |I/O
| rowspan="2" |
+
| rowspan="2" |TBD
 
|Pin AF0
 
|Pin AF0
 
|Keypad column 10
 
|Keypad column 10
Line 1,953: Line 1,764:
 
|
 
|
 
|-
 
|-
|J1.177
+
| rowspan="6" |J1.177
 
+
| rowspan="6" |PE9
(NAND on board)
 
|PE9
 
|CPU.PE9
 
|W7
 
|VDD
 
|I/O
 
|internally used for NAND flash,
 
do not connect
 
|
 
|
 
|-
 
| rowspan="6" |J1.177
 
| rowspan="6" |PE9
 
 
| rowspan="6" |CPU.PE9
 
| rowspan="6" |CPU.PE9
 
| rowspan="6" |W7
 
| rowspan="6" |W7
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
| rowspan="6" |
+
| rowspan="6" |TBD
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH1
 
|TIM1_CH1
Line 1,991: Line 1,789:
 
|EVENTOUT
 
|EVENTOUT
 
|-
 
|-
|J1.179
+
| rowspan="5" |J1.179
 
+
| rowspan="5" |PC3
(I/O EXP on board)
+
| rowspan="5" |CPU.PC3
|PC3
+
| rowspan="5" |T3
|CPU.PC3
+
| rowspan="5" |VDD
|T3
+
| rowspan="5" |I/O
|VDD
+
| rowspan="5" |TBD
|I/O
 
|internally used for I/O EXP,
 
 
 
do not connect
 
|
 
|
 
|-
 
| rowspan="6" |J1.179
 
| rowspan="6" |PC3
 
| rowspan="6" |CPU.PC3
 
| rowspan="6" |T3
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |
 
 
|Pin AF0
 
|Pin AF0
 
|TRACECLK
 
|TRACECLK
Line 2,028: Line 1,812:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|Additional
 
functions
 
|ADC1_INP13
 
 
ADC1_INN12
 
|-
 
|J1.181
 
 
(NAND on board)
 
|PD6
 
|CPU.PD6
 
|E3
 
|VDD
 
|I/O
 
|internally used for NAND flash,
 
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="11" |J1.181
 
| rowspan="11" |J1.181
Line 2,055: Line 1,819:
 
| rowspan="11" |VDD
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |I/O
| rowspan="11" |
+
| rowspan="11" |TBD
 
|Pin AF1
 
|Pin AF1
 
|TIM16_CH1N
 
|TIM16_CH1N
Line 2,088: Line 1,852:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|J1.183
 
 
(NAND on board)
 
|PE10
 
|CPU.PE10
 
|V10
 
|VDD
 
|I/O
 
|internally used for NAND flash,
 
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="6" |J1.183
 
| rowspan="6" |J1.183
Line 2,109: Line 1,859:
 
| rowspan="6" |VDD
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |I/O
| rowspan="6" |
+
| rowspan="6" |TBD
 
|Pin AF1
 
|Pin AF1
 
|TIM1_CH2N
 
|TIM1_CH2N
Line 2,144: Line 1,894:
 
| rowspan="8" |VDD
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |I/O
| rowspan="8" |
+
| rowspan="8" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED11
 
|TRACED11
Line 2,181: Line 1,931:
 
| rowspan="11" |VDD
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |I/O
| rowspan="11" |
+
| rowspan="11" |TBD
 
|Pin AF0
 
|Pin AF0
 
|TRACED4
 
|TRACED4
Line 2,221: Line 1,971:
 
| rowspan="7" |VDD
 
| rowspan="7" |VDD
 
| rowspan="7" |I/O
 
| rowspan="7" |I/O
| rowspan="7" |
+
| rowspan="7" |TBD
 
|Pin AF1
 
|Pin AF1
 
|LPTIM1_IN2
 
|LPTIM1_IN2
Line 2,249: Line 1,999:
 
| rowspan="10" |VDD
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |I/O
| rowspan="10" |
+
| rowspan="10" |TBD
 
|Pin AF1
 
|Pin AF1
 
|LPTIM1_ETR
 
|LPTIM1_ETR
Line 2,280: Line 2,030:
 
|EVENTOUT
 
|EVENTOUT
 
|-
 
|-
|J1.195
+
| rowspan="9" |J1.195
|PE2
+
| rowspan="9" |PE2
|CPU.PE2
+
| rowspan="9" |CPU.PE2
|T1
+
| rowspan="9" |T1
|VDD
+
| rowspan="9" |VDD
|I/O
+
| rowspan="9" |I/O
|internally used for
+
| rowspan="9" |TBD
PMIC I2C
+
|Pin AF0
 +
|TRACECLK
 +
|-
 +
|Pin AF2
 +
|SAI1_CK1
 +
|-
 
|Pin AF4
 
|Pin AF4
 
|I2C4_SCL
 
|I2C4_SCL
 
|-
 
|-
|J1.197
+
|Pin AF5
 +
|SPI4_SCK
 +
|-
 +
|Pin AF6
 +
|SAI1_MCLK_A
 +
|-
 +
|Pin AF9
 +
|QUADSPI_BK1_IO2
 +
|-
 +
|Pin AF11
 +
|ETH1_GMII_TXD3/
  
(LAN PHY on board)
+
ETH1_MII_TXD3/
|PA13
 
|CPU.PA13
 
|P2
 
|VDD
 
|I/O
 
|internally used for LAN PHY,
 
  
do not connect
+
ETH1_RGMII_TXD3
|
+
|-
|
+
|Pin AF12
 +
|FMC_A23
 +
|-
 +
|Pin AF15
 +
|EVENTOUT
 
|-
 
|-
| rowspan="6" |J1.197
+
| rowspan="5" |J1.197
| rowspan="6" |PA13
+
| rowspan="5" |PA13
| rowspan="6" |CPU.PA13
+
| rowspan="5" |CPU.PA13
| rowspan="6" |P2
+
| rowspan="5" |P2
| rowspan="6" |VDD
+
| rowspan="5" |VDD
| rowspan="6" |I/O
+
| rowspan="5" |I/O
| rowspan="6" |
+
| rowspan="5" |TBD
 
|Pin AF0
 
|Pin AF0
 
|DBTRGO
 
|DBTRGO
Line 2,326: Line 2,089:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|Additional
 
functions
 
|BOOTFAILN
 
|-
 
|J1.199
 
 
(NAND on board)
 
|PD14
 
|CPU.PD14
 
|F3
 
|VDD
 
|I/O
 
|internally used for NAND flash,
 
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="5" |J1.199
 
| rowspan="5" |J1.199
Line 2,351: Line 2,096:
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
| rowspan="5" |internally used for
+
| rowspan="5" |TBD
NAND flash
 
 
|Pin AF2
 
|Pin AF2
 
|TIM4_CH3
 
|TIM4_CH3
Line 2,367: Line 2,111:
 
|Pin AF15
 
|Pin AF15
 
|EVENTOUT
 
|EVENTOUT
|-
 
|J1.201
 
(NAND on board)
 
|PD15
 
|CPU.PD15
 
|G1
 
|VDD
 
|I/O
 
|internally used for NAND flash,
 
 
do not connect
 
|
 
|
 
 
|-
 
|-
 
| rowspan="5" |J1.201
 
| rowspan="5" |J1.201
Line 2,387: Line 2,118:
 
| rowspan="5" |VDD
 
| rowspan="5" |VDD
 
| rowspan="5" |I/O
 
| rowspan="5" |I/O
| rowspan="5" |internally used for
+
| rowspan="5" |TBD
NAND flash
 
 
|Pin AF2
 
|Pin AF2
 
|TIM4_CH4
 
|TIM4_CH4
Line 2,514: Line 2,244:
 
|VDD
 
|VDD
 
|O
 
|O
|internally connected to VDD
+
|
 
|
 
|
 
|
 
|
Line 2,524: Line 2,254:
 
|VDD
 
|VDD
 
|I
 
|I
|internal pull-up or pull-down
+
|internall pull-up or pull-down
 
according to specific model
 
according to specific model
 
|
 
|
Line 2,555: Line 2,285:
 
|VDD
 
|VDD
 
|I/O
 
|I/O
|internal 10k pull-up to VDD
+
|TBD
 
|
 
|
 
|
 
|
Line 2,565: Line 2,295:
 
|VDD
 
|VDD
 
|I
 
|I
|internal pull-up or pull-down
+
|internall pull-up or pull-down
 
according to specific model
 
according to specific model
 
|
 
|
 
|
 
|
 
|-
 
|-
| rowspan="9" |J1.28
+
| rowspan="5" |J1.28
| rowspan="9" |PA9
+
| rowspan="5" |PA9
| rowspan="9" |CPU.PA9
+
| rowspan="5" |CPU.PA9
| rowspan="9" |C8
+
| rowspan="5" |C8
| rowspan="9" |VDD
+
| rowspan="5" |VDD
| rowspan="9" |I/O
+
| rowspan="5" |I/O
| rowspan="9" |
+
| rowspan="5" |TBD
|Pin AF1
+
|Pin ALT-0
|TIM1_CH2
+
|TBD
 
|-
 
|-
|Pin AF4
+
|Pin ALT-1
|I2C3_SMBA
+
|TBD
|-
 
|Pin AF5
 
|SPI2_SCK/I2S2_CK
 
 
|-
 
|-
|Pin AF7
+
|Pin ALT-2
|USART1_TX
+
|TBD
 
|-
 
|-
|Pin AF8
+
|Pin ALT-3
|SDMMC2_CDIR
+
|TBD
 
|-
 
|-
|Pin AF10
+
|Pin ALT-5
|SDMMC2_D5
+
|TBD
|-
 
|Pin AF13
 
|DCMI_D0
 
|-
 
|Pin AF14
 
|LCD_R5
 
|-
 
|Pin AF15
 
|EVENTOUT
 
 
|-
 
|-
 
|J1.30
 
|J1.30
Line 2,624: Line 2,342:
 
|
 
|
 
|-
 
|-
| rowspan="10" |J1.34
+
| rowspan="5" |J1.34
| rowspan="10" |PB13
+
| rowspan="5" |PB13
| rowspan="10" |CPU.PB13
+
| rowspan="5" |CPU.PB13
| rowspan="10" |T9
+
| rowspan="5" |T9
| rowspan="10" |VDD
+
| rowspan="5" |VDD
| rowspan="10" |I/O
+
| rowspan="5" |I/O
| rowspan="10" |
+
| rowspan="5" |TBD
|Pin AF1
+
|Pin ALT-0
|TIM1_CH1N
+
|TBD
 
|-
 
|-
|Pin AF3
+
|Pin ALT-1
|DFSDM1_CKOUT
+
|TBD
 
|-
 
|-
|Pin AF4
+
|Pin ALT-2
|LPTIM2_OUT
+
|TBD
 
|-
 
|-
|Pin AF5
+
|Pin ALT-3
|SPI2_SCK/I2S2_CK
+
|TBD
 
|-
 
|-
|Pin AF6
+
|Pin ALT-5
|DFSDM1_CKIN1
+
|TBD
|-
 
|Pin AF7
 
|USART3_CTS/USART3_NSS
 
|-
 
|Pin AF9
 
|FDCAN2_TX
 
|-
 
|Pin AF11
 
|ETH1_GMII_TXD1/
 
 
 
ETH1_MII_TXD1/
 
 
 
ETH1_RGMII_TXD1/
 
 
 
ETH1_RMII_TXD1
 
|-
 
|Pin AF14
 
|UART5_TX
 
|-
 
|Pin AF15
 
|EVENTOUT
 
 
|-
 
|-
 
|J1.36
 
|J1.36
Line 2,673: Line 2,370:
 
|VDD
 
|VDD
 
|I
 
|I
|internal pull-up or pull-down
+
|internall pull-up or pull-down
 
according to specific model
 
according to specific model
 
|
 
|
 
|
 
|
 
|-
 
|-
| rowspan="10" |J1.38
+
| rowspan="5" |J1.38
| rowspan="10" |PA11
+
| rowspan="5" |PA11
| rowspan="10" |CPU.PA11
+
| rowspan="5" |CPU.PA11
| rowspan="10" |V17
+
| rowspan="5" |V17
| rowspan="10" |VDD
+
| rowspan="5" |VDD
| rowspan="10" |I/O
+
| rowspan="5" |I/O
| rowspan="10" |
+
| rowspan="5" |TBD
|Pin AF1
+
|Pin ALT-0
|TIM1_CH4
+
|TBD
 
|-
 
|-
|Pin AF2
+
|Pin ALT-1
|I2C6_SCL
+
|TBD
 
|-
 
|-
|Pin AF4
+
|Pin ALT-2
|I2C5_SCL
+
|TBD
 
|-
 
|-
|Pin AF5
+
|Pin ALT-3
|SPI2_NSS/I2S2_WS
+
|TBD
 
|-
 
|-
|Pin AF6
+
|Pin ALT-5
|UART4_RX
+
|TBD
 
|-
 
|-
|Pin AF7
+
|J1.40
|USART1_CTS/USART1_NSS
+
|MEM_WP#
 +
|NAND.NWP
 +
NOR.NWP
 +
|19
 +
C4
 +
|VDD
 +
|I
 +
|internal pull-up to VDD
 +
|
 +
|
 
|-
 
|-
|Pin AF9
+
| rowspan="5" |J1.42
|FDCAN1_RX
+
| rowspan="5" |PB6
 +
| rowspan="5" |CPU.PB6
 +
| rowspan="5" |T12
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF14
+
|Pin ALT-1
|LCD_R4
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-2
|EVENTOUT
+
|TBD
 
|-
 
|-
|Additional
+
|Pin ALT-3
functions
+
|TBD
|OTG_FS_DM
 
 
|-
 
|-
|J1.40
+
|Pin ALT-5
|NAND_WP#
+
|TBD
|NAND.WPn
 
|19
 
|VDD
 
|I/O
 
|internal pull-up to VDD
 
|
 
|
 
 
|-
 
|-
|J1.42
+
| rowspan="5" |J1.44
 
+
| rowspan="5" |PB7
(NOR on board)
+
| rowspan="5" |CPU.PB7
|PB6
+
| rowspan="5" |B5
|CPU.PB6
+
| rowspan="5" |VDD
|T12
+
| rowspan="5" |I/O
|VDD
+
| rowspan="5" |TBD
|I/O
+
|Pin ALT-0
|internally used for NOR flash.
+
|TBD
do not connect
 
|
 
|
 
 
|-
 
|-
| rowspan="12" |J1.42
+
|Pin ALT-1
| rowspan="12" |PB6
+
|TBD
| rowspan="12" |CPU.PB6
 
| rowspan="12" |T12
 
| rowspan="12" |VDD
 
| rowspan="12" |I/O
 
| rowspan="12" |
 
|Pin AF1
 
|TIM16_CH1N
 
 
|-
 
|-
|Pin AF2
+
|Pin ALT-2
|TIM4_CH1
+
|TBD
 
|-
 
|-
|Pin AF4
+
|Pin ALT-3
|I2C1_SCL
+
|TBD
 
|-
 
|-
|Pin AF5
+
|Pin ALT-5
|CEC
+
|TBD
 
|-
 
|-
|Pin AF6
+
| rowspan="5" |J1.46
|I2C4_SCL
+
| rowspan="5" |PE14
 +
| rowspan="5" |CPU.PE14
 +
| rowspan="5" |D3
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF7
+
|Pin ALT-1
|USART1_TX
+
|TBD
 
|-
 
|-
|Pin AF9
+
|Pin ALT-2
|FDCAN2_TX
+
|TBD
 
|-
 
|-
|Pin AF10
+
|Pin ALT-3
|QUADSPI_BK1_NCS
+
|TBD
 
|-
 
|-
|Pin AF11
+
|Pin ALT-5
|DFSDM1_DATIN5
+
|TBD
 
|-
 
|-
|Pin AF12
+
| rowspan="5" |J1.48
|UART5_TX
+
| rowspan="5" |PA12
 +
| rowspan="5" |CPU.PA12
 +
| rowspan="5" |U16
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF13
+
|Pin ALT-1
|DCMI_D5
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-2
|EVENTOUT
+
|TBD
 
|-
 
|-
|J1.44
+
|Pin ALT-3
|PB7
+
|TBD
|CPU.PB7
 
|B5
 
|VDD
 
|I/O
 
|internally used for
 
PMIC I2C
 
|Pin AF6
 
|I2C1_SDA
 
 
|-
 
|-
| rowspan="9" |J1.46
+
|Pin ALT-5
| rowspan="9" |PE14
+
|TBD
| rowspan="9" |CPU.PE14
 
| rowspan="9" |D3
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |
 
|Pin AF1
 
|TIM1_CH4
 
 
|-
 
|-
|Pin AF5
+
|J1.50
|SPI4_MOSI
+
|BST_OUT
 +
|PMIC.BST_OUT
 +
|34
 +
|BST_OUT
 +
|S
 +
|BOOST OUTPUT
 +
|
 +
|
 
|-
 
|-
|Pin AF8
+
|J1.52
|UART8_RTS/UART8_DE
+
|BST_OUT
 +
|PMIC.BST_OUT
 +
|34
 +
|BST_OUT
 +
|S
 +
|BOOST OUTPUT
 +
|
 +
|
 
|-
 
|-
|Pin AF10
+
|J1.54
|SAI2_MCLK_B
+
|PMIC_INT#
 +
|PMIC-INTN
 +
|43
 +
|VDD
 +
|O
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF11
+
|J1.56
|SDMMC1_D123DIR
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF12
+
| rowspan="5" |J1.58
|FMC_AD11/FMC_D11
+
| rowspan="5" |PA14
 +
| rowspan="5" |CPU.PA14
 +
| rowspan="5" |R1
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF13
+
|Pin ALT-1
|LCD_G0
+
|TBD
 
|-
 
|-
|Pin AF14
+
|Pin ALT-2
|LCD_CLK
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-3
|EVENTOUT
+
|TBD
 
|-
 
|-
| rowspan="10" |J1.48
+
|Pin ALT-5
| rowspan="10" |PA12
+
|TBD
| rowspan="10" |CPU.PA12
 
| rowspan="10" |U16
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |
 
|Pin AF1
 
|TIM1_ETR
 
 
|-
 
|-
|Pin AF2
+
|J1.60
|I2C6_SDA
+
|VDD
|-
+
|VOLTAGE OUTPUT
|Pin AF4
+
| -
|I2C5_SDA
+
|VDD
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF6
+
|J1.62
|UART4_TX
+
|VDD
 +
|VOLTAGE OUTPUT
 +
| -
 +
|VDD
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF7
+
|J1.64
|USART1_RTS/USART1_DE
+
|1V8
 +
|PMIC.LDO6OUT
 +
|21
 +
|1V8
 +
|S
 +
|Spare LDO output
 +
|
 +
|
 
|-
 
|-
|Pin AF8
+
| rowspan="5" |J1.66
|SAI2_FS_B
+
| rowspan="5" |PG12
 +
| rowspan="5" |CPU.PG12
 +
| rowspan="5" |F1
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF9
+
|Pin ALT-1
|FDCAN1_TX
+
|TBD
 
|-
 
|-
|Pin AF14
+
|Pin ALT-2
|LCD_R5
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-3
|EVENTOUT
+
|TBD
 
|-
 
|-
|Additional
+
|Pin ALT-5
functions
+
|TBD
|OTG_FS_DP
 
 
|-
 
|-
|J1.50
+
| rowspan="5" |J1.68
|BST_OUT
+
| rowspan="5" |PB5
|PMIC.BST_OUT
+
| rowspan="5" |CPU.PB5
|34
+
| rowspan="5" |T8
|BST_OUT
+
| rowspan="5" |VDD
|S
+
| rowspan="5" |I/O
|BOOST OUTPUT
+
| rowspan="5" |TBD
|
+
|Pin ALT-0
|
+
|TBD
 
|-
 
|-
|J1.52
+
|Pin ALT-1
|BST_OUT
+
|TBD
|PMIC.BST_OUT
 
|34
 
|BST_OUT
 
|S
 
|BOOST OUTPUT
 
|
 
|
 
 
|-
 
|-
|J1.54
+
|Pin ALT-2
|PMIC_INT#
+
|TBD
|PMIC-INTN
 
|43
 
|VDD
 
|O
 
|
 
|
 
|
 
 
|-
 
|-
|J1.56
+
|Pin ALT-3
|DGND
+
|TBD
|DGND
 
| -
 
| -
 
|G
 
|
 
|
 
|
 
 
|-
 
|-
| rowspan="4" |J1.58
+
|Pin ALT-5
| rowspan="4" |PA14
+
|TBD
| rowspan="4" |CPU.PA14
 
| rowspan="4" |R1
 
| rowspan="4" |VDD
 
| rowspan="4" |I/O
 
| rowspan="4" |
 
|Pin AF0
 
|DBTRGO
 
 
|-
 
|-
|Pin AF1
+
| rowspan="5" |J1.70
|DBTRGI
+
| rowspan="5" |PG8
 +
| rowspan="5" |CPU.PG8
 +
| rowspan="5" |U7
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 
|-
 
|-
|Pin AF2
+
|Pin ALT-2
|MCO2
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-3
|EVENTOUT
+
|TBD
 
|-
 
|-
|J1.60
+
|Pin ALT-5
|VDD
+
|TBD
|VOLTAGE OUTPUT
 
| -
 
|VDD
 
|S
 
|
 
|
 
|
 
 
|-
 
|-
|J1.62
+
| rowspan="5" |J1.72
|VDD
+
| rowspan="5" |PA8
|VOLTAGE OUTPUT
+
| rowspan="5" |CPU.PA8
| -
+
| rowspan="5" |B8
|VDD
+
| rowspan="5" |VDD
|S
+
| rowspan="5" |I/O
|
+
| rowspan="5" |TBD
|
+
|Pin ALT-0
|
+
|TBD
 
|-
 
|-
|J1.64
+
|Pin ALT-1
|1V8
+
|TBD
|PMIC.LDO6OUT
 
|21
 
|1V8
 
|S
 
|Spare LDO output
 
|
 
|
 
 
|-
 
|-
| rowspan="11" |J1.66
+
|Pin ALT-2
| rowspan="11" |PG12
+
|TBD
| rowspan="11" |CPU.PG12
 
| rowspan="11" |F1
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |
 
|Pin AF1
 
|LPTIM1_IN1
 
 
|-
 
|-
|Pin AF5
+
|Pin ALT-3
|SPI6_MISO
+
|TBD
 
|-
 
|-
|Pin AF6
+
|Pin ALT-5
|SAI4_CK2
+
|TBD
 
|-
 
|-
|Pin AF7
+
| rowspan="5" |J1.74
|USART6_RTS/USART6_DE
+
| rowspan="5" |PF7
 +
| rowspan="5" |CPU.PF7
 +
| rowspan="5" |W8
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF8
+
|Pin ALT-1
|SPDIFRX_IN2
+
|TBD
 
|-
 
|-
|Pin AF9
+
|Pin ALT-2
|LCD_B4
+
|TBD
 
|-
 
|-
|Pin AF10
+
|Pin ALT-3
|SAI4_SCK_A
+
|TBD
 
|-
 
|-
|Pin AF11
+
|Pin ALT-5
|ETH1_PHY_INTN
+
|TBD
 
|-
 
|-
|Pin AF12
+
| rowspan="5" |J1.76
|FMC_NE4
+
| rowspan="5" |PF9
 +
| rowspan="5" |CPU.PF9
 +
| rowspan="5" |W9
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF14
+
|Pin ALT-1
|LCD_B1
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-2
|EVENTOUT
+
|TBD
 
|-
 
|-
| rowspan="16" |J1.68
+
|Pin ALT-3
| rowspan="16" |PB5
+
|TBD
| rowspan="16" |CPU.PB5
 
| rowspan="16" |T8
 
| rowspan="16" |VDD
 
| rowspan="16" |I/O
 
| rowspan="16" |
 
|Pin AF0
 
|ETH_CLK
 
 
|-
 
|-
|Pin AF1
+
|Pin ALT-5
|TIM17_BKIN
+
|TBD
 
|-
 
|-
|Pin AF2
+
| rowspan="5" |J1.78
|TIM3_CH2
+
| rowspan="5" |PF8
 +
| rowspan="5" |CPU.PF8
 +
| rowspan="5" |U10
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF3
+
|Pin ALT-1
|SAI4_D1
+
|TBD
 
|-
 
|-
|Pin AF4
+
|Pin ALT-2
|I2C1_SMBA
+
|TBD
 
|-
 
|-
|Pin AF5
+
|Pin ALT-3
|SPI1_MOSI/I2S1_SDO
+
|TBD
 
|-
 
|-
|Pin AF6
+
|Pin ALT-5
|I2C4_SMBA
+
|TBD
 
|-
 
|-
|Pin AF7
+
| rowspan="5" |J1.80
|SPI3_MOSI/I2S3_SDO
+
| rowspan="5" |PF6
 +
| rowspan="5" |CPU.PF6
 +
| rowspan="5" |V9
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF8
+
|Pin ALT-1
|SPI6_MOSI
+
|TBD
 
|-
 
|-
|Pin AF9
+
|Pin ALT-2
|FDCAN2_RX
+
|TBD
 
|-
 
|-
|Pin AF10
+
|Pin ALT-3
|SAI4_SD_A
+
|TBD
 
|-
 
|-
|Pin AF11
+
|Pin ALT-5
|ETH1_PPS_OUT
+
|TBD
 
|-
 
|-
|Pin AF12
+
|J1.82
|UART5_RX
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF13
+
|J1.84
|DCMI_D10
+
|PMIC_3V3
 +
|VOLTAGE OUTPUT
 +
| -
 +
|PMIC_3V3
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF14
+
|J1.86
|LCD_G7
+
|PMIC_3V3
 +
|VOLTAGE OUTPUT
 +
| -
 +
|PMIC_3V3
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF15
+
|J1.88
|EVENTOUT
+
|PMIC_3V3
 +
|VOLTAGE OUTPUT
 +
| -
 +
|PMIC_3V3
 +
|S
 +
|
 +
|
 +
|
 
|-
 
|-
| rowspan="13" |J1.70
+
|J1.90
| rowspan="13" |PG8
+
|JTMS-SWDIO
| rowspan="13" |CPU.PG8
+
|CPU.JTMS-SWDIO
| rowspan="13" |U7
+
|D15
| rowspan="13" |VDD
+
|VDD
| rowspan="13" |I/O
+
|I/O
| rowspan="13" |
+
|TBD
|Pin AF0
+
|
|TRACED15
+
|
 
|-
 
|-
|Pin AF1
+
|J1.92
|TIM2_CH1/TIM2_ETR
+
|JTDI
 +
|CPU.JTDI
 +
|D13
 +
|VDD
 +
|I/O
 +
|TBD
 +
|
 +
|
 
|-
 
|-
|Pin AF2
+
|J1.94
|ETH_CLK
+
|NJTRST
 +
|CPU.NJTRST
 +
|D12
 +
|VDD
 +
|I/O
 +
|TBD
 +
|
 +
|
 
|-
 
|-
|Pin AF3
+
|J1.96
|TIM8_ETR
+
|JTDO-TRACESWOO
 +
|CPU.JTDO-TRACESWOO
 +
|D14
 +
|VDD
 +
|I/O
 +
|TBD
 +
|
 +
|
 
|-
 
|-
|Pin AF5
+
|J1.98
|SPI6_NSS
+
|JTCK-SWCLK
 +
|CPU.JTCK-SWCLK
 +
|D16
 +
|VDD
 +
|I/O
 +
|TBD
 +
|
 +
|
 
|-
 
|-
|Pin AF6
+
|J1.100
|SAI4_D2
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF7
+
|J1.102
|USART6_RTS/USART6_DE
+
|NRST_CORE
 +
|CPU.NRST_CORE
 +
|J2
 +
|VDD
 +
|I
 +
|internally connected to NRST
 +
|
 +
|
 
|-
 
|-
|Pin AF8
+
|J1.104
|USART3_RTS/USART3_DE
+
|PDR_ON
 +
|CPU.PDR_ON
 +
|N2
 +
|VDD
 +
|I
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF9
+
|J1.106
|SPDIFRX_IN3
+
|PDR_ON_CORE
 +
|CPU.PDR_ON_CORE
 +
|N1
 +
|VDD
 +
|I
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF10
+
|J1.108
|SAI4_FS_A
+
|PWR_LP
 +
|CPU.PWR_LP
 +
|P1
 +
|VDD
 +
|O
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF11
+
|J1.110
|ETH1_PPS_OUT
+
| -
|-
+
|NC
|Pin AF14
+
| -
|LCD_G7
+
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF15
+
|J1.112
|EVENTOUT
+
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
| rowspan="13" |J1.72
+
|J1.114
| rowspan="13" |PA8
+
| -
| rowspan="13" |CPU.PA8
+
|NC
| rowspan="13" |B8
+
| -
| rowspan="13" |VDD
+
| -
| rowspan="13" |I/O
+
| -
| rowspan="13" |
+
|
|Pin AF0
+
|
|MCO1
+
|
 
|-
 
|-
|Pin AF1
+
|J1.116
|TIM1_CH1
+
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF3
+
|J1.118
|TIM8_BKIN2
+
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF4
+
|J1.120
|I2C3_SCL
+
| -
 +
|NC
 +
| -
 +
| -
 +
| -
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF5
+
|J1.122
|SPI3_MOSI/I2S3_SDO
+
|DGND
 +
|DGND
 +
| -
 +
| -
 +
|G
 +
|
 +
|
 +
|
 
|-
 
|-
|Pin AF7
+
| rowspan="5" |J1.124
|USART1_CK
+
| rowspan="5" |PE13
 +
| rowspan="5" |CPU.PE13
 +
| rowspan="5" |C2
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF8
+
|Pin ALT-1
|SDMMC2_CKIN
+
|TBD
 
|-
 
|-
|Pin AF9
+
|Pin ALT-2
|SDMMC2_D4
+
|TBD
 
|-
 
|-
|Pin AF10
+
|Pin ALT-3
|OTG_FS_SOF/OTG_HS_SOF
+
|TBD
 
|-
 
|-
|Pin AF12
+
|Pin ALT-5
|SAI4_SD_B
+
|TBD
 
|-
 
|-
|Pin AF13
+
| rowspan="5" |J1.126
|UART7_RX
+
| rowspan="5" |PC13
 +
| rowspan="5" |CPU.PC13
 +
| rowspan="5" |K3
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF14
+
|Pin ALT-1
|LCD_R6
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-2
|EVENTOUT
+
|TBD
 
|-
 
|-
|J1.74
+
|Pin ALT-3
 
+
|TBD
(NOR on board)
 
|PF7
 
|CPU.PF7
 
|W8
 
|VDD
 
|I/O
 
|internally used for NOR flash.
 
do not connect
 
|
 
|
 
 
|-
 
|-
| rowspan="6" |J1.74
+
|Pin ALT-5
| rowspan="6" |PF7
+
|TBD
| rowspan="6" |CPU.PF7
 
| rowspan="6" |W8
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |
 
|Pin AF1
 
|TIM17_CH1
 
 
|-
 
|-
|Pin AF5
+
| rowspan="5" |J1.128
|SPI5_SCK
+
| rowspan="5" |PA4
 +
| rowspan="5" |CPU.PA4
 +
| rowspan="5" |R4
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF6
+
|Pin ALT-1
|SAI1_MCLK_B
+
|TBD
 
|-
 
|-
|Pin AF7
+
|Pin ALT-2
|UART7_TX
+
|TBD
 
|-
 
|-
|Pin AF9
+
|Pin ALT-3
|QUADSPI_BK1_IO2
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-5
|EVENTOUT
+
|TBD
 
|-
 
|-
|J1.76
+
| rowspan="5" |J1.130
 
+
| rowspan="5" |PC6_OPT
(NOR on board)
+
| rowspan="5" | -
|PF9
+
| rowspan="5" | -
|CPU.PF9
+
| rowspan="5" |VDD
|W9
+
| rowspan="5" |I/O
|VDD
+
| rowspan="5" |TBD
|I/O
+
|Pin ALT-0
|internally used for NOR flash.
+
|TBD
 
 
do not connect
 
|
 
|
 
 
|-
 
|-
| rowspan="8" |J1.76
+
|Pin ALT-1
| rowspan="8" |PF9
+
|TBD
| rowspan="8" |CPU.PF9
 
| rowspan="8" |W9
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |
 
|Pin AF0
 
|TRACED13
 
 
|-
 
|-
|Pin AF1
+
|Pin ALT-2
|TIM17_CH1N
+
|TBD
 
|-
 
|-
|Pin AF5
+
|Pin ALT-3
|SPI5_MOSI
+
|TBD
 
|-
 
|-
|Pin AF6
+
|Pin ALT-5
|SAI1_FS_B
+
|TBD
 
|-
 
|-
|Pin AF7
+
| rowspan="5" |J1.132
|UART7_CTS
+
| rowspan="5" |PG7
 +
| rowspan="5" |CPU.PG7
 +
| rowspan="5" |W10
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF9
+
|Pin ALT-1
|TIM14_CH1
+
|TBD
 
|-
 
|-
|Pin AF10
+
|Pin ALT-2
|QUADSPI_BK1_IO1
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-3
|EVENTOUT
+
|TBD
 
|-
 
|-
|J1.78
+
|Pin ALT-5
 
+
|TBD
(NOR on board)
 
|PF8
 
|CPU.PF8
 
|U10
 
|VDD
 
|I/O
 
|internally used for NOR flash.
 
 
 
do not connect
 
|
 
|
 
 
|-
 
|-
| rowspan="8" |J1.78
+
| rowspan="5" |J1.134
| rowspan="8" |PF8
+
| rowspan="5" |PG10
| rowspan="8" |CPU.PF8
+
| rowspan="5" |CPU.PG10
| rowspan="8" |U10
+
| rowspan="5" |V7
| rowspan="8" |VDD
+
| rowspan="5" |VDD
| rowspan="8" |I/O
+
| rowspan="5" |I/O
| rowspan="8" |
+
| rowspan="5" |TBD
|Pin AF0
+
|Pin ALT-0
|TRACED12
+
|TBD
 
|-
 
|-
|Pin AF1
+
|Pin ALT-1
|TIM16_CH1N
+
|TBD
 
|-
 
|-
|Pin AF5
+
|Pin ALT-2
|SPI5_MISO
+
|TBD
 
|-
 
|-
|Pin AF6
+
|Pin ALT-3
|SAI1_SCK_B
+
|TBD
 
|-
 
|-
|Pin AF7
+
|Pin ALT-5
|UART7_RTS/UART7_DE
+
|TBD
 
|-
 
|-
|Pin AF9
+
| rowspan="5" |J1.136
|TIM13_CH1
+
| rowspan="5" |PD10
 +
| rowspan="5" |CPU.PD10
 +
| rowspan="5" |C5
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF10
+
|Pin ALT-1
|QUADSPI_BK1_IO0
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-2
|EVENTOUT
+
|TBD
 
|-
 
|-
|J1.80
+
|Pin ALT-3
 
+
|TBD
(NOR on board)
 
|PF6
 
|CPU.PF6
 
|V9
 
|VDD
 
|I/O
 
|internally used for NOR flash.
 
 
 
do not connect
 
|
 
|
 
 
|-
 
|-
| rowspan="7" |J1.80
+
|Pin ALT-5
| rowspan="7" |PF6
+
|TBD
| rowspan="7" |CPU.PF6
+
|-
| rowspan="7" |V9
+
| rowspan="5" |J1.138
| rowspan="7" |VDD
+
| rowspan="5" |PE12
| rowspan="7" |I/O
+
| rowspan="5" |CPU.PE12
| rowspan="7" |
+
| rowspan="5" |D2
|Pin AF1
+
| rowspan="5" |VDD
|TIM16_CH1
+
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
| rowspan="5" |J1.140
 +
| rowspan="5" |PA3
 +
| rowspan="5" |CPU.PA3
 +
| rowspan="5" |P3
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
| rowspan="5" |J1.142
 +
| rowspan="5" |PB8
 +
| rowspan="5" |CPU.PB8
 +
| rowspan="5" |W6
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 
|-
 
|-
|Pin AF5
+
|Pin ALT-5
|SPI5_NSS
+
|TBD
 
|-
 
|-
|Pin AF6
+
| rowspan="5" |J1.144
|SAI1_SD_B
+
| rowspan="5" |PB9
 +
| rowspan="5" |CPU.PB9
 +
| rowspan="5" |D9
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF7
+
|Pin ALT-1
|UART7_RX
+
|TBD
 
|-
 
|-
|Pin AF9
+
|Pin ALT-2
|QUADSPI_BK1_IO3
+
|TBD
 
|-
 
|-
|Pin AF12
+
|Pin ALT-3
|SAI4_SCK_B
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-5
|EVENTOUT
+
|TBD
 
|-
 
|-
|J1.82
+
|J1.146
 
|DGND
 
|DGND
 
|DGND
 
|DGND
Line 3,321: Line 3,227:
 
|
 
|
 
|-
 
|-
|J1.84
+
| rowspan="5" |J1.148
|PMIC_3V3
+
| rowspan="5" |PA6
|VOLTAGE OUTPUT
+
| rowspan="5" |CPU.PA6
| -
+
| rowspan="5" |T5
|PMIC_3V3
+
| rowspan="5" |VDD
|S
+
| rowspan="5" |I/O
|
+
| rowspan="5" |TBD
|
+
|Pin ALT-0
|
+
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 
|-
 
|-
|J1.86
+
|Pin ALT-2
|PMIC_3V3
+
|TBD
|VOLTAGE OUTPUT
 
| -
 
|PMIC_3V3
 
|S
 
|
 
|
 
|
 
 
|-
 
|-
|J1.88
+
|Pin ALT-3
|PMIC_3V3
+
|TBD
|VOLTAGE OUTPUT
 
| -
 
|PMIC_3V3
 
|S
 
|
 
|
 
|
 
 
|-
 
|-
|J1.90
+
|Pin ALT-5
|JTMS-SWDIO
+
|TBD
|CPU.JTMS-SWDIO
 
|D15
 
|VDD
 
|I/O
 
|
 
|
 
|
 
 
|-
 
|-
|J1.92
+
| rowspan="5" |J1.150
|JTDI
+
| rowspan="5" |PE11
|CPU.JTDI
+
| rowspan="5" |CPU.PE11
|D13
+
| rowspan="5" |C1
|VDD
+
| rowspan="5" |VDD
|I/O
+
| rowspan="5" |I/O
|
+
| rowspan="5" |TBD
|
+
|Pin ALT-0
|
+
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 
|-
 
|-
|J1.94
+
|Pin ALT-2
|NJTRST
+
|TBD
|CPU.NJTRST
 
|D12
 
|VDD
 
|I/O
 
|
 
|
 
|
 
 
|-
 
|-
|J1.96
+
|Pin ALT-3
|JTDO-TRACESWOO
+
|TBD
|CPU.JTDO-TRACESWOO
 
|D14
 
|VDD
 
|I/O
 
|
 
|
 
|
 
 
|-
 
|-
|J1.98
+
|Pin ALT-5
|JTCK-SWCLK
+
|TBD
|CPU.JTCK-SWCLK
 
|D16
 
|VDD
 
|I/O
 
|
 
|
 
|
 
 
|-
 
|-
|J1.100
+
| rowspan="5" |J1.152
|DGND
+
| rowspan="5" |PB10
|DGND
+
| rowspan="5" |CPU.PB10
| -
+
| rowspan="5" |W5
| -
+
| rowspan="5" |VDD
|G
+
| rowspan="5" |I/O
|
+
| rowspan="5" |TBD
|
+
|Pin ALT-0
|
+
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 
|-
 
|-
|J1.102
+
|Pin ALT-2
|NRST_CORE
+
|TBD
|CPU.NRST_CORE
 
|J2
 
|VDD
 
|I
 
|internally connected to NRST
 
|
 
|
 
 
|-
 
|-
|J1.104
+
|Pin ALT-3
|PDR_ON
+
|TBD
|CPU.PDR_ON
 
|N2
 
|VDD
 
|I
 
|
 
|
 
|
 
 
|-
 
|-
|J1.106
+
|Pin ALT-5
|PDR_ON_CORE
+
|TBD
|CPU.PDR_ON_CORE
 
|N1
 
|VDD
 
|I
 
|
 
|
 
|
 
 
|-
 
|-
|J1.108
+
| rowspan="5" |J1.154
|PWR_LP
+
| rowspan="5" |PF11
|CPU.PWR_LP
+
| rowspan="5" |CPU.PF11
|P1
+
| rowspan="5" |U5
|VDD
+
| rowspan="5" |VDD
|O
+
| rowspan="5" |I/O
|
+
| rowspan="5" |TBD
|
+
|Pin ALT-0
|
+
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 
|-
 
|-
|J1.110
+
|Pin ALT-2
| -
+
|TBD
|NC
 
| -
 
| -
 
| -
 
|
 
|
 
|
 
 
|-
 
|-
|J1.112
+
|Pin ALT-3
| -
+
|TBD
|NC
 
| -
 
| -
 
| -
 
|
 
|
 
|
 
 
|-
 
|-
|J1.114
+
|Pin ALT-5
| -
+
|TBD
|NC
 
| -
 
| -
 
| -
 
|
 
|
 
|
 
 
|-
 
|-
|J1.116
+
| rowspan="5" |J1.156
| -
+
| rowspan="5" |PC7
|NC
+
| rowspan="5" |CPU.PC7
| -
+
| rowspan="5" |A9
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
| rowspan="5" |J1.158
 +
| rowspan="5" |PD3_OPT
 +
| rowspan="5" | -
 +
| rowspan="5" | -
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
| rowspan="5" |J1.160
 +
| rowspan="5" |PC10
 +
| rowspan="5" |CPU.PC10
 +
| rowspan="5" |D11
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
| rowspan="5" |J1.162
 +
| rowspan="5" |PB0
 +
| rowspan="5" |CPU.PB0
 +
| rowspan="5" |W3
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
|J1.164
 +
|DGND
 +
|DGND
 
| -
 
| -
 
| -
 
| -
 +
|G
 
|
 
|
 
|
 
|
 
|
 
|
 
|-
 
|-
|J1.118
+
| rowspan="5" |J1.166
| -
+
| rowspan="5" |PA5
|NC
+
| rowspan="5" |CPU.PA5
| -
+
| rowspan="5" |P4
| -
+
| rowspan="5" |VDD
| -
+
| rowspan="5" |I/O
|
+
| rowspan="5" |TBD
|
+
|Pin ALT-0
|
+
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 
|-
 
|-
|J1.120
+
|Pin ALT-2
| -
+
|TBD
|NC
 
| -
 
| -
 
| -
 
|
 
|
 
|
 
 
|-
 
|-
|J1.122
+
|Pin ALT-3
|DGND
+
|TBD
|DGND
 
| -
 
| -
 
|G
 
|
 
|
 
|
 
 
|-
 
|-
| rowspan="9" |J1.124
+
|Pin ALT-5
| rowspan="9" |PE13
+
|TBD
| rowspan="9" |CPU.PE13
 
| rowspan="9" |C2
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |
 
|Pin AF0
 
|HDP2
 
 
|-
 
|-
|Pin AF1
+
| rowspan="5" |J1.168
|TIM1_CH3
+
| rowspan="5" |PC0
 +
| rowspan="5" |CPU.PC0
 +
| rowspan="5" |T7
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF3
+
|Pin ALT-1
|DFSDM1_CKIN5
+
|TBD
 
|-
 
|-
|Pin AF5
+
|Pin ALT-2
|SPI4_MISO
+
|TBD
 
|-
 
|-
|Pin AF10
+
|Pin ALT-3
|SAI2_FS_B
+
|TBD
 
|-
 
|-
|Pin AF12
+
|Pin ALT-5
|FMC_AD10/FMC_D10
+
|TBD
 
|-
 
|-
|Pin AF13
+
| rowspan="5" |J1.170
|DCMI_D6
+
| rowspan="5" |PB1
 +
| rowspan="5" |CPU.PB1
 +
| rowspan="5" |V3
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF14
+
|Pin ALT-1
|LCD_DE
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-2
|EVENTOUT
+
|TBD
 
|-
 
|-
|J1.126
+
|Pin ALT-3
|PC13
+
|TBD
|CPU.PC13
 
|K3
 
|VDD
 
|I/O
 
|internally used for PMIC,
 
do not connect
 
|
 
|
 
 
|-
 
|-
| rowspan="12" |J1.128
+
|Pin ALT-5
| rowspan="12" |PA4
+
|TBD
| rowspan="12" |CPU.PA4
 
| rowspan="12" |R4
 
| rowspan="12" |VDD
 
| rowspan="12" |I/O
 
| rowspan="12" |
 
|Pin AF0
 
|HDP0
 
 
|-
 
|-
|Pin AF2
+
| rowspan="5" |J1.172
|TIM5_ETR
+
| rowspan="5" |PE15
 +
| rowspan="5" |CPU.PE15
 +
| rowspan="5" |E1
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF4
+
|Pin ALT-1
|SAI4_D2
+
|TBD
 
|-
 
|-
|Pin AF5
+
|Pin ALT-2
|SPI1_NSS/I2S1_WS
+
|TBD
 
|-
 
|-
|Pin AF6
+
|Pin ALT-3
|SPI3_NSS/I2S3_WS
+
|TBD
 
|-
 
|-
|Pin AF7
+
|Pin ALT-5
|USART2_CK
+
|TBD
 
|-
 
|-
|Pin AF8
+
| rowspan="5" |J1.174
|SPI6_NSS
+
| rowspan="5" |PE4_OPT
 +
| rowspan="5" | -
 +
| rowspan="5" | -
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF12
+
|Pin ALT-1
|SAI4_FS_A
+
|TBD
 
|-
 
|-
|Pin AF13
+
|Pin ALT-2
|DCMI_HSYNC
+
|TBD
 
|-
 
|-
|Pin AF14
+
|Pin ALT-3
|LCD_VSYNC
+
|TBD
 
|-
 
|-
|Pin AF15
+
|Pin ALT-5
|EVENTOUT
+
|TBD
 
|-
 
|-
|Additional
+
| rowspan="5" |J1.176
functions
+
| rowspan="5" |PA10
|ADC1_INP18
+
| rowspan="5" |CPU.PA10
 
+
| rowspan="5" |T16
ADC2_INP18
+
| rowspan="5" |VDD
 
+
| rowspan="5" |I/O
DAC_OUT1
+
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|J1.130
+
|Pin ALT-1
 
+
|TBD
(eMMC 8-bit
 
 
 
on board)
 
|PC6_OPT
 
|CPU.PC6
 
|D10
 
|VDD
 
|I/O
 
|internally used for eMMC,
 
do not connect
 
|
 
|
 
 
|-
 
|-
| rowspan="14" |J1.130
+
|Pin ALT-2
| rowspan="14" |PC6_OPT
+
|TBD
| rowspan="14" | CPU.PC6
 
| rowspan="14" | D10
 
| rowspan="14" |VDD
 
| rowspan="14" |I/O
 
| rowspan="14" |
 
|Pin AF0
 
|HDP1
 
 
|-
 
|-
|Pin AF2
+
|Pin ALT-3
|TIM3_CH1
+
|TBD
 
|-
 
|-
|Pin AF3
+
|Pin ALT-5
|TIM8_CH1
+
|TBD
 
|-
 
|-
|Pin AF4
+
| rowspan="5" |J1.178
|DFSDM1_CKIN3
+
| rowspan="5" |PE5
 +
| rowspan="5" |CPU.PE5
 +
| rowspan="5" |B7
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF5
+
|Pin ALT-1
|I2S2_MCK
+
|TBD
 
|-
 
|-
|Pin AF7
+
|Pin ALT-2
|USART6_TX
+
|TBD
 
|-
 
|-
|Pin AF8
+
|Pin ALT-3
|SDMMC1_D0DIR
+
|TBD
 
|-
 
|-
|Pin AF9
+
|Pin ALT-5
|SDMMC2_D0DIR
+
|TBD
 
|-
 
|-
|Pin AF10
+
| rowspan="5" |J1.180
|SDMMC2_D6
+
| rowspan="5" |PE6_OPT
 +
| rowspan="5" | -
 +
| rowspan="5" | -
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF11
+
|Pin ALT-1
|DSI_TE
+
|TBD
 
|-
 
|-
|Pin AF12
+
|Pin ALT-2
|SDMMC1_D6
+
|TBD
 
|-
 
|-
|Pin AF13
+
|Pin ALT-3
|DCMI_D0
+
|TBD
 
|-
 
|-
|Pin AF14
+
|Pin ALT-5
|LCD_HSYNC
+
|TBD
 
|-
 
|-
|Pin AF15
+
| rowspan="5" |J1.182
|EVENTOUT
+
| rowspan="5" |PG13
 +
| rowspan="5" |CPU.PG13
 +
| rowspan="5" |U2
 +
| rowspan="5" |VDD
 +
| rowspan="5" |I/O
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
| rowspan="9" |J1.132
+
|Pin ALT-1
| rowspan="9" |PG7
+
|TBD
| rowspan="9" |CPU.PG7
 
| rowspan="9" |W10
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |
 
|Pin AF0
 
|TRACED5
 
 
|-
 
|-
|Pin AF6
+
|Pin ALT-2
|SAI1_MCLK_A
+
|TBD
 
|-
 
|-
|Pin AF7
+
|Pin ALT-3
|USART6_CK
+
|TBD
 
|-
 
|-
|Pin AF8
+
|Pin ALT-5
|UART8_RTS/UART8_DE
+
|TBD
 
|-
 
|-
|Pin AF9
+
| rowspan="5" |J1.184
|QUADSPI_CLK
+
| rowspan="5" |PA15_OPT
|-
+
| rowspan="5" | -
|Pin AF11
+
| rowspan="5" | -
|QUADSPI_BK2_IO3
+
| rowspan="5" |VDD
|-
+
| rowspan="5" |I/O
|Pin AF13
+
| rowspan="5" |TBD
|DCMI_D13
+
|Pin ALT-0
|-
+
|TBD
|Pin AF14
 
|LCD_CLK
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
| rowspan="9" |J1.134
 
| rowspan="9" |PG10
 
| rowspan="9" |CPU.PG10
 
| rowspan="9" |V7
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |
 
|Pin AF0
 
|TRACED10
 
|-
 
|Pin AF8
 
|UART8_CTS
 
|-
 
|Pin AF9
 
|LCD_G3
 
|-
 
|Pin AF10
 
|SAI2_SD_B
 
|-
 
|Pin AF11
 
|QUADSPI_BK2_IO2
 
|-
 
|Pin AF12
 
|FMC_NE3
 
|-
 
|Pin AF13
 
|DCMI_D2
 
|-
 
|Pin AF14
 
|LCD_B2
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
| rowspan="10" |J1.136
 
| rowspan="10" |PD10
 
| rowspan="10" |CPU.PD10
 
| rowspan="10" |C5
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |
 
|Pin AF0
 
|RTC_REFIN
 
|-
 
|Pin AF1
 
|TIM16_BKIN
 
|-
 
|Pin AF3
 
|DFSDM1_CKOUT
 
|-
 
|Pin AF4
 
|I2C5_SMBA
 
|-
 
|Pin AF5
 
|SPI3_MISO/I2S3_SDI
 
|-
 
|Pin AF6
 
|SAI3_FS_B
 
|-
 
|Pin AF7
 
|USART3_CK
 
|-
 
|Pin AF12
 
|FMC_AD15/FMC_D15
 
|-
 
|Pin AF14
 
|LCD_B3
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
| rowspan="8" |J1.138
 
| rowspan="8" |PE12
 
| rowspan="8" |CPU.PE12
 
| rowspan="8" |D2
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |
 
|Pin AF1
 
|TIM1_CH3N
 
|-
 
|Pin AF3
 
|DFSDM1_DATIN5
 
|-
 
|Pin AF5
 
|SPI4_SCK
 
|-
 
|Pin AF8
 
|SDMMC1_D0DIR
 
|-
 
|Pin AF10
 
|SAI2_SCK_B
 
|-
 
|Pin AF12
 
|FMC_AD9/FMC_D9
 
|-
 
|Pin AF14
 
|LCD_B4
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
| rowspan="10" |J1.140
 
| rowspan="10" |PA3
 
| rowspan="10" |CPU.PA3
 
| rowspan="10" |P3
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |
 
|Pin AF1
 
|TIM2_CH4
 
|-
 
|Pin AF2
 
|TIM5_CH4
 
|-
 
|Pin AF3
 
|LPTIM5_OUT
 
|-
 
|Pin AF4
 
|TIM15_CH2
 
|-
 
|Pin AF7
 
|USART2_RX
 
|-
 
|Pin AF9
 
|LCD_B2
 
|-
 
|Pin AF11
 
|ETH1_GMII_COL/
 
 
 
ETH1_MII_COL
 
|-
 
|Pin AF14
 
|LCD_B5
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
|Additional
 
functions
 
|ADC1_INP15
 
 
 
PVD_IN
 
|-
 
| rowspan="16" |J1.142
 
| rowspan="16" |PB8
 
| rowspan="16" |CPU.PB8
 
| rowspan="16" |W6
 
| rowspan="16" |VDD
 
| rowspan="16" |I/O
 
| rowspan="16" |
 
|Pin AF0
 
|HDP6
 
|-
 
|Pin AF1
 
|TIM16_CH1
 
|-
 
|Pin AF2
 
|TIM4_CH3
 
|-
 
|Pin AF3
 
|DFSDM1_CKIN7
 
|-
 
|Pin AF4
 
|I2C1_SCL
 
|-
 
|Pin AF5
 
|SDMMC1_CKIN
 
|-
 
|Pin AF6
 
|I2C4_SCL
 
|-
 
|Pin AF7
 
|SDMMC2_CKIN
 
|-
 
|Pin AF8
 
|UART4_RX
 
|-
 
|Pin AF9
 
|FDCAN1_RX
 
|-
 
|Pin AF10
 
|SDMMC2_D4
 
|-
 
|Pin AF11
 
|ETH1_GMII_TXD3/
 
 
 
ETH1_MII_TXD3/
 
 
 
ETH1_RGMII_TXD3
 
|-
 
|Pin AF12
 
|SDMMC1_D4
 
|-
 
|Pin AF13
 
|DCMI_D6
 
|-
 
|Pin AF14
 
|LCD_B6
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
| rowspan="16" |J1.144
 
| rowspan="16" |PB9
 
| rowspan="16" |CPU.PB9
 
| rowspan="16" |D9
 
| rowspan="16" |VDD
 
| rowspan="16" |I/O
 
| rowspan="16" |
 
|Pin AF0
 
|HDP7
 
|-
 
|Pin AF1
 
|TIM17_CH1
 
|-
 
|Pin AF2
 
|TIM4_CH4
 
|-
 
|Pin AF3
 
|DFSDM1_DATIN7
 
|-
 
|Pin AF4
 
|I2C1_SDA
 
|-
 
|Pin AF5
 
|SPI2_NSS/I2S2_WS
 
|-
 
|Pin AF6
 
|I2C4_SDA
 
|-
 
|Pin AF7
 
|SDMMC2_CDIR
 
|-
 
|Pin AF8
 
|UART4_TX
 
|-
 
|Pin AF9
 
|FDCAN1_TX
 
|-
 
|Pin AF10
 
|SDMMC2_D5
 
|-
 
|Pin AF11
 
|SDMMC1_CDIR
 
|-
 
|Pin AF12
 
|SDMMC1_D5
 
|-
 
|Pin AF13
 
|DCMI_D7
 
|-
 
|Pin AF14
 
|LCD_B7
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
|J1.146
 
|DGND
 
|DGND
 
| -
 
| -
 
|G
 
|
 
|
 
|
 
|-
 
| rowspan="13" |J1.148
 
| rowspan="13" |PA6
 
| rowspan="13" |CPU.PA6
 
| rowspan="13" |T5
 
| rowspan="13" |VDD
 
| rowspan="13" |I/O
 
| rowspan="13" |
 
|Pin AF1
 
|TIM1_BKIN
 
|-
 
|Pin AF2
 
|TIM3_CH1
 
|-
 
|Pin AF3
 
|TIM8_BKIN
 
|-
 
|Pin AF4
 
|SAI4_CK2
 
|-
 
|Pin AF5
 
|SPI1_MISO/I2S1_SDI
 
|-
 
|Pin AF8
 
|SPI6_MISO
 
|-
 
|Pin AF9
 
|TIM13_CH1
 
|-
 
|Pin AF11
 
|MDIOS_MDC
 
|-
 
|Pin AF12
 
|SAI4_SCK_A
 
|-
 
|Pin AF13
 
|DCMI_PIXCLK
 
|-
 
|Pin AF14
 
|LCD_G2
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
|Additional
 
functions
 
|ADC1_INP3
 
 
 
ADC2_INP3
 
|-
 
| rowspan="9" |J1.150
 
| rowspan="9" |PE11
 
| rowspan="9" |CPU.PE11
 
| rowspan="9" |C1
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |
 
|Pin AF1
 
|TIM1_CH2
 
|-
 
|Pin AF3
 
|DFSDM1_CKIN4
 
|-
 
|Pin AF5
 
|SPI4_NSS
 
|-
 
|Pin AF7
 
|USART6_CK
 
|-
 
|Pin AF10
 
|SAI2_SD_B
 
|-
 
|Pin AF12
 
|FMC_AD8/FMC_D8
 
|-
 
|Pin AF13
 
|DCMI_D4
 
|-
 
|Pin AF14
 
|LCD_G3
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
| rowspan="10" |J1.152
 
| rowspan="10" |PB10
 
| rowspan="10" |CPU.PB10
 
| rowspan="10" |W5
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |
 
|Pin AF1
 
|TIM2_CH3
 
|-
 
|Pin AF3
 
|LPTIM2_IN1
 
|-
 
|Pin AF4
 
|I2C2_SCL
 
|-
 
|Pin AF5
 
|SPI2_SCK/I2S2_CK
 
|-
 
|Pin AF6
 
|DFSDM1_DATIN7
 
|-
 
|Pin AF7
 
|USART3_TX
 
|-
 
|Pin AF9
 
|QUADSPI_BK1_NCS
 
|-
 
|Pin AF11
 
|ETH1_GMII_RX_ER/
 
 
 
ETH1_MII_RX_ER
 
|-
 
|Pin AF14
 
|LCD_G4
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
| rowspan="6" |J1.154
 
| rowspan="6" |PF11
 
| rowspan="6" |CPU.PF11
 
| rowspan="6" |U5
 
| rowspan="6" |VDD
 
| rowspan="6" |I/O
 
| rowspan="6" |
 
|Pin AF5
 
|SPI5_MOS
 
|-
 
|Pin AF10
 
|SAI2_SD_B
 
|-
 
|Pin AF13
 
|DCMI_D12
 
|-
 
|Pin AF14
 
|LCD_G5
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
|Additional
 
functions
 
|ADC1_INP2
 
|-
 
| rowspan="13" |J1.156
 
| rowspan="13" |PC7
 
| rowspan="13" |CPU.PC7
 
| rowspan="13" |A9
 
| rowspan="13" |VDD
 
| rowspan="13" |I/O
 
| rowspan="13" |
 
|Pin AF0
 
|HDP4
 
|-
 
|Pin AF2
 
|TIM3_CH2
 
|-
 
|Pin AF3
 
|TIM8_CH2
 
|-
 
|Pin AF4
 
|DFSDM1_DATIN3
 
|-
 
|Pin AF6
 
|I2S3_MCK
 
|-
 
|Pin AF7
 
|USART6_RX
 
|-
 
|Pin AF8
 
|SDMMC1_D123DIR
 
|-
 
|Pin AF9
 
|SDMMC2_D123DIR
 
|-
 
|Pin AF10
 
|SDMMC2_D7
 
|-
 
|Pin AF12
 
|SDMMC1_D7
 
|-
 
|Pin AF13
 
|DCMI_D1
 
|-
 
|Pin AF14
 
|LCD_G6
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
|J1.158
 
 
 
(eMMC 8-bit
 
 
 
on board)
 
|PD3_OPT
 
|CPU.PD3
 
|C6
 
|VDD
 
|I/O
 
|internally used for eMMC,
 
do not connect
 
|
 
|
 
|-
 
| rowspan="13" |J1.158
 
| rowspan="13" |PD3_OPT
 
| rowspan="13" | CPU.PD3
 
| rowspan="13" | C6
 
| rowspan="13" |VDD
 
| rowspan="13" |I/O
 
| rowspan="13" |
 
|Pin AF0
 
|HDP5
 
|-
 
|Pin AF3
 
|DFSDM1_CKOUT
 
|-
 
|Pin AF5
 
|SPI2_SCK/I2S2_CK
 
|-
 
|Pin AF6
 
|DFSDM1_DATIN0
 
|-
 
|Pin AF7
 
|USART2_CTS/USART2_NSS
 
|-
 
|Pin AF8
 
|SDMMC1_D123DIR
 
|-
 
|Pin AF9
 
|SDMMC2_D7
 
|-
 
|Pin AF10
 
|SDMMC2_D123DIR
 
|-
 
|Pin AF11
 
|SDMMC1_D7
 
|-
 
|Pin AF12
 
|FMC_CLK
 
|-
 
|Pin AF13
 
|DCMI_D5
 
|-
 
|Pin AF14
 
|LCD_G7
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
| rowspan="11" |J1.160
 
| rowspan="11" |PC10
 
| rowspan="11" |CPU.PC10
 
| rowspan="11" |D11
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |
 
|Pin AF0
 
|TRACED2
 
|-
 
|Pin AF3
 
|DFSDM1_CKIN5
 
|-
 
|Pin AF6
 
|SPI3_SCK/I2S3_CK
 
|-
 
|Pin AF7
 
|USART3_TX
 
|-
 
|Pin AF8
 
|UART4_TX
 
|-
 
|Pin AF9
 
|QUADSPI_BK1_IO1
 
|-
 
|Pin AF10
 
|SAI4_MCLK_B
 
|-
 
|Pin AF12
 
|SDMMC1_D2
 
|-
 
|Pin AF13
 
|DCMI_D8
 
|-
 
|Pin AF14
 
|LCD_R2
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
| rowspan="11" |J1.162
 
| rowspan="11" |PB0
 
| rowspan="11" |CPU.PB0
 
| rowspan="11" |W3
 
| rowspan="11" |VDD
 
| rowspan="11" |I/O
 
| rowspan="11" |
 
|Pin AF1
 
|TIM1_CH2N
 
|-
 
|Pin AF2
 
|TIM3_CH3
 
|-
 
|Pin AF3
 
|TIM8_CH2N
 
|-
 
|Pin AF6
 
|DFSDM1_CKOUT
 
|-
 
|Pin AF8
 
|UART4_CTS
 
|-
 
|Pin AF9
 
|LCD_R3
 
|-
 
|Pin AF11
 
|ETH1_GMII_RXD2/
 
 
 
ETH1_MII_RXD2/
 
 
 
ETH1_RGMII_RXD2
 
|-
 
|Pin AF12
 
|MDIOS_MDIO
 
|-
 
|Pin AF14
 
|LCD_G1
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
|Additional
 
functions
 
|ADC1_INP9
 
 
 
ADC1_INN5
 
 
 
ADC2_INP9
 
 
 
ADC2_INN5
 
|-
 
|J1.164
 
|DGND
 
|DGND
 
| -
 
| -
 
|G
 
|
 
|
 
|
 
|-
 
| rowspan="9" |J1.166
 
| rowspan="9" |PA5
 
| rowspan="9" |CPU.PA5
 
| rowspan="9" |P4
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |
 
|Pin AF1
 
|TIM2_CH1/TIM2_ETR
 
|-
 
|Pin AF3
 
|TIM8_CH1N
 
|-
 
|Pin AF4
 
|SAI4_CK1
 
|-
 
|Pin AF5
 
|SPI1_SCK/I2S1_CK
 
|-
 
|Pin AF8
 
|SPI6_SCK
 
|-
 
|Pin AF12
 
|SAI4_MCLK_A
 
|-
 
|Pin AF14
 
|LCD_R4
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
|Additional
 
functions
 
|ADC1_INP19
 
 
 
ADC1_INN18
 
 
 
ADC2_INP19
 
 
 
ADC2_INN18
 
 
 
DAC_OUT2
 
|-
 
| rowspan="8" |J1.168
 
| rowspan="8" |PC0
 
| rowspan="8" |CPU.PC0
 
| rowspan="8" |T7
 
| rowspan="8" |VDD
 
| rowspan="8" |I/O
 
| rowspan="8" |
 
|Pin AF3
 
|DFSDM1_CKIN0
 
|-
 
|Pin AF4
 
|LPTIM2_IN2
 
|-
 
|Pin AF6
 
|DFSDM1_DATIN4
 
|-
 
|Pin AF8
 
|SAI2_FS_B
 
|-
 
|Pin AF10
 
|QUADSPI_BK2_NCS
 
|-
 
|Pin AF14
 
|LCD_R5
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
|Additional
 
functions
 
|ADC1_INP10
 
 
 
ADC2_INP10
 
|-
 
| rowspan="10" |J1.170
 
| rowspan="10" |PB1
 
| rowspan="10" |CPU.PB1
 
| rowspan="10" |V3
 
| rowspan="10" |VDD
 
| rowspan="10" |I/O
 
| rowspan="10" |
 
|Pin AF1
 
|TIM1_CH3N
 
|-
 
|Pin AF2
 
|TIM3_CH4
 
|-
 
|Pin AF3
 
|TIM8_CH3N
 
|-
 
|Pin AF6
 
|DFSDM1_DATIN1
 
|-
 
|Pin AF9
 
|LCD_R6
 
|-
 
|Pin AF11
 
|ETH1_GMII_RXD3/
 
 
 
ETH1_MII_RXD3/
 
 
 
ETH1_RGMII_RXD3
 
|-
 
|Pin AF12
 
|MDIOS_MDC
 
|-
 
|Pin AF14
 
|LCD_G0
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
|Additional
 
functions
 
|ADC1_INP5
 
 
 
ADC2_INP5
 
|-
 
| rowspan="9" |J1.172
 
| rowspan="9" |PE15
 
| rowspan="9" |CPU.PE15
 
| rowspan="9" |E1
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |
 
|Pin AF0
 
|HDP3
 
|-
 
|Pin AF1
 
|TIM1_BKIN
 
|-
 
|Pin AF4
 
|TIM15_BKIN
 
|-
 
|Pin AF7
 
|USART2_CTS/USART2_NSS
 
|-
 
|Pin AF8
 
|UART8_CTS
 
|-
 
|Pin AF10
 
|FMC_NCE2
 
|-
 
|Pin AF12
 
|FMC_AD12/FMC_D12
 
|-
 
|Pin AF14
 
|LCD_R7
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
|J1.174
 
 
 
(eMMC 8-bit
 
 
 
on board)
 
|PE4_OPT
 
|CPU.PE4
 
|B11
 
|VDD
 
|I/O
 
|internally used for eMMC,
 
do not connect
 
|
 
|
 
|-
 
| rowspan="14" |J1.174
 
| rowspan="14" |PE4_OPT
 
| rowspan="14" | CPU.PE4
 
| rowspan="14" | B11
 
| rowspan="14" |VDD
 
| rowspan="14" |I/O
 
| rowspan="14" |
 
|Pin AF0
 
|TRACED1
 
|-
 
|Pin AF2
 
|SAI1_D2
 
|-
 
|Pin AF3
 
|DFSDM1_DATIN3
 
|-
 
|Pin AF4
 
|TIM15_CH1N
 
|-
 
|Pin AF5
 
|SPI4_NSS
 
|-
 
|Pin AF6
 
|SAI1_FS_A
 
|-
 
|Pin AF7
 
|SDMMC2_CKIN
 
|-
 
|Pin AF8
 
|SDMMC1_CKIN
 
|-
 
|Pin AF9
 
|SDMMC2_D4
 
|-
 
|Pin AF11
 
|SDMMC1_D4
 
|-
 
|Pin AF12
 
|FMC_A20
 
|-
 
|Pin AF13
 
|DCMI_D4
 
|-
 
|Pin AF14
 
|LCD_B0
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
| rowspan="9" |J1.176
 
| rowspan="9" |PA10
 
| rowspan="9" |CPU.PA10
 
| rowspan="9" |T16
 
| rowspan="9" |VDD
 
| rowspan="9" |I/O
 
| rowspan="9" |
 
|Pin AF1
 
|TIM1_CH3
 
|-
 
|Pin AF5
 
|SPI3_NSS/I2S3_WS
 
|-
 
|Pin AF7
 
|USART1_RX
 
|-
 
|Pin AF11
 
|MDIOS_MDIO
 
|-
 
|Pin AF12
 
|SAI4_FS_B
 
|-
 
|Pin AF13
 
|DCMI_D1
 
|-
 
|Pin AF14
 
|LCD_B1
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
|Additional
 
functions
 
|OTG_FS_ID
 
 
 
OTG_HS_ID
 
|-
 
| rowspan="14" |J1.178
 
| rowspan="14" |PE5
 
| rowspan="14" |CPU.PE5
 
| rowspan="14" |B7
 
| rowspan="14" |VDD
 
| rowspan="14" |I/O
 
| rowspan="14" |
 
|Pin AF0
 
|TRACED3
 
|-
 
|Pin AF2
 
|SAI1_CK2
 
|-
 
|Pin AF3
 
|DFSDM1_CKIN3
 
|-
 
|Pin AF4
 
|TIM15_CH1
 
|-
 
|Pin AF5
 
|SPI4_MISO
 
|-
 
|Pin AF6
 
|SAI1_SCK_A
 
|-
 
|Pin AF7
 
|SDMMC2_D0DIR
 
|-
 
|Pin AF8
 
|SDMMC1_D0DIR
 
|-
 
|Pin AF9
 
|SDMMC2_D6
 
|-
 
|Pin AF11
 
|SDMMC1_D6
 
|-
 
|Pin AF12
 
|FMC_A21
 
|-
 
|Pin AF13
 
|DCMI_D6
 
|-
 
|Pin AF14
 
|LCD_G0
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
| rowspan="13" |J1.180
 
| rowspan="13" |PE6_OPT
 
| rowspan="13" | CPU.PE6
 
| rowspan="13" | B3
 
| rowspan="13" |VDD
 
| rowspan="13" |I/O
 
| rowspan="13" |for SDMMC1_D2 function
 
use pin J1.79
 
 
 
(SDMMC lenght match)
 
|Pin AF0
 
|TRACED2
 
|-
 
|Pin AF1
 
|TIM1_BKIN2
 
|-
 
|Pin AF2
 
|SAI1_D1
 
|-
 
|Pin AF4
 
|TIM15_CH2
 
|-
 
|Pin AF5
 
|SPI4_MOSI
 
|-
 
|Pin AF6
 
|SAI1_SD_A
 
|-
 
|Pin AF7
 
|SDMMC2_D0
 
|-
 
|<s>Pin AF8</s>
 
|<s>SDMMC1_D2</s>
 
|-
 
|Pin AF10
 
|SAI2_MCLK_B
 
|-
 
|Pin AF12
 
|FMC_A22
 
|-
 
|Pin AF13
 
|DCMI_D7
 
|-
 
|Pin AF14
 
|LCD_G1
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
| rowspan="12" |J1.182
 
| rowspan="12" |PG13
 
| rowspan="12" |CPU.PG13
 
| rowspan="12" |U2
 
| rowspan="12" |VDD
 
| rowspan="12" |I/O
 
| rowspan="12" |
 
|Pin AF0
 
|TRACED0
 
|-
 
|Pin AF1
 
|LPTIM1_OUT
 
|-
 
|Pin AF2
 
|SAI1_CK2
 
|-
 
|Pin AF4
 
|SAI4_CK1
 
|-
 
|Pin AF5
 
|SPI6_SCK
 
|-
 
|Pin AF6
 
|SAI1_SCK_A
 
|-
 
|Pin AF7
 
|USART6_CTS/USART6_NSS
 
|-
 
|Pin AF10
 
|SAI4_MCLK_A
 
|-
 
|Pin AF11
 
|ETH1_GMII_TXD0/
 
 
 
ETH1_MII_TXD0/
 
 
 
ETH1_RGMII_TXD0/
 
 
 
ETH1_RMII_TXD0
 
|-
 
|Pin AF12
 
|FMC_A24
 
|-
 
|Pin AF14
 
|LCD_R0
 
|-
 
|Pin AF15
 
|EVENTOUT
 
|-
 
|J1.184
 
 
 
(eMMC 8-bit
 
 
 
on board)
 
|PA15_OPT
 
|CPU.PA15
 
|C7
 
|VDD
 
|I/O
 
|internally used for eMMC,
 
do not connect
 
|
 
|
 
 
|-
 
|-
| rowspan="16" |J1.184
+
|Pin ALT-1
| rowspan="16" |PA15_OPT
+
|TBD
| rowspan="16" | CPU.PA15
 
| rowspan="16" | C7
 
| rowspan="16" |VDD
 
| rowspan="16" |I/O
 
| rowspan="16" |
 
|Pin AF0
 
|DBTRGI
 
 
|-
 
|-
|Pin AF1
+
|Pin ALT-2
|TIM2_CH1/TIM2_ETR
+
|TBD
 
|-
 
|-
|Pin AF2
+
|Pin ALT-3
|SAI4_D2
+
|TBD
 
|-
 
|-
|Pin AF3
+
|Pin ALT-5
|SDMMC1_CDIR
+
|TBD
 
|-
 
|-
|Pin AF4
+
| rowspan="5" |J1.186
|CEC
+
| rowspan="5" |VBUS_OTG_IN
 +
| rowspan="5" |CPU.OTG_VBUS
 +
| rowspan="5" |U15
 +
| rowspan="5" |VBUS_OTG_IN
 +
| rowspan="5" |S
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF5
+
|Pin ALT-1
|SPI1_NSS/I2S1_WS
+
|TBD
 
|-
 
|-
|Pin AF6
+
|Pin ALT-2
|SPI3_NSS/I2S3_WS
+
|TBD
 
|-
 
|-
|Pin AF7
+
|Pin ALT-3
|SPI6_NSS
+
|TBD
 
|-
 
|-
|Pin AF8
+
|Pin ALT-5
|UART4_RTS/UART4_DE
+
|TBD
 
|-
 
|-
|Pin AF9
+
| rowspan="5" |J1.188
|SDMMC2_D5
+
| rowspan="5" |VBUS_SW
 +
| rowspan="5" |PMIC.SWOUT
 +
| rowspan="5" |38
 +
| rowspan="5" |VBUS_SW
 +
| rowspan="5" |S
 +
| rowspan="5" |TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
|Pin AF10
+
|Pin ALT-1
|SDMMC2_CDIR
+
|TBD
 
|-
 
|-
|Pin AF11
+
|Pin ALT-2
|SDMMC1_D5
+
|TBD
 
|-
 
|-
|Pin AF12
+
|Pin ALT-3
|SAI4_FS_A
+
|TBD
|-
 
|Pin AF13
 
|UART7_TX
 
|-
 
|Pin AF14
 
|LCD_R1
 
 
|-
 
|-
|Pin AF15
+
|Pin ALT-5
|EVENTOUT
+
|TBD
|-
 
|J1.186
 
|VBUS_OTG_IN
 
|CPU.OTG_VBUS
 
|U15
 
|VBUS_OTG_IN
 
|S
 
|
 
|
 
|
 
|-
 
|J1.188
 
|VBUS_SW
 
|PMIC.SWOUT
 
|38
 
|VBUS_SW
 
|S
 
|
 
|
 
|
 
 
|-
 
|-
 
|J1.190
 
|J1.190
Line 4,913: Line 3,761:
 
----
 
----
  
[[Category:ETRA]]
+
[[Category:{{{nome-som}}}]]

Revision as of 07:40, 29 December 2020

History
Version Issue Date Notes
X.Y.Z Month Year TBD
[TBD_link X.Y.Z] Month Year TBD
... ... ...


TBD: modificare la tabella seguente con le caratteristiche dei pin del SOM

TBD: modificare le due tabelle ODD e EVEN con la mappa completa dei pins

TBD: nella tabella naming conventions, inserire il codice dei vari IC presenti (PMIC, PHY ETH, ecc.)

Connectors and Pinout Table[edit | edit source]

Connectors description[edit | edit source]

In the following table are described all available connectors integrated on ETRA:

Connector name Connector Type Notes Carrier board counterpart
J1 SODIMM DDR3 edge connector 204 pin TE Connectivity 2-2013289-1

The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:

File:ETRA-top.png
ETRA TOP view
File:ETRA-bottom.png
ETRA BOTTOM view

Pinout table naming conventions[edit | edit source]

This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the TBD: connector type ETRA connector.

Each row in the pinout tables contains the following information:

Pin Reference to the connector pin
Pin Name Pin (signal) name on the ETRA connectors
Internal
connections
Connections to the ETRA components
  • CPU.<x> : pin connected to CPU pad named <x>
  • PMIC.<x> : pin connected to the Power Manager IC STPMIC1APQR
  • LAN.<x> : pin connected to the LAN PHY KSZ8091RNAIA
  • NOR.<x>: pin connected to the flash NOR
  • NAND.<x>: pin connected to the flash NAND
  • eMMC.<x>: pin connected to the flash eMMC
  • EXP.<x>: pin connected to the I/O EXPANDER ADP5589ACPZ
Ball/pin # Component ball/pin number connected to signal
Voltage I/O voltage levels
Type Pin type:
  • I = Input
  • O = Output
  • D = Differential
  • Z = High impedance
  • S = Power supply voltage
  • G = Ground
  • A = Analog signal
Notes Remarks on special pin characteristics
Pin MUX alternative functions Muxes:
  • Pin ALT-0
  • ...
  • Pin ALT-N

The number of functions depends on platform

Pinout Table ODD pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.1 DGND DGND - - G
J1.3 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.5 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.7 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.9 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.11 DGND DGND - - G
J1.13 ETH_LED LAN.LED0/PME_N1 23 VDD I/O
J1.15 - NC - - -
J1.17 DGND DGND - - G
J1.19 ETH_TX_P LAN.TXP 6 - D
J1.21 ETH_TX_M LAN.TXM 5 - D
J1.23 ETH_RX_P LAN.RXP 4 - D
J1.25 ETH_RX_M LAN.RXM 3 - D
J1.27 LDO2 PMIC.LDO2OUT 18 LDO2 S Spare LDO output
J1.29 LDO5 PMIC.LDO5OUT 20 LDO5 S Spare LDO output
J1.31 - NC - - -
J1.33 - NC - - -
J1.35 DGND DGND - - G
J1.37 PD1 CPU.PD1 A4 VDD I/O Pin AF2 I2C6_SCL
Pin AF3 DFSDM1_DATIN6
Pin AF4 I2C5_SCL
Pin AF6 SAI3_SD_A
Pin AF8 UART4_TX
Pin AF9 FDCAN1_TX
Pin AF10 SDMMC3_D0
Pin AF11 DFSDM1_CKIN7
Pin AF12 FMC_AD3/FMC_D3
Pin AF15 EVENTOUT
J1.39 PD4 CPU.PD4 D6 VDD I/O TBD Pin AF6 SAI3_FS_A
Pin AF7 USART2_RTS/USART2_DE
Pin AF10 SDMMC3_D1
Pin AF11 DFSDM1_CKIN0
Pin AF12 FMC_NOE
Pin AF15 EVENTOUT
J1.41 PD5 CPU.PD5 D7 VDD I/O TBD Pin AF7 USART2_TX
Pin AF10 SDMMC3_D2
Pin AF12 FMC_NWE
Pin AF15 EVENTOUT
J1.43 PD7 CPU.PD7 B4 VDD I/O TBD Pin AF0 TRACED6
Pin AF3 DFSDM1_DATIN4
Pin AF4 I2C2_SCL
Pin AF6 DFSDM1_CKIN1
Pin AF7 USART2_CK
Pin AF9 SPDIFRX_IN1
Pin AF10 SDMMC3_D3
Pin AF12 FMC_NE1
Pin AF15 EVENTOUT
J1.45 PD0 CPU.PD0 A3 VDD I/O TBD Pin AF2 I2C6_SDA
Pin AF3 DFSDM1_CKIN6
Pin AF4 I2C5_SDA
Pin AF6 SAI3_SCK_A
Pin AF8 UART4_RX
Pin AF9 FDCAN1_RX
Pin AF10 SDMMC3_CMD
Pin AF11 DFSDM1_DATIN7
Pin AF12 FMC_AD2/FMC_D2
Pin AF15 EVENTOUT
J1.47 PG15 CPU.PG15 A2 VDD I/O TBD Pin AF0 TRACED7
Pin AF2 SAI1_D2
Pin AF4 I2C2_SDA
Pin AF6 SAI1_FS_A
Pin AF7 USART6_CTS/USART6_NSS
Pin AF10 SDMMC3_CK
Pin AF13 DCMI_D13
Pin AF15 EVENTOUT
J1.49 PF10 CPU.PF10 U9 VDD I/O TBD Pin AF1 TIM16_BKIN
Pin AF2 SAI1_D3
Pin AF3 SAI4_D4
Pin AF6 SAI1_D4
Pin AF9 QUADSPI_CLK
Pin AF12 SAI4_D3
Pin AF13 DCMI_D11
Pin AF14 LCD_DE
Pin AF15 EVENTOUT
J1.51 PE7 CPU.PE7 T10 VDD I/O TBD Pin AF1 TIM1_ETR
Pin AF2 TIM3_ETR
Pin AF3 DFSDM1_DATIN2
Pin AF7 UART7_RX
Pin AF10 QUADSPI_BK2_IO0
Pin AF12 FMC_AD4/FMC_D4
Pin AF15 EVENTOUT
J1.53 PE8 CPU.PE8 T11 VDD I/O TBD Pin AF1 TIM1_CH1N
Pin AF3 DFSDM1_CKIN2
Pin AF7 UART7_TX
Pin AF10 QUADSPI_BK2_IO1
Pin AF12 FMC_AD5/FMC_D5
Pin AF15 EVENTOUT
J1.55 - NC - - -
J1.57 DGND DGND - - G
J1.59 - NC - - -
J1.61 PB14 CPU.PB14 C9 VDD I/O TBD Pin AF1 TIM1_CH2N
Pin AF2 TIM12_CH1
Pin AF3 TIM8_CH2N
Pin AF4 USART1_TX
Pin AF5 SPI2_MISO/I2S2_SDI
Pin AF6 DFSDM1_DATIN2
Pin AF7 USART3_RTS/USART3_DE
Pin AF9 SDMMC2_D0
Pin AF15 EVENTOUT
J1.63 PB15 CPU.PB15 A8 VDD I/O TBD Pin AF0 RTC_REFIN
Pin AF1 TIM1_CH3N
Pin AF2 TIM12_CH2
Pin AF3 TIM8_CH3N
Pin AF4 USART1_RX
Pin AF5 SPI2_MOSI/I2S2_SDO
Pin AF6 DFSDM1_CKIN2
Pin AF9 SDMMC2_D1
Pin AF15 EVENTOUT
J1.65 PB3 CPU.PB3 A7 VDD I/O TBD Pin AF0 TRACED9
Pin AF1 TIM2_CH2
Pin AF4 SAI4_CK1
Pin AF5 SPI1_SCK/I2S1_CK
Pin AF6 SPI3_SCK/I2S3_CK
Pin AF8 SPI6_SCK
Pin AF9 SDMMC2_D2
Pin AF12 SAI4_MCLK_A
Pin AF13 UART7_RX
Pin AF15 EVENTOUT
J1.67 PB4 CPU.PB4 B9 VDD I/O TBD Pin AF0 TRACED8
Pin AF1 TIM16_BKIN
Pin AF2 TIM3_CH1
Pin AF4 SAI4_CK2
Pin AF5 SPI1_MISO/I2S1_SDI
Pin AF6 SPI3_MISO/I2S3_SDI
Pin AF7 SPI2_NSS/I2S2_WS
Pin AF8 SPI6_MISO
Pin AF9 SDMMC2_D3
Pin AF12 SAI4_SCK_A
Pin AF13 UART7_TX
Pin AF15 EVENTOUT
J1.69 PG6 CPU.PG6 A6 VDD I/O TBD Pin AF0 TRACED14
Pin AF1 TIM17_BKIN
Pin AF10 SDMMC2_CMD
Pin AF13 DCMI_D12
Pin AF14 LCD_R7
Pin AF15 EVENTOUT
J1.71 PE3 CPU.PE3 A5 VDD I/O TBD Pin AF0 TRACED0
Pin AF4 TIM15_BKIN
Pin AF6 SAI1_SD_B
Pin AF9 SDMMC2_CK
Pin AF12 FMC_A19
Pin AF15 EVENTOUT
J1.73 DGND DGND - - G
J1.75 PC8 CPU.PC8 C11 VDD I/O TBD Pin AF0 TRACED0
Pin AF2 TIM3_CH3
Pin AF3 TIM8_CH3
Pin AF6 UART4_TX
Pin AF7 USART6_CK
Pin AF8 UART5_RTS/UART5_DE
Pin AF12 SDMMC1_D0
Pin AF13 DCMI_D2
Pin AF15 EVENTOUT
J1.77 PC9 CPU.PC9 A10 VDD I/O TBD Pin AF0 TRACED1
Pin AF2 TIM3_CH4
Pin AF3 TIM8_CH4
Pin AF4 I2C3_SDA
Pin AF5 I2S_CKIN
Pin AF8 UART5_CTS
Pin AF9 QUADSPI_BK1_IO0
Pin AF12 SDMMC1_D1
Pin AF13 DCMI_D3
Pin AF14 LCD_B2
Pin AF15 EVENTOUT
J1.79 PE6 CPU.PE6 B3 VDD I/O TBD Pin AF0 TRACED2
Pin AF1 TIM1_BKIN2
Pin AF2 SAI1_D1
Pin AF4 TIM15_CH2
Pin AF5 SPI4_MOSI
Pin AF6 SAI1_SD_A
Pin AF7 SDMMC2_D0
Pin AF8 SDMMC1_D2
Pin AF10 SAI2_MCLK_B
Pin AF12 FMC_A22
Pin AF13 DCMI_D7
Pin AF14 LCD_G1
Pin AF15 EVENTOUT
J1.81 PC11 CPU.PC11 A11 VDD I/O TBD Pin AF0 TRACED3
Pin AF3 DFSDM1_DATIN5
Pin AF6 SPI3_MISO/I2S3_SDI
Pin AF7 USART3_RX
Pin AF8 UART4_RX
Pin AF9 QUADSPI_BK2_NCS
Pin AF10 SAI4_SCK_B
Pin AF12 SDMMC1_D3
Pin AF13 DCMI_D4
Pin AF15 EVENTOUT
J1.83 PD2 CPU.PD2 B10 VDD I/O TBD Pin AF2 TIM3_ETR
Pin AF4 I2C5_SMBA
Pin AF6 UART4_RX
Pin AF8 UART5_RX
Pin AF12 SDMMC1_CMD
Pin AF13 DCMI_D11
Pin AF15 EVENTOUT
J1.85 PC12 CPU.PC12 C10 VDD I/O TBD Pin AF0 TRACECLK
Pin AF1 MCO2
Pin AF2 SAI4_D3
Pin AF6 SPI3_MOSI/I2S3_SDO
Pin AF7 USART3_CK
Pin AF8 UART5_TX
Pin AF10 SAI4_SD_B
Pin AF12 SDMMC1_CK
Pin AF13 DCMI_D9
Pin AF15 EVENTOUT
J1.87 DGND DGND - - G
J1.89 PD8 CPU.PD8 F2 VDD I/O TBD Pin AF3 DFSDM1_CKIN3
Pin AF6 SAI3_SCK_B
Pin AF7 USART3_TX
Pin AF9 SPDIFRX_IN2
Pin AF12 FMC_AD13/FMC_D13
Pin AF14 LCD_B7
Pin AF15 EVENTOUT
J1.91 PD9 CPU.PD9 G3 VDD I/O TBD Pin AF3 DFSDM1_DATIN3
Pin AF6 SAI3_SD_B
Pin AF7 USART3_RX
Pin AF12 FMC_AD14/FMC_D14
Pin AF13 DCMI_HSYNC
Pin AF14 LCD_B0
Pin AF15 EVENTOUT
J1.93 PC2 CPU.PC2 T2 VDD I/O TBD Pin AF3 DFSDM1_CKIN1
Pin AF5 SPI2_MISO/I2S2_SDI
Pin AF6 DFSDM1_CKOUT
Pin AF11 ETH1_GMII_TXD2/

ETH1_MII_TXD2/

ETH1_RGMII_TXD2

Pin AF13 DCMI_PIXCLK
Pin AF15 EVENTOUT
J1.95 PA0 CPU.PA0 R3 VDD I/O TBD Pin AF1 TIM2_CH1/TIM2_ETR
Pin AF2 TIM5_CH1
Pin AF3 TIM8_ETR
Pin AF4 TIM15_BKIN
Pin AF7 USART2_CTS/USART2_NSS
Pin AF8 UART4_TX
Pin AF9 SDMMC2_CMD
Pin AF10 SAI2_SD_B
Pin AF11 ETH1_GMII_CRS/

ETH1_MII_CRS

Pin AF15 EVENTOUT
J1.97 PD13 CPU.PD13 U12 VDD I/O TBD Pin AF1 LPTIM1_OUT
Pin AF2 TIM4_CH2
Pin AF4 I2C4_SDA
Pin AF5 I2C1_SDA
Pin AF6 I2S3_MCK
Pin AF8 SDMMC1_D123DIR
Pin AF9 SDMMC2_D7
Pin AF10 SDMMC2_D123DIR
Pin AF11 SDMMC1_D7
Pin AF12 FMC_CLK
Pin AF13 DCMI_D5
Pin AF14 LCD_G7
Pin AF15 EVENTOUT
J1.99 PD12 CPU.PD12 U11 VDD I/O TBD Pin AF1 LPTIM1_IN1
Pin AF2 TIM4_CH1
Pin AF3 LPTIM2_IN1
Pin AF4 I2C4_SCL
Pin AF5 I2C1_SCL
Pin AF7 USART3_RTS/USART3_DE
Pin AF9 QUADSPI_BK1_IO1
Pin AF10 SAI2_FS_A
Pin AF12 FMC_A17/FMC_ALE
Pin AF15 EVENTOUT
J1.101 PD11 CPU.PD11 V8 VDD I/O TBD Pin AF3 LPTIM2_IN2
Pin AF4 I2C4_SMBA
Pin AF5 I2C1_SMBA
Pin AF7 USART3_CTS/USART3_NSS
Pin AF9 QUADSPI_BK1_IO0
Pin AF10 SAI2_SD_A
Pin AF12 FMC_A16/FMC_CLE
Pin AF15 EVENTOUT
J1.103 - NC - - -
J1.105 PG9 CPU.PG9 T14 VDD I/O TBD Pin AF0 DBTRGO
Pin AF7 USART6_RX
Pin AF8 SPDIFRX_IN4
Pin AF9 QUADSPI_BK2_IO2
Pin AF10 SAI2_FS_B
Pin AF12 FMC_NE2/FMC_NCE
Pin AF13 DCMI_VSYNC
Pin AF14 LCD_R1
Pin AF15 EVENTOUT
J1.107 - NC - - -
J1.109 DGND DGND - - G
J1.111 DSI_CKN CPU.DSI_CKN A14 - D
J1.113 DSI_CKP CPU.DSI_CKP B14 - D
J1.115 DSI_D0N CPU.DSI_D0N A13 - D
J1.117 DSI_D0P DSI_D0P B13 - D
J1.119 DSI_D1N CPU.DSI_D1N A15 - D
J1.121 DSI_D1P CPU.DSI_D1P B15 - D
J1.123 - NC - - -
J1.125 - NC - - -
J1.127 - NC - - -
J1.129 - NC - - -
J1.131 DGND DGND - - G
J1.133 ADP5589_R7 EXP.R7 1 VDD I/O TBD Pin AF0 Keypad row 7
Pin AF5 GPIO 8
J1.135 ADP5589_R6 EXP.R6 2 VDD I/O TBD Pin AF0 Keypad row 6
Pin AF5 GPIO 7
J1.137 ADP5589_R5 EXP.R5 3 VDD I/O TBD Pin AF0 Keypad row 5
Pin AF5 GPIO 6
J1.139 ADP5589_R4 EXP.R4 4 VDD I/O TBD Pin AF0 Keypad row 4
Pin AF1 RESET1
Pin AF5 GPIO 5
J1.141 ADP5589_R3 EXP.R3 5 VDD I/O TBD Pin AF0 Keypad row 3
Pin AF1 Logic LC1
Pin AF2 PWM_OUT
Pin AF3 CLK_OUT
Pin AF5 GPIO 4
J1.143 ADP5589_R2 EXP.R2 6 VDD I/O TBD Pin AF0 Keypad row 2
Pin AF1 LOGIC LB1
Pin AF5 GPIO 3
J1.145 ADP5589_R1 EXP.R1 7 VDD I/O TBD Pin AF0 Keypad row 1
Pin AF1 Logic LA1
Pin AF5 GPIO 2
J1.147 ADP5589_R0 EXP.R0 8 VDD I/O TBD Pin AF0 Keypad row 0
Pin AF1 Logic LY1
Pin AF5 GPIO 1
J1.149 ADP5589_C0 EXP.C0 9 VDD I/O TBD Pin AF0 Keypad column 0
Pin AF5 GPIO 9
J1.151 ADP5589_C1 EXP.C1 10 VDD I/O TBD Pin AF0 Keypad column 1
Pin AF5 GPIO 10
J1.153 DGND DGND - - G
J1.155 ADP5589_C2 EXP.C2 11 VDD I/O TBD Pin AF0 Keypad column 2
Pin AF5 GPIO 11
J1.157 ADP5589_C3 EXP.C3 12 VDD I/O TBD Pin AF0 Keypad column 3
Pin AF5 GPIO 12
J1.159 ADP5589_C4 EXP.C4 13 VDD I/O TBD Pin AF0 Keypad column 4
Pin AF1 RESET2
Pin AF5 GPIO 13
J1.161 ADP5589_C5 EXP.C5 14 VDD I/O TBD Pin AF0 Keypad column 5
Pin AF5 GPIO 14
J1.163 ADP5589_C6 EXP.C6 15 VDD I/O TBD Pin AF0 Keypad column 6
Pin AF1 Logic LC2
Pin AF2 PWM_IN
Pin AF3 CLK_IN
Pin AF5 GPIO 15
J1.165 ADP5589_C7 EXP.C7 16 VDD I/O TBD Pin AF0 Keypad column 7
Pin AF1 Logic LB2
Pin AF5 GPIO 16
J1.167 ADP5589_C8 EXP.C8 19 VDD I/O TBD Pin AF0 Keypad column 8
Pin AF1 Logic LA2
Pin AF5 GPIO 17
J1.169 ADP5589_C9 EXP.C9 20 VDD I/O TBD Pin AF0 Keypad column 9
Pin AF1 Logic LY2
Pin AF5 GPIO 18
J1.171 ADP5589_C10 EXP.C10 21 VDD I/O TBD Pin AF0 Keypad column 10
Pin AF5 GPIO 19
J1.173 - NC - - -
J1.175 DGND DGND - - G
J1.177 PE9 CPU.PE9 W7 VDD I/O TBD Pin AF1 TIM1_CH1
Pin AF3 DFSDM1_CKOUT
Pin AF7 UART7_RTS/UART7_DE
Pin AF10 QUADSPI_BK2_IO2
Pin AF12 FMC_AD6/FMC_D6
Pin AF15 EVENTOUT
J1.179 PC3 CPU.PC3 T3 VDD I/O TBD Pin AF0 TRACECLK
Pin AF3 DFSDM1_DATIN1
Pin AF5 SPI2_MOSI/I2S2_SDO
Pin AF11 ETH1_GMII_TX_CLK/

ETH1_MII_TX_CLK

Pin AF15 EVENTOUT
J1.181 PD6 CPU.PD6 E3 VDD I/O TBD Pin AF1 TIM16_CH1N
Pin AF2 SAI1_D1
Pin AF3 DFSDM1_CKIN4
Pin AF4 DFSDM1_DATIN1
Pin AF5 SPI3_MOSI/I2S3_SDO
Pin AF6 SAI1_SD_A
Pin AF7 USART2_RX
Pin AF12 FMC_NWAIT
Pin AF13 DCMI_D10
Pin AF14 LCD_B2
Pin AF15 EVENTOUT
J1.183 PE10 CPU.PE10 V10 VDD I/O TBD Pin AF1 TIM1_CH2N
Pin AF3 DFSDM1_DATIN4
Pin AF7 UART7_CTS
Pin AF10 QUADSPI_BK2_IO3
Pin AF12 FMC_AD7/FMC_D7
Pin AF15 EVENTOUT
J1.185 VBUS_OTG_OUT PMIC.VBUSOTG 35 VBUSOTG S USB OTG VOUT
J1.187 PG11 CPU.PG11 V6 VDD I/O TBD Pin AF0 TRACED11
Pin AF4 USART1_TX
Pin AF6 UART4_TX
Pin AF8 SPDIFRX_IN1
Pin AF11 ETH1_GMII_TX_EN/

ETH1_MII_TX_EN/

ETH1_RGMII_TX_CTL/

ETH1_RMII_TX_EN

Pin AF13 DCMI_D3
Pin AF14 LCD_B3
Pin AF15 EVENTOUT
J1.189 PB2 CPU.PB2 T13 VDD I/O TBD Pin AF0 TRACED4
Pin AF1 RTC_OUT2
Pin AF2 SAI1_D1
Pin AF3 DFSDM1_CKIN1
Pin AF4 USART1_RX
Pin AF5 I2S_CKIN
Pin AF6 SAI1_SD_A
Pin AF7 SPI3_MOSI/I2S3_SDO
Pin AF8 UART4_RX
Pin AF9 QUADSPI_CLK
Pin AF15 EVENTOUT
J1.191 PE1 CPU.PE1 B1 VDD I/O TBD Pin AF1 LPTIM1_IN2
Pin AF5 I2S2_MCK
Pin AF6 SAI3_SD_B
Pin AF8 UART8_TX
Pin AF12 FMC_NBL1
Pin AF13 DCMI_D3
Pin AF15 EVENTOUT
J1.193 PE0 CPU.PE0 C4 VDD I/O TBD Pin AF1 LPTIM1_ETR
Pin AF2 TIM4_ETR
Pin AF4 LPTIM2_ETR
Pin AF5 SPI3_SCK/I2S3_CK
Pin AF6 SAI4_MCLK_B
Pin AF8 UART8_RX
Pin AF10 SAI2_MCLK_A
Pin AF12 FMC_NBL0
Pin AF13 DCMI_D2
Pin AF15 EVENTOUT
J1.195 PE2 CPU.PE2 T1 VDD I/O TBD Pin AF0 TRACECLK
Pin AF2 SAI1_CK1
Pin AF4 I2C4_SCL
Pin AF5 SPI4_SCK
Pin AF6 SAI1_MCLK_A
Pin AF9 QUADSPI_BK1_IO2
Pin AF11 ETH1_GMII_TXD3/

ETH1_MII_TXD3/

ETH1_RGMII_TXD3

Pin AF12 FMC_A23
Pin AF15 EVENTOUT
J1.197 PA13 CPU.PA13 P2 VDD I/O TBD Pin AF0 DBTRGO
Pin AF1 DBTRGI
Pin AF2 MCO1
Pin AF8 UART4_TX
Pin AF15 EVENTOUT
J1.199 PD14 CPU.PD14 F3 VDD I/O TBD Pin AF2 TIM4_CH3
Pin AF6 SAI3_MCLK_B
Pin AF8 UART8_CTS
Pin AF12 FMC_AD0/FMC_D0
Pin AF15 EVENTOUT
J1.201 PD15 CPU.PD15 G1 VDD I/O TBD Pin AF2 TIM4_CH4
Pin AF6 SAI3_MCLK_A
Pin AF8 UART8_CTS
Pin AF12 FMC_AD1/FMC_D1
Pin AF15 EVENTOUT
J1.203 DGND DGND - - G

Pinout Table EVEN pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.2 DGND DGND - - G
J1.4 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.6 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.8 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.10 3.3VIN INPUT VOLTAGE - 3.3VIN S
J1.12 DGND DGND - - G
J1.14 VBAT CPU.VBAT H3 VBAT S BACKUP VOLTAGE
J1.16 PONKEYn PMIC.PONKEYN 17 3.3VIN I
J1.18 SOM_PGOOD - - VDD O
J1.20 BOOT_MODE0 CPU.BOOT0 K1 VDD I internall pull-up or pull-down

according to specific model

J1.22 PWR_ON CPU.PWR_ON L1 VDD O
J1.24 NRST CPU.NRST

PMIC.RSTN

eMMC.RST_n

NOR.NRESET

J1

1

K5

A4

VDD I/O TBD
J1.26 BOOT_MODE1 CPU.BOOT1 K4 VDD I internall pull-up or pull-down

according to specific model

J1.28 PA9 CPU.PA9 C8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.30 DGND DGND - - G
J1.32 WAKEUP PMIC.WAKEUP 2 VINTLDO I
J1.34 PB13 CPU.PB13 T9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.36 BOOT_MODE2 CPU-BOOT2 L2 VDD I internall pull-up or pull-down

according to specific model

J1.38 PA11 CPU.PA11 V17 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.40 MEM_WP# NAND.NWP

NOR.NWP

19

C4

VDD I internal pull-up to VDD
J1.42 PB6 CPU.PB6 T12 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.44 PB7 CPU.PB7 B5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.46 PE14 CPU.PE14 D3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.48 PA12 CPU.PA12 U16 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.50 BST_OUT PMIC.BST_OUT 34 BST_OUT S BOOST OUTPUT
J1.52 BST_OUT PMIC.BST_OUT 34 BST_OUT S BOOST OUTPUT
J1.54 PMIC_INT# PMIC-INTN 43 VDD O
J1.56 DGND DGND - - G
J1.58 PA14 CPU.PA14 R1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.60 VDD VOLTAGE OUTPUT - VDD S
J1.62 VDD VOLTAGE OUTPUT - VDD S
J1.64 1V8 PMIC.LDO6OUT 21 1V8 S Spare LDO output
J1.66 PG12 CPU.PG12 F1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.68 PB5 CPU.PB5 T8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.70 PG8 CPU.PG8 U7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.72 PA8 CPU.PA8 B8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.74 PF7 CPU.PF7 W8 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.76 PF9 CPU.PF9 W9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.78 PF8 CPU.PF8 U10 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.80 PF6 CPU.PF6 V9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.82 DGND DGND - - G
J1.84 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.86 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.88 PMIC_3V3 VOLTAGE OUTPUT - PMIC_3V3 S
J1.90 JTMS-SWDIO CPU.JTMS-SWDIO D15 VDD I/O TBD
J1.92 JTDI CPU.JTDI D13 VDD I/O TBD
J1.94 NJTRST CPU.NJTRST D12 VDD I/O TBD
J1.96 JTDO-TRACESWOO CPU.JTDO-TRACESWOO D14 VDD I/O TBD
J1.98 JTCK-SWCLK CPU.JTCK-SWCLK D16 VDD I/O TBD
J1.100 DGND DGND - - G
J1.102 NRST_CORE CPU.NRST_CORE J2 VDD I internally connected to NRST
J1.104 PDR_ON CPU.PDR_ON N2 VDD I
J1.106 PDR_ON_CORE CPU.PDR_ON_CORE N1 VDD I
J1.108 PWR_LP CPU.PWR_LP P1 VDD O
J1.110 - NC - - -
J1.112 - NC - - -
J1.114 - NC - - -
J1.116 - NC - - -
J1.118 - NC - - -
J1.120 - NC - - -
J1.122 DGND DGND - - G
J1.124 PE13 CPU.PE13 C2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.126 PC13 CPU.PC13 K3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.128 PA4 CPU.PA4 R4 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.130 PC6_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.132 PG7 CPU.PG7 W10 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.134 PG10 CPU.PG10 V7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.136 PD10 CPU.PD10 C5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.138 PE12 CPU.PE12 D2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.140 PA3 CPU.PA3 P3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.142 PB8 CPU.PB8 W6 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.144 PB9 CPU.PB9 D9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.146 DGND DGND - - G
J1.148 PA6 CPU.PA6 T5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.150 PE11 CPU.PE11 C1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.152 PB10 CPU.PB10 W5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.154 PF11 CPU.PF11 U5 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.156 PC7 CPU.PC7 A9 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.158 PD3_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.160 PC10 CPU.PC10 D11 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.162 PB0 CPU.PB0 W3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.164 DGND DGND - - G
J1.166 PA5 CPU.PA5 P4 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.168 PC0 CPU.PC0 T7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.170 PB1 CPU.PB1 V3 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.172 PE15 CPU.PE15 E1 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.174 PE4_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.176 PA10 CPU.PA10 T16 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.178 PE5 CPU.PE5 B7 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.180 PE6_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.182 PG13 CPU.PG13 U2 VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.184 PA15_OPT - - VDD I/O TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.186 VBUS_OTG_IN CPU.OTG_VBUS U15 VBUS_OTG_IN S TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.188 VBUS_SW PMIC.SWOUT 38 VBUS_SW S TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.190 DGND DGND - - G
J1.192 - NC - - -
J1.194 - NC - - -
J1.196 USB_DM2 CPU.USB_DM2 V13 - D
J1.198 USB_DP2 CPU.USB_DP2 W13 - D
J1.200 USB_DP1 CPU.USB_DP1 V14 - D
J1.202 USB_DM1 CPU.USB_DM1 W14 - D
J1.204 DGND DGND - - G

[[Category:{{{nome-som}}}]]