Difference between revisions of "ETRA SOM/ETRA Hardware/Pinout Table"

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−
<section begin="History" />
+
<section begin=History/>
 
{| style="border-collapse:collapse; "
 
{| style="border-collapse:collapse; "
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! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
+
!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
 
|-  
 
|-  
−
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
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!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Version
−
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
+
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Issue Date
 +
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes
 
|-
 
|-
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|13190|2020/12/31}}
+
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|X.Y.Z
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |First release
+
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|Month Year
 +
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|TBD
 
|-
 
|-
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|18542|2023/06/09}}
 
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Pinout update
 
 
|-
 
|-
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|18979|2023/11/23}}
+
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|[TBD_link X.Y.Z]
−
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |Pinout update
+
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|Month Year
 +
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|TBD
 
|-
 
|-
−
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |2023/11/28
+
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|...
−
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |Add pinmux spreadsheet download
+
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|...
 +
|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|...
 
|-
 
|-
 
|}
 
|}
 +
<section end=History/>
 +
<section begin=Body/>
 +
''TBD:  modificare la tabella seguente con le caratteristiche dei pin del SOM''
 +
 +
''TBD:  modificare le due tabelle ODD e EVEN con la mappa completa dei pins''
 +
 +
'''TBD:  nella tabella naming conventions,  inserire il codice dei vari IC presenti (PMIC, PHY ETH, ecc.)'''
  
−
<section end="History" /><section begin="Body" /><section end="History" /><section begin="Body" />
 
 
==Connectors and Pinout Table==
 
==Connectors and Pinout Table==
  
 
=== Connectors description ===
 
=== Connectors description ===
−
In the following table are described all available connectors integrated on [[ETRA SOM]]:
+
In the following table are described all available connectors integrated on [[ETRA]]:
 
{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
Line 36: Line 44:
 
|
 
|
 
|TE Connectivity 2-2013289-1
 
|TE Connectivity 2-2013289-1
 +
|-
 +
|Jxx
 +
|TBD
 +
|TBD
 +
|TBD
 +
|-
 +
|Jxx
 +
|TBD
 +
|TBD
 +
|TBD
 +
|-
 +
|Jxx
 +
|TBD
 +
|TBD
 +
|TBD
 +
|-
 +
|Jxx
 +
|TBD
 +
|TBD
 +
|TBD
 
|}
 
|}
 
The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:
 
The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:
  
−
[[File:ETRA_SOM_-_top_pin1_203.png|500px|thumb|ETRA TOP view|none]]
+
[[File:ETRA-top.png|500px|thumb|ETRA TOP view|none]]
−
[[File:ETRA_SOM_-_bottom_pin2_204.png|500px|thumb|ETRA BOTTOM view|none]]
+
[[File:ETRA-bottom.png|500px|thumb|ETRA BOTTOM view|none]]
  
 
===Pinout table naming conventions ===
 
===Pinout table naming conventions ===
  
−
This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the SODIMM-DDR3 edge connector.
+
This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the ''TBD: connector type'' ETRA connector.
  
 
Each row in the pinout tables contains the following information:
 
Each row in the pinout tables contains the following information:
  
−
{| class="wikitable" style="width:50%;"
+
{|class="wikitable" style="width:50%;"
 
|-
 
|-
 
|'''Pin'''
 
|'''Pin'''
Line 59: Line 87:
 
| Connections to the ETRA components
 
| Connections to the ETRA components
 
* CPU.<x> : pin connected to CPU pad named <x>
 
* CPU.<x> : pin connected to CPU pad named <x>
−
* PMIC.<x> : pin connected to the Power Manager IC ''STPMIC1APQR''
+
* CAN.<x> : pin connected to the CAN transceiver (''manufacturer'' ''part number'')
−
* LAN.<x> : pin connected to the LAN PHY ''KSZ8091RNAIA''
+
* PMIC.<x> : pin connected to the Power Manager IC (''manufacturer'' ''part number'')
 +
* LAN.<x> : pin connected to the LAN PHY (''manufacturer'' ''part number'')
 
* NOR.<x>: pin connected to the flash NOR
 
* NOR.<x>: pin connected to the flash NOR
−
* NAND.<x>: pin connected to the flash NAND
+
* SV.<x>: pin connected to voltage supervisor
−
* eMMC.<x>: pin connected to the flash eMMC
+
* MTR: pin connected to voltage monitors
−
* EXP.<x>: pin connected to the I/O EXPANDER ''ADP5589ACPZ''
 
 
|-
 
|-
 
|'''Ball/pin #'''  
 
|'''Ball/pin #'''  
Line 92: Line 120:
 
|-
 
|-
 
|}
 
|}
−
 
−
===Pinout table XLS file ===
 
−
For your convenience, please find a spreadsheet with the STM32MP15x pinout and pinmux table [https://www.dave.eu/links/p/2hxFRECdQPg6uJOy here].
 
  
 
==Pinout Table ODD pins declaration ==
 
==Pinout Table ODD pins declaration ==
  
 
{| class="wikitable"  
 
{| class="wikitable"  
−
! latexfontsize="scriptsize" | Pin  
+
! latexfontsize="scriptsize"| Pin  
−
! latexfontsize="scriptsize" | Pin Name
+
! latexfontsize="scriptsize"| Pin Name
−
! latexfontsize="scriptsize" | Internal Connections  
+
! latexfontsize="scriptsize"| Internal Connections  
−
! latexfontsize="scriptsize" | Ball/pin #  
+
! latexfontsize="scriptsize"| Ball/pin #  
−
! latexfontsize="scriptsize" | Voltage domain
+
! latexfontsize="scriptsize"| Voltage domain
−
! latexfontsize="scriptsize" | Type  
+
! latexfontsize="scriptsize"| Type  
−
! latexfontsize="scriptsize" | Notes
+
! latexfontsize="scriptsize"| Notes
−
! colspan="2" latexfontsize="scriptsize" | Alternative Functions
+
! colspan="2" latexfontsize="scriptsize"| Alternative Functions
 +
|-
 +
|rowspan="5"|J1.1
 +
|rowspan="5"|SD2_CMD
 +
|rowspan="5"|CPU.SD2_CMD
 +
|rowspan="5"|F19
 +
|rowspan="5"|AXEL_IO_3V3
 +
|rowspan="5"|IO
 +
|rowspan="5"|Notes
 +
|Pin ALT-0
 +
|SD2_CMD
 +
|-
 +
|Pin ALT-1
 +
|ECSPI5_MOSI
 +
|-
 +
|Pin ALT-2
 +
|KEY_ROW5
 +
|-
 +
|Pin ALT-3
 +
|AUD4_RXC
 +
|-
 +
|Pin ALT-5
 +
|GPIO1_IO11
 +
|-
 +
|rowspan="5"|J1.3
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
|rowspan="5"|J1.5
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
|rowspan="5"|J1.7
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
|rowspan="5"|J1.9
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
|rowspan="5"|J1.11
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
|rowspan="5"|J1.13
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
|rowspan="5"|J1.15
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
|rowspan="5"|J1.17
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
|rowspan="5"|J1.19
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
|rowspan="5"|J1.21
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
|rowspan="5"|J1.23
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 
|-
 
|-
−
|J1.1
+
|Pin ALT-5
−
|DGND
+
|TBD
−
|DGND
+
|-
−
| -
+
|rowspan="5"|J1.25
−
| -
+
|rowspan="5"|TBD
−
|G
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 +
|-
 +
|rowspan="5"|J1.27
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 +
|-
 +
|Pin ALT-3
 +
|TBD
 +
|-
 +
|Pin ALT-5
 +
|TBD
 
|-
 
|-
−
|J1.3
+
|rowspan="5"|J1.29
−
|3.3VIN
+
|rowspan="5"|TBD
−
|INPUT VOLTAGE
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|3.3VIN
+
|rowspan="5"|TBD
−
|S
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.5
+
|Pin ALT-1
−
|3.3VIN
+
|TBD
−
|INPUT VOLTAGE
 
−
| -
 
−
|3.3VIN
 
−
|S
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.7
+
|Pin ALT-2
−
|3.3VIN
+
|TBD
−
|INPUT VOLTAGE
 
−
| -
 
−
|3.3VIN
 
−
|S
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.9
+
|Pin ALT-3
−
|3.3VIN
+
|TBD
−
|INPUT VOLTAGE
 
−
| -
 
−
|3.3VIN
 
−
|S
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.11
+
|Pin ALT-5
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.13
+
|rowspan="5"|J1.31
−
|ETH_LED
+
|rowspan="5"|TBD
−
|LAN.LED0/PME_N1
+
|rowspan="5"|TBD
−
|23
+
|rowspan="5"|TBD
−
|VDD
+
|rowspan="5"|TBD
−
|I/O
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.15
+
|Pin ALT-1
−
| VINTLDO
+
|TBD
−
|PMIC.INTLDO
 
−
|40
 
−
|INTLDO
 
−
|S
 
−
|do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.17
+
|Pin ALT-2
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.19
+
|Pin ALT-3
−
|ETH_TX_P
+
|TBD
−
|LAN.TXP
 
−
|6
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.21
+
|Pin ALT-5
−
|ETH_TX_M
+
|TBD
−
|LAN.TXM
 
−
|5
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.23
+
|rowspan="5"|J1.33
−
|ETH_RX_P
+
|rowspan="5"|TBD
−
|LAN.RXP
+
|rowspan="5"|TBD
−
|4
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|D
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.25
+
|Pin ALT-1
−
|ETH_RX_M
+
|TBD
−
|LAN.RXM
 
−
|3
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.27
+
|Pin ALT-2
−
|LDO2
+
|TBD
−
|PMIC.LDO2OUT
 
−
|18
 
−
|LDO2
 
−
|S
 
−
|Spare LDO output
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.29
+
|Pin ALT-3
−
|LDO5
+
|TBD
−
|PMIC.LDO5OUT
 
−
|20
 
−
|LDO5
 
−
|S
 
−
|Spare LDO output
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.31
+
|Pin ALT-5
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.33
+
|rowspan="5"|J1.35
−
|ETH_INT
+
|rowspan="5"|TBD
−
|LAN.INTRP
+
|rowspan="5"|TBD
−
|18
+
|rowspan="5"|TBD
−
|VDD
+
|rowspan="5"|TBD
−
|O
+
|rowspan="5"|TBD
−
|open drain with internal pull-up to VDD
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.35
+
|Pin ALT-1
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.37
+
|Pin ALT-2
−
(NAND on board)
+
|TBD
−
|PD1
 
−
|CPU.PD1
 
−
|A4
 
−
|VDD
 
−
|I/O
 
−
|internally used for NAND flash,
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="10" |J1.37
+
|Pin ALT-3
−
| rowspan="10" |PD1
+
|TBD
−
| rowspan="10" |CPU.PD1
 
−
| rowspan="10" |A4
 
−
| rowspan="10" |VDD
 
−
| rowspan="10" |I/O
 
−
| rowspan="10" |
 
−
|Pin AF2
 
−
|I2C6_SCL
 
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-5
−
|DFSDM1_DATIN6
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|rowspan="5"|J1.37
−
|I2C5_SCL
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-1
−
|SAI3_SD_A
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-2
−
|UART4_TX
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|FDCAN1_TX
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|SDMMC3_D0
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|rowspan="5"|J1.39
−
|DFSDM1_CKIN7
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|FMC_AD3/FMC_D3
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.39
+
|Pin ALT-3
−
(NAND on board)
+
|TBD
−
|PD4
 
−
|CPU.PD4
 
−
|D6
 
−
|VDD
 
−
|I/O
 
−
|internally used for NAND flash,
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="6" |J1.39
+
|Pin ALT-5
−
| rowspan="6" |PD4
+
|TBD
−
| rowspan="6" |CPU.PD4
 
−
| rowspan="6" |D6
 
−
| rowspan="6" |VDD
 
−
| rowspan="6" |I/O
 
−
| rowspan="6" |
 
−
|Pin AF6
 
−
|SAI3_FS_A
 
 
|-
 
|-
−
|Pin AF7
+
|rowspan="5"|J1.41
−
|USART2_RTS/USART2_DE
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-1
−
|SDMMC3_D1
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-2
−
|DFSDM1_CKIN0
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-3
−
|FMC_NOE
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.41
+
|rowspan="5"|J1.43
−
(NAND on board)
+
|rowspan="5"|TBD
−
|PD5
+
|rowspan="5"|TBD
−
|CPU.PD5
+
|rowspan="5"|TBD
−
|D7
+
|rowspan="5"|TBD
−
|VDD
+
|rowspan="5"|TBD
−
|I/O
+
|rowspan="5"|TBD
−
|internally used for NAND flash,
+
|Pin ALT-0
−
do not connect
+
|TBD
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="4" |J1.41
+
|Pin ALT-1
−
| rowspan="4" |PD5
+
|TBD
−
| rowspan="4" |CPU.PD5
 
−
| rowspan="4" |D7
 
−
| rowspan="4" |VDD
 
−
| rowspan="4" |I/O
 
−
| rowspan="4" |
 
−
|Pin AF7
 
−
|USART2_TX
 
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-2
−
|SDMMC3_D2
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-3
−
|FMC_NWE
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="9" |J1.43
+
|rowspan="5"|J1.45
−
| rowspan="9" |PD7
+
|rowspan="5"|TBD
−
| rowspan="9" |CPU.PD7
+
|rowspan="5"|TBD
−
| rowspan="9" |B4
+
|rowspan="5"|TBD
−
| rowspan="9" |VDD
+
|rowspan="5"|TBD
−
| rowspan="9" |I/O
+
|rowspan="5"|TBD
−
| rowspan="9" |
+
|rowspan="5"|TBD
−
|Pin AF0
+
|Pin ALT-0
−
|TRACED6
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-1
−
|DFSDM1_DATIN4
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-2
−
|I2C2_SCL
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|DFSDM1_CKIN1
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-5
−
|USART2_CK
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|rowspan="5"|J1.47
−
|SPDIFRX_IN1
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-1
−
|SDMMC3_D3
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|FMC_NE1
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-3
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.45
+
|Pin ALT-5
−
 
+
|TBD
−
(NAND on board)
 
−
|PD0
 
−
|CPU.PD0
 
−
|A3
 
−
|VDD
 
−
|I/O
 
−
|internally used for NAND flash,
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="10" |J1.45
+
|rowspan="5"|J1.49
−
| rowspan="10" |PD0
+
|rowspan="5"|TBD
−
| rowspan="10" |CPU.PD0
+
|rowspan="5"|TBD
−
| rowspan="10" |A3
+
|rowspan="5"|TBD
−
| rowspan="10" |VDD
+
|rowspan="5"|TBD
−
| rowspan="10" |I/O
+
|rowspan="5"|TBD
−
| rowspan="10" |
+
|rowspan="5"|TBD
−
|Pin AF2
+
|Pin ALT-0
−
|I2C6_SDA
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-1
−
|DFSDM1_CKIN6
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-2
−
|I2C5_SDA
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|SAI3_SCK_A
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-5
−
|UART4_RX
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|rowspan="5"|J1.51
−
|FDCAN1_RX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-1
−
|SDMMC3_CMD
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-2
−
|DFSDM1_DATIN7
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-3
−
|FMC_AD2/FMC_D2
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="8" |J1.47
+
|rowspan="5"|J1.53
−
| rowspan="8" |PG15
+
|rowspan="5"|TBD
−
| rowspan="8" |CPU.PG15
+
|rowspan="5"|TBD
−
| rowspan="8" |A2
+
|rowspan="5"|TBD
−
| rowspan="8" |VDD
+
|rowspan="5"|TBD
−
| rowspan="8" |I/O
+
|rowspan="5"|TBD
−
| rowspan="8" |
+
|rowspan="5"|TBD
−
|Pin AF0
+
|Pin ALT-0
−
|TRACED7
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-1
−
|SAI1_D2
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-2
−
|I2C2_SDA
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|SAI1_FS_A
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-5
−
|USART6_CTS/USART6_NSS
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|rowspan="5"|J1.55
−
|SDMMC3_CK
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-1
−
|DCMI_D13
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.49
+
|Pin ALT-3
−
(NOR on board)
+
|TBD
−
|PF10
 
−
|CPU.PF10
 
−
|U9
 
−
|VDD
 
−
|I/O
 
−
|internally used for NOR flash,
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="9" |J1.49
+
|Pin ALT-5
−
| rowspan="9" |PF10
+
|TBD
−
| rowspan="9" |CPU.PF10
 
−
| rowspan="9" |U9
 
−
| rowspan="9" |VDD
 
−
| rowspan="9" |I/O
 
−
| rowspan="9" |
 
−
|Pin AF1
 
−
|TIM16_BKIN
 
 
|-
 
|-
−
|Pin AF2
+
|rowspan="5"|J1.57
−
|SAI1_D3
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-1
−
|SAI4_D4
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-2
−
|SAI1_D4
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|QUADSPI_CLK
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|SAI4_D3
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|rowspan="5"|J1.59
−
|DCMI_D11
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-1
−
|LCD_DE
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.51
+
|Pin ALT-3
−
(NAND on board)
+
|TBD
−
|PE7
 
−
|CPU.PE7
 
−
|T10
 
−
|VDD
 
−
|I/O
 
−
|internally used for NAND flash,
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="7" |J1.51
+
|Pin ALT-5
−
| rowspan="7" |PE7
+
|TBD
−
| rowspan="7" |CPU.PE7
 
−
| rowspan="7" |T10
 
−
| rowspan="7" |VDD
 
−
| rowspan="7" |I/O
 
−
| rowspan="7" |
 
−
|Pin AF1
 
−
|TIM1_ETR
 
 
|-
 
|-
−
|Pin AF2
+
|rowspan="5"|J1.61
−
|TIM3_ETR
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-1
−
|DFSDM1_DATIN2
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-2
−
|UART7_RX
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-3
−
|QUADSPI_BK2_IO0
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|FMC_AD4/FMC_D4
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.63
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|J1.53
+
|Pin ALT-1
−
(NAND on board)
+
|TBD
−
|PE8
 
−
|CPU.PE8
 
−
|T11
 
−
|VDD
 
−
|I/O
 
−
|internally used for NAND flash,
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="6" |J1.53
+
|Pin ALT-2
−
| rowspan="6" |PE8
+
|TBD
−
| rowspan="6" |CPU.PE8
 
−
| rowspan="6" |T11
 
−
| rowspan="6" |VDD
 
−
| rowspan="6" |I/O
 
−
| rowspan="6" |
 
−
|Pin AF1
 
−
|TIM1_CH1N
 
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-3
−
|DFSDM1_CKIN2
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-5
−
|UART7_TX
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|rowspan="5"|J1.65
−
|QUADSPI_BK2_IO1
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|FMC_AD5/FMC_D5
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.55
+
|Pin ALT-3
−
|NOR_WP#
+
|TBD
−
|NOR.WPn
 
−
|C4
 
−
|VDD
 
−
|I/O
 
−
|internal pull-up to VDD,
 
−
this NOR pin is shared with QSPI_IO2 function
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.57
+
|Pin ALT-5
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.59
+
|rowspan="5"|J1.67
−
| -
+
|rowspan="5"|TBD
−
|NC
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.61
+
|Pin ALT-1
−
(eMMC on board)
+
|TBD
−
|PB14
 
−
|CPU.PB14
 
−
|C9
 
−
|VDD
 
−
|I/O
 
−
|internally used for eMMC flash,
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="9" |J1.61
+
|Pin ALT-2
−
| rowspan="9" |PB14
+
|TBD
−
| rowspan="9" |CPU.PB14
 
−
| rowspan="9" |C9
 
−
| rowspan="9" |VDD
 
−
| rowspan="9" |I/O
 
−
| rowspan="9" |
 
−
|Pin AF1
 
−
|TIM1_CH2N
 
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-3
−
|TIM12_CH1
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-5
−
|TIM8_CH2N
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|rowspan="5"|J1.69
−
|USART1_TX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-1
−
|SPI2_MISO/I2S2_SDI
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-2
−
|DFSDM1_DATIN2
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-3
−
|USART3_RTS/USART3_DE
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-5
−
|SDMMC2_D0
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.71
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|J1.63
+
|Pin ALT-1
−
 
+
|TBD
−
(eMMC on board)
 
−
|PB15
 
−
|CPU.PB15
 
−
|A8
 
−
|VDD
 
−
|I/O
 
−
|internally used for eMMC flash,
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="9" |J1.63
+
|Pin ALT-2
−
| rowspan="9" |PB15
+
|TBD
−
| rowspan="9" |CPU.PB15
 
−
| rowspan="9" |A8
 
−
| rowspan="9" |VDD
 
−
| rowspan="9" |I/O
 
−
| rowspan="9" |
 
−
|Pin AF0
 
−
|RTC_REFIN
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-3
−
|TIM1_CH3N
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-5
−
|TIM12_CH2
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|rowspan="5"|J1.73
−
|TIM8_CH3N
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-1
−
|USART1_RX
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|SPI2_MOSI/I2S2_SDO
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|DFSDM1_CKIN2
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-5
−
|SDMMC2_D1
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.75
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|J1.65
+
|Pin ALT-1
−
 
+
|TBD
−
(eMMC on board)
 
−
|PB3
 
−
|CPU.PB3
 
−
|A7
 
−
|VDD
 
−
|I/O
 
−
|internally used for eMMC flash,
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="10" |J1.65
+
|Pin ALT-2
−
| rowspan="10" |PB3
+
|TBD
−
| rowspan="10" |CPU.PB3
 
−
| rowspan="10" |A7
 
−
| rowspan="10" |VDD
 
−
| rowspan="10" |I/O
 
−
| rowspan="10" |
 
−
|Pin AF0
 
−
|TRACED9
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-3
−
|TIM2_CH2
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-5
−
|SAI4_CK1
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.77
−
|SPI1_SCK/I2S1_CK
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-1
−
|SPI3_SCK/I2S3_CK
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-2
−
|SPI6_SCK
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|SDMMC2_D2
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|SAI4_MCLK_A
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|rowspan="5"|J1.79
−
|UART7_RX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.67
+
|Pin ALT-2
−
 
+
|TBD
−
(eMMC on board)
 
−
|PB4
 
−
|CPU.PB4
 
−
|B9
 
−
|VDD
 
−
|I/O
 
−
|internally used for eMMC flash,
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="12" |J1.67
+
|Pin ALT-3
−
| rowspan="12" |PB4
+
|TBD
−
| rowspan="12" |CPU.PB4
 
−
| rowspan="12" |B9
 
−
| rowspan="12" |VDD
 
−
| rowspan="12" |I/O
 
−
| rowspan="12" |
 
−
|Pin AF0
 
−
|TRACED8
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-5
−
|TIM16_BKIN
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|rowspan="5"|J1.81
−
|TIM3_CH1
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-1
−
|SAI4_CK2
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|SPI1_MISO/I2S1_SDI
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|SPI3_MISO/I2S3_SDI
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-5
−
|SPI2_NSS/I2S2_WS
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|rowspan="5"|J1.83
−
|SPI6_MISO
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-1
−
|SDMMC2_D3
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|SAI4_SCK_A
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-3
−
|UART7_TX
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.69
+
|rowspan="5"|J1.85
−
(eMMC on board)
+
|rowspan="5"|TBD
−
|PG6
+
|rowspan="5"|TBD
−
|CPU.PG6
+
|rowspan="5"|TBD
−
|A6
+
|rowspan="5"|TBD
−
|VDD
+
|rowspan="5"|TBD
−
|I/O
+
|rowspan="5"|TBD
−
|internally used for eMMC flash,
+
|Pin ALT-0
−
 
+
|TBD
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="6" |J1.69
+
|Pin ALT-1
−
| rowspan="6" |PG6
+
|TBD
−
| rowspan="6" |CPU.PG6
 
−
| rowspan="6" |A6
 
−
| rowspan="6" |VDD
 
−
| rowspan="6" |I/O
 
−
| rowspan="6" |
 
−
|Pin AF0
 
−
|TRACED14
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-2
−
|TIM17_BKIN
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-3
−
|SDMMC2_CMD
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-5
−
|DCMI_D12
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|rowspan="5"|J1.87
−
|LCD_R7
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.71
+
|Pin ALT-2
−
(eMMC on board)
+
|TBD
−
|PE3
 
−
|CPU.PE3
 
−
|A5
 
−
|VDD
 
−
|I/O
 
−
|internally used for eMMC flash,
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="6" |J1.71
+
|Pin ALT-3
−
| rowspan="6" |PE3
+
|TBD
−
| rowspan="6" |CPU.PE3
 
−
| rowspan="6" |A5
 
−
| rowspan="6" |VDD
 
−
| rowspan="6" |I/O
 
−
| rowspan="6" |
 
−
|Pin AF0
 
−
|TRACED0
 
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-5
−
|TIM15_BKIN
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.89
−
|SAI1_SD_B
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-1
−
|SDMMC2_CK
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|FMC_A19
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-3
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.73
+
|Pin ALT-5
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="9" |J1.75
+
|rowspan="5"|J1.91
−
| rowspan="9" |PC8
+
|rowspan="5"|TBD
−
| rowspan="9" |CPU.PC8
+
|rowspan="5"|TBD
−
| rowspan="9" |C11
+
|rowspan="5"|TBD
−
| rowspan="9" |VDD
+
|rowspan="5"|TBD
−
| rowspan="9" |I/O
+
|rowspan="5"|TBD
−
| rowspan="9" |
+
|rowspan="5"|TBD
−
|Pin AF0
+
|Pin ALT-0
−
|TRACED0
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-1
−
|TIM3_CH3
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-2
−
|TIM8_CH3
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|UART4_TX
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-5
−
|USART6_CK
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|rowspan="5"|J1.93
−
|UART5_RTS/UART5_DE
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|SDMMC1_D0
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-2
−
|DCMI_D2
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-3
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="11" |J1.77
+
|Pin ALT-5
−
| rowspan="11" |PC9
+
|TBD
−
| rowspan="11" |CPU.PC9
 
−
| rowspan="11" |A10
 
−
| rowspan="11" |VDD
 
−
| rowspan="11" |I/O
 
−
| rowspan="11" |
 
−
|Pin AF0
 
−
|TRACED1
 
 
|-
 
|-
−
|Pin AF2
+
|rowspan="5"|J1.95
−
|TIM3_CH4
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-1
−
|TIM8_CH4
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-2
−
|I2C3_SDA
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|I2S_CKIN
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-5
−
|UART5_CTS
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|rowspan="5"|J1.97
−
|QUADSPI_BK1_IO0
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|SDMMC1_D1
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-2
−
|DCMI_D3
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_B2
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="13" |J1.79
+
|rowspan="5"|J1.99
−
| rowspan="13" |PE6
+
|rowspan="5"|TBD
−
| rowspan="13" |CPU.PE6
+
|rowspan="5"|TBD
−
| rowspan="13" |B3
+
|rowspan="5"|TBD
−
| rowspan="13" |VDD
+
|rowspan="5"|TBD
−
| rowspan="13" |I/O
+
|rowspan="5"|TBD
−
| rowspan="13" |for LCD_G1 function
+
|rowspan="5"|TBD
−
use pin J1.180
+
|Pin ALT-0
−
 
+
|TBD
−
(RGB lenght match)
 
−
|Pin AF0
 
−
|TRACED2
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-1
−
|TIM1_BKIN2
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-2
−
|SAI1_D1
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-3
−
|TIM15_CH2
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-5
−
|SPI4_MOSI
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.101
−
|SAI1_SD_A
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-1
−
|SDMMC2_D0
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-2
−
|SDMMC1_D2
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-3
−
|SAI2_MCLK_B
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|FMC_A22
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|rowspan="5"|J1.103
−
|DCMI_D7
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|<s>Pin AF14</s>
+
|Pin ALT-1
−
|<s>LCD_G1</s>
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="10" |J1.81
+
|Pin ALT-3
−
| rowspan="10" |PC11
+
|TBD
−
| rowspan="10" |CPU.PC11
 
−
| rowspan="10" |A11
 
−
| rowspan="10" |VDD
 
−
| rowspan="10" |I/O
 
−
| rowspan="10" |
 
−
|Pin AF0
 
−
|TRACED3
 
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-5
−
|DFSDM1_DATIN5
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.105
−
|SPI3_MISO/I2S3_SDI
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-1
−
|USART3_RX
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-2
−
|UART4_RX
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|QUADSPI_BK2_NCS
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|SAI4_SCK_B
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|rowspan="5"|J1.107
−
|SDMMC1_D3
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-1
−
|DCMI_D4
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="7" |J1.83
+
|Pin ALT-3
−
| rowspan="7" |PD2
+
|TBD
−
| rowspan="7" |CPU.PD2
 
−
| rowspan="7" |B10
 
−
| rowspan="7" |VDD
 
−
| rowspan="7" |I/O
 
−
| rowspan="7" |
 
−
|Pin AF2
 
−
|TIM3_ETR
 
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-5
−
|I2C5_SMBA
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.109
−
|UART4_RX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-1
−
|UART5_RX
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|SDMMC1_CMD
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-3
−
|DCMI_D11
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="10" |J1.85
+
|rowspan="5"|J1.111
−
| rowspan="10" |PC12
+
|rowspan="5"|TBD
−
| rowspan="10" |CPU.PC12
+
|rowspan="5"|TBD
−
| rowspan="10" |C10
+
|rowspan="5"|TBD
−
| rowspan="10" |VDD
+
|rowspan="5"|TBD
−
| rowspan="10" |I/O
+
|rowspan="5"|TBD
−
| rowspan="10" |
+
|rowspan="5"|TBD
−
|Pin AF0
+
|Pin ALT-0
−
|TRACECLK
+
|TBD
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-1
−
|MCO2
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-2
−
|SAI4_D3
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|SPI3_MOSI/I2S3_SDO
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-5
−
|USART3_CK
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|rowspan="5"|J1.113
−
|UART5_TX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-1
−
|SAI4_SD_B
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|SDMMC1_CK
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-3
−
|DCMI_D9
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.87
+
|rowspan="5"|J1.115
−
|DGND
+
|rowspan="5"|TBD
−
|DGND
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|G
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
| rowspan="7" |J1.89
+
|Pin ALT-1
−
| rowspan="7" |PD8
+
|TBD
−
| rowspan="7" |CPU.PD8
 
−
| rowspan="7" |F2
 
−
| rowspan="7" |VDD
 
−
| rowspan="7" |I/O
 
−
| rowspan="7" |
 
−
|Pin AF3
 
−
|DFSDM1_CKIN3
 
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-2
−
|SAI3_SCK_B
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-3
−
|USART3_TX
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-5
−
|SPDIFRX_IN2
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|rowspan="5"|J1.117
−
|FMC_AD13/FMC_D13
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-1
−
|LCD_B7
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="7" |J1.91
+
|Pin ALT-3
−
| rowspan="7" |PD9
+
|TBD
−
| rowspan="7" |CPU.PD9
 
−
| rowspan="7" |G3
 
−
| rowspan="7" |VDD
 
−
| rowspan="7" |I/O
 
−
| rowspan="7" |
 
−
|Pin AF3
 
−
|DFSDM1_DATIN3
 
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-5
−
|SAI3_SD_B
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|rowspan="5"|J1.119
−
|USART3_RX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|FMC_AD14/FMC_D14
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-2
−
|DCMI_HSYNC
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_B0
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.93
+
|rowspan="5"|J1.121
−
(I/O EXP on board)
+
|rowspan="5"|TBD
−
|PC2
+
|rowspan="5"|TBD
−
|CPU.PC2
+
|rowspan="5"|TBD
−
|T2
+
|rowspan="5"|TBD
−
|VDD
+
|rowspan="5"|TBD
−
|I/O
+
|rowspan="5"|TBD
−
|internally used for I/O EXP,
+
|Pin ALT-0
−
 
+
|TBD
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="7" |J1.93
+
|Pin ALT-1
−
| rowspan="7" |PC2
+
|TBD
−
| rowspan="7" |CPU.PC2
 
−
| rowspan="7" |T2
 
−
| rowspan="7" |VDD
 
−
| rowspan="7" |I/O
 
−
| rowspan="7" |
 
−
|Pin AF3
 
−
|DFSDM1_CKIN1
 
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|SPI2_MISO/I2S2_SDI
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|DFSDM1_CKOUT
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-5
−
|ETH1_GMII_TXD2/
+
|TBD
−
 
 
−
ETH1_MII_TXD2/
 
−
 
 
−
ETH1_RGMII_TXD2
 
 
|-
 
|-
−
|Pin AF13
+
|rowspan="5"|J1.123
−
|DCMI_PIXCLK
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|Additional
+
|Pin ALT-2
−
functions
+
|TBD
−
|ADC1_INP12
 
−
 
 
−
ADC1_INN11
 
 
|-
 
|-
−
|J1.95
+
|Pin ALT-3
−
|PA0
+
|TBD
−
|CPU.PA0
 
−
|R3
 
−
|VDD
 
−
|I/O
 
−
|internally used for PMIC,
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="11" |J1.97
+
|Pin ALT-5
−
| rowspan="11" |PD13
+
|TBD
−
| rowspan="11" |CPU.PD13
 
−
| rowspan="11" |U12
 
−
| rowspan="11" |VDD
 
−
| rowspan="11" |I/O
 
−
| rowspan="11" |
 
−
|Pin AF1
 
−
|LPTIM1_OUT
 
 
|-
 
|-
−
|Pin AF2
+
|rowspan="5"|J1.125
−
|TIM4_CH2
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-1
−
|I2C4_SDA
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|I2C1_SDA
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|I2S3_MCK
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-5
−
|SDMMC1_D123DIR
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|rowspan="5"|J1.127
−
|QUADSPI_BK1_IO3
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-1
−
|SAI2_SCK_A
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|FMC_A18
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-3
−
|DSI_TE
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.99
+
|rowspan="5"|J1.129
−
(NAND on board)
+
|rowspan="5"|TBD
−
|PD12
+
|rowspan="5"|TBD
−
|CPU.PD12
+
|rowspan="5"|TBD
−
|U11
+
|rowspan="5"|TBD
−
|VDD
+
|rowspan="5"|TBD
−
|I/O
+
|rowspan="5"|TBD
−
|internally used for NAND flash,
+
|Pin ALT-0
−
do not connect
+
|TBD
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="10" |J1.99
+
|Pin ALT-1
−
| rowspan="10" |PD12
+
|TBD
−
| rowspan="10" |CPU.PD12
 
−
| rowspan="10" |U11
 
−
| rowspan="10" |VDD
 
−
| rowspan="10" |I/O
 
−
| rowspan="10" |
 
−
|Pin AF1
 
−
|LPTIM1_IN1
 
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-2
−
|TIM4_CH1
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-3
−
|LPTIM2_IN1
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-5
−
|I2C4_SCL
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.131
−
|I2C1_SCL
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-1
−
|USART3_RTS/USART3_DE
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-2
−
|QUADSPI_BK1_IO1
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-3
−
|SAI2_FS_A
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|FMC_A17/FMC_ALE
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.133
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|J1.101
+
|Pin ALT-1
−
(NAND on board)
+
|TBD
−
|PD11
 
−
|CPU.PD11
 
−
|V8
 
−
|VDD
 
−
|I/O
 
−
|internally used for NAND flash,
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="8" |J1.101
+
|Pin ALT-2
−
| rowspan="8" |PD11
+
|TBD
−
| rowspan="8" |CPU.PD11
 
−
| rowspan="8" |V8
 
−
| rowspan="8" |VDD
 
−
| rowspan="8" |I/O
 
−
| rowspan="8" |
 
−
|Pin AF3
 
−
|LPTIM2_IN2
 
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-3
−
|I2C4_SMBA
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-5
−
|I2C1_SMBA
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|rowspan="5"|J1.135
−
|USART3_CTS/USART3_NSS
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-1
−
|QUADSPI_BK1_IO0
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-2
−
|SAI2_SD_A
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-3
−
|FMC_A16/FMC_CLE
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.103
+
|rowspan="5"|J1.137
−
| -
+
|rowspan="5"|TBD
−
|NC
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.105
+
|Pin ALT-1
−
(NAND on board)
+
|TBD
−
|PG9
 
−
|CPU.PG9
 
−
|T14
 
−
|VDD
 
−
|I/O
 
−
|internally used for NAND flash,
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="9" |J1.105
+
|Pin ALT-2
−
| rowspan="9" |PG9
+
|TBD
−
| rowspan="9" |CPU.PG9
 
−
| rowspan="9" |T14
 
−
| rowspan="9" |VDD
 
−
| rowspan="9" |I/O
 
−
| rowspan="9" |
 
−
|Pin AF0
 
−
|DBTRGO
 
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-3
−
|USART6_RX
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-5
−
|SPDIFRX_IN4
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|rowspan="5"|J1.139
−
|QUADSPI_BK2_IO2
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-1
−
|SAI2_FS_B
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|FMC_NE2/FMC_NCE
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-3
−
|DCMI_VSYNC
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-5
−
|LCD_R1
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.141
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|J1.107
+
|Pin ALT-1
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.109
+
|Pin ALT-2
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.111
+
|Pin ALT-3
−
|DSI_CKN
+
|TBD
−
|CPU.DSI_CKN
 
−
|A14
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.113
+
|Pin ALT-5
−
|DSI_CKP
+
|TBD
−
|CPU.DSI_CKP
 
−
|B14
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.115
+
|rowspan="5"|J1.143
−
|DSI_D0N
+
|rowspan="5"|TBD
−
|CPU.DSI_D0N
+
|rowspan="5"|TBD
−
|A13
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|D
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.117
+
|Pin ALT-1
−
|DSI_D0P
+
|TBD
−
|DSI_D0P
 
−
|B13
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.119
+
|Pin ALT-2
−
|DSI_D1N
+
|TBD
−
|CPU.DSI_D1N
 
−
|A15
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.121
+
|Pin ALT-3
−
|DSI_D1P
+
|TBD
−
|CPU.DSI_D1P
 
−
|B15
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.123
+
|Pin ALT-5
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.125
+
|rowspan="5"|J1.145
−
| -
+
|rowspan="5"|TBD
−
|NC
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.127
+
|Pin ALT-1
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.129
+
|Pin ALT-2
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.131
+
|Pin ALT-3
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="2" |J1.133
+
|Pin ALT-5
−
| rowspan="2" |ADP5589_R7
+
|TBD
−
| rowspan="2" |EXP.R7
 
−
| rowspan="2" |1
 
−
| rowspan="2" |VDD
 
−
| rowspan="2" |I/O
 
−
| rowspan="2" |
 
−
|Pin AF0
 
−
|Keypad row 7
 
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.147
−
|GPIO 8
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
| rowspan="2" |J1.135
+
|Pin ALT-1
−
| rowspan="2" |ADP5589_R6
+
|TBD
−
| rowspan="2" |EXP.R6
 
−
| rowspan="2" |2
 
−
| rowspan="2" |VDD
 
−
| rowspan="2" |I/O
 
−
| rowspan="2" |
 
−
|Pin AF0
 
−
|Keypad row 6
 
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|GPIO 7
+
|TBD
 
|-
 
|-
−
| rowspan="2" |J1.137
+
|Pin ALT-3
−
| rowspan="2" |ADP5589_R5
+
|TBD
−
| rowspan="2" |EXP.R5
 
−
| rowspan="2" |3
 
−
| rowspan="2" |VDD
 
−
| rowspan="2" |I/O
 
−
| rowspan="2" |
 
−
|Pin AF0
 
−
|Keypad row 5
 
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-5
−
|GPIO 6
+
|TBD
 
|-
 
|-
−
| rowspan="3" |J1.139
+
|rowspan="5"|J1.149
−
| rowspan="3" |ADP5589_R4
+
|rowspan="5"|TBD
−
| rowspan="3" |EXP.R4
+
|rowspan="5"|TBD
−
| rowspan="3" |4
+
|rowspan="5"|TBD
−
| rowspan="3" |VDD
+
|rowspan="5"|TBD
−
| rowspan="3" |I/O
+
|rowspan="5"|TBD
−
| rowspan="3" |
+
|rowspan="5"|TBD
−
|Pin AF0
+
|Pin ALT-0
−
|Keypad row 4
+
|TBD
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-1
−
|RESET1
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|GPIO 5
+
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.141
+
|Pin ALT-3
−
| rowspan="5" |ADP5589_R3
+
|TBD
−
| rowspan="5" |EXP.R3
 
−
| rowspan="5" |5
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |
 
−
|Pin AF0
 
−
|Keypad row 3
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-5
−
|Logic LC1
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|rowspan="5"|J1.151
−
|PWM_OUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-1
−
|CLK_OUT
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|GPIO 4
+
|TBD
 
|-
 
|-
−
| rowspan="3" |J1.143
+
|Pin ALT-3
−
| rowspan="3" |ADP5589_R2
+
|TBD
−
| rowspan="3" |EXP.R2
 
−
| rowspan="3" |6
 
−
| rowspan="3" |VDD
 
−
| rowspan="3" |I/O
 
−
| rowspan="3" |
 
−
|Pin AF0
 
−
|Keypad row 2
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-5
−
|LOGIC LB1
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.153
−
|GPIO 3
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
| rowspan="3" |J1.145
+
|Pin ALT-1
−
| rowspan="3" |ADP5589_R1
+
|TBD
−
| rowspan="3" |EXP.R1
 
−
| rowspan="3" |7
 
−
| rowspan="3" |VDD
 
−
| rowspan="3" |I/O
 
−
| rowspan="3" |
 
−
|Pin AF0
 
−
|Keypad row 1
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-2
−
|Logic LA1
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|GPIO 2
+
|TBD
 
|-
 
|-
−
| rowspan="3" |J1.147
+
|Pin ALT-5
−
| rowspan="3" |ADP5589_R0
+
|TBD
−
| rowspan="3" |EXP.R0
 
−
| rowspan="3" |8
 
−
| rowspan="3" |VDD
 
−
| rowspan="3" |I/O
 
−
| rowspan="3" |
 
−
|Pin AF0
 
−
|Keypad row 0
 
 
|-
 
|-
−
|Pin AF1
+
|rowspan="5"|J1.155
−
|Logic LY1
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-1
−
|GPIO 1
+
|TBD
 
|-
 
|-
−
| rowspan="2" |J1.149
+
|Pin ALT-2
−
| rowspan="2" |ADP5589_C0
+
|TBD
−
| rowspan="2" |EXP.C0
 
−
| rowspan="2" |9
 
−
| rowspan="2" |VDD
 
−
| rowspan="2" |I/O
 
−
| rowspan="2" |
 
−
|Pin AF0
 
−
|Keypad column 0
 
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|GPIO 9
+
|TBD
 
|-
 
|-
−
| rowspan="2" |J1.151
+
|Pin ALT-5
−
| rowspan="2" |ADP5589_C1
+
|TBD
−
| rowspan="2" |EXP.C1
 
−
| rowspan="2" |10
 
−
| rowspan="2" |VDD
 
−
| rowspan="2" |I/O
 
−
| rowspan="2" |
 
−
|Pin AF0
 
−
|Keypad column 1
 
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.157
−
|GPIO 10
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|J1.153
+
|Pin ALT-1
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="2" |J1.155
+
|Pin ALT-2
−
| rowspan="2" |ADP5589_C2
+
|TBD
−
| rowspan="2" |EXP.C2
 
−
| rowspan="2" |11
 
−
| rowspan="2" |VDD
 
−
| rowspan="2" |I/O
 
−
| rowspan="2" |
 
−
|Pin AF0
 
−
|Keypad column 2
 
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|GPIO 11
+
|TBD
 
|-
 
|-
−
| rowspan="2" |J1.157
+
|Pin ALT-5
−
| rowspan="2" |ADP5589_C3
+
|TBD
−
| rowspan="2" |EXP.C3
 
−
| rowspan="2" |12
 
−
| rowspan="2" |VDD
 
−
| rowspan="2" |I/O
 
−
| rowspan="2" |
 
−
|Pin AF0
 
−
|Keypad column 3
 
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.159
−
|GPIO 12
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
| rowspan="3" |J1.159
+
|Pin ALT-1
−
| rowspan="3" |ADP5589_C4
+
|TBD
−
| rowspan="3" |EXP.C4
 
−
| rowspan="3" |13
 
−
| rowspan="3" |VDD
 
−
| rowspan="3" |I/O
 
−
| rowspan="3" |
 
−
|Pin AF0
 
−
|Keypad column 4
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-2
−
|RESET2
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|GPIO 13
+
|TBD
 
|-
 
|-
−
| rowspan="2" |J1.161
+
|Pin ALT-5
−
| rowspan="2" |ADP5589_C5
+
|TBD
−
| rowspan="2" |EXP.C5
 
−
| rowspan="2" |14
 
−
| rowspan="2" |VDD
 
−
| rowspan="2" |I/O
 
−
| rowspan="2" |
 
−
|Pin AF0
 
−
|Keypad column 5
 
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.161
−
|GPIO 14
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
| rowspan="5" |J1.163
+
|Pin ALT-1
−
| rowspan="5" |ADP5589_C6
+
|TBD
−
| rowspan="5" |EXP.C6
 
−
| rowspan="5" |15
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |
 
−
|Pin AF0
 
−
|Keypad column 6
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-2
−
|Logic LC2
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-3
−
|PWM_IN
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-5
−
|CLK_IN
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.163
−
|GPIO 15
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
| rowspan="3" |J1.165
+
|Pin ALT-1
−
| rowspan="3" |ADP5589_C7
+
|TBD
−
| rowspan="3" |EXP.C7
 
−
| rowspan="3" |16
 
−
| rowspan="3" |VDD
 
−
| rowspan="3" |I/O
 
−
| rowspan="3" |
 
−
|Pin AF0
 
−
|Keypad column 7
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-2
−
|Logic LB2
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|GPIO 16
+
|TBD
 
|-
 
|-
−
| rowspan="3" |J1.167
+
|Pin ALT-5
−
| rowspan="3" |ADP5589_C8
+
|TBD
−
| rowspan="3" |EXP.C8
 
−
| rowspan="3" |19
 
−
| rowspan="3" |VDD
 
−
| rowspan="3" |I/O
 
−
| rowspan="3" |
 
−
|Pin AF0
 
−
|Keypad column 8
 
 
|-
 
|-
−
|Pin AF1
+
|rowspan="5"|J1.165
−
|Logic LA2
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-1
−
|GPIO 17
+
|TBD
 
|-
 
|-
−
| rowspan="3" |J1.169
+
|Pin ALT-2
−
| rowspan="3" |ADP5589_C9
+
|TBD
−
| rowspan="3" |EXP.C9
 
−
| rowspan="3" |20
 
−
| rowspan="3" |VDD
 
−
| rowspan="3" |I/O
 
−
| rowspan="3" |
 
−
|Pin AF0
 
−
|Keypad column 9
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-3
−
|Logic LY2
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-5
−
|GPIO 18
+
|TBD
 
|-
 
|-
−
| rowspan="2" |J1.171
+
|rowspan="5"|J1.167
−
| rowspan="2" |ADP5589_C10
+
|rowspan="5"|TBD
−
| rowspan="2" |EXP.C10
+
|rowspan="5"|TBD
−
| rowspan="2" |21
+
|rowspan="5"|TBD
−
| rowspan="2" |VDD
+
|rowspan="5"|TBD
−
| rowspan="2" |I/O
+
|rowspan="5"|TBD
−
| rowspan="2" |
+
|rowspan="5"|TBD
−
|Pin AF0
+
|Pin ALT-0
−
|Keypad column 10
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-1
−
|GPIO 19
+
|TBD
 
|-
 
|-
−
|J1.173
+
|Pin ALT-2
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.175
+
|Pin ALT-3
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.177
+
|Pin ALT-5
−
 
+
|TBD
−
(NAND on board)
 
−
|PE9
 
−
|CPU.PE9
 
−
|W7
 
−
|VDD
 
−
|I/O
 
−
|internally used for NAND flash,
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="6" |J1.177
+
|rowspan="5"|J1.169
−
| rowspan="6" |PE9
+
|rowspan="5"|TBD
−
| rowspan="6" |CPU.PE9
+
|rowspan="5"|TBD
−
| rowspan="6" |W7
+
|rowspan="5"|TBD
−
| rowspan="6" |VDD
+
|rowspan="5"|TBD
−
| rowspan="6" |I/O
+
|rowspan="5"|TBD
−
| rowspan="6" |
+
|rowspan="5"|TBD
−
|Pin AF1
+
|Pin ALT-0
−
|TIM1_CH1
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-1
−
|DFSDM1_CKOUT
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-2
−
|UART7_RTS/UART7_DE
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-3
−
|QUADSPI_BK2_IO2
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|FMC_AD6/FMC_D6
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.171
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|J1.179
+
|Pin ALT-1
−
 
+
|TBD
−
(I/O EXP on board)
 
−
|PC3
 
−
|CPU.PC3
 
−
|T3
 
−
|VDD
 
−
|I/O
 
−
|internally used for I/O EXP,
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="6" |J1.179
+
|Pin ALT-2
−
| rowspan="6" |PC3
+
|TBD
−
| rowspan="6" |CPU.PC3
 
−
| rowspan="6" |T3
 
−
| rowspan="6" |VDD
 
−
| rowspan="6" |I/O
 
−
| rowspan="6" |
 
−
|Pin AF0
 
−
|TRACECLK
 
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-3
−
|DFSDM1_DATIN1
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-5
−
|SPI2_MOSI/I2S2_SDO
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|rowspan="5"|J1.173
−
|ETH1_GMII_TX_CLK/
+
|rowspan="5"|TBD
−
 
+
|rowspan="5"|TBD
−
ETH1_MII_TX_CLK
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|Additional
+
|Pin ALT-2
−
functions
+
|TBD
−
|ADC1_INP13
 
−
 
 
−
ADC1_INN12
 
 
|-
 
|-
−
|J1.181
+
|Pin ALT-3
−
 
+
|TBD
−
(NAND on board)
 
−
|PD6
 
−
|CPU.PD6
 
−
|E3
 
−
|VDD
 
−
|I/O
 
−
|internally used for NAND flash,
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="11" |J1.181
+
|Pin ALT-5
−
| rowspan="11" |PD6
+
|TBD
−
| rowspan="11" |CPU.PD6
 
−
| rowspan="11" |E3
 
−
| rowspan="11" |VDD
 
−
| rowspan="11" |I/O
 
−
| rowspan="11" |
 
−
|Pin AF1
 
−
|TIM16_CH1N
 
 
|-
 
|-
−
|Pin AF2
+
|rowspan="5"|J1.175
−
|SAI1_D1
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-1
−
|DFSDM1_CKIN4
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-2
−
|DFSDM1_DATIN1
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|SPI3_MOSI/I2S3_SDO
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-5
−
|SAI1_SD_A
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|rowspan="5"|J1.177
−
|USART2_RX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|FMC_NWAIT
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-2
−
|DCMI_D10
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_B2
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.183
+
|rowspan="5"|J1.179
−
 
+
|rowspan="5"|TBD
−
(NAND on board)
+
|rowspan="5"|TBD
−
|PE10
+
|rowspan="5"|TBD
−
|CPU.PE10
+
|rowspan="5"|TBD
−
|V10
+
|rowspan="5"|TBD
−
|VDD
+
|rowspan="5"|TBD
−
|I/O
+
|Pin ALT-0
−
|internally used for NAND flash,
+
|TBD
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="6" |J1.183
+
|Pin ALT-1
−
| rowspan="6" |PE10
+
|TBD
−
| rowspan="6" |CPU.PE10
 
−
| rowspan="6" |V10
 
−
| rowspan="6" |VDD
 
−
| rowspan="6" |I/O
 
−
| rowspan="6" |
 
−
|Pin AF1
 
−
|TIM1_CH2N
 
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-2
−
|DFSDM1_DATIN4
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-3
−
|UART7_CTS
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|QUADSPI_BK2_IO3
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|rowspan="5"|J1.181
−
|FMC_AD7/FMC_D7
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.185
+
|Pin ALT-2
−
|VBUS_OTG_OUT
+
|TBD
−
|PMIC.VBUSOTG
 
−
|35
 
−
|VBUSOTG
 
−
|S
 
−
|USB OTG VOUT
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="8" |J1.187
+
|Pin ALT-3
−
| rowspan="8" |PG11
+
|TBD
−
| rowspan="8" |CPU.PG11
 
−
| rowspan="8" |V6
 
−
| rowspan="8" |VDD
 
−
| rowspan="8" |I/O
 
−
| rowspan="8" |
 
−
|Pin AF0
 
−
|TRACED11
 
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-5
−
|USART1_TX
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.183
−
|UART4_TX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-1
−
|SPDIFRX_IN1
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-2
−
|ETH1_GMII_TX_EN/
+
|TBD
−
 
 
−
ETH1_MII_TX_EN/
 
−
 
 
−
ETH1_RGMII_TX_CTL/
 
−
 
 
−
ETH1_RMII_TX_EN
 
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-3
−
|DCMI_D3
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-5
−
|LCD_B3
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.185
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
| rowspan="11" |J1.189
+
|Pin ALT-1
−
| rowspan="11" |PB2
+
|TBD
−
| rowspan="11" |CPU.PB2
 
−
| rowspan="11" |T13
 
−
| rowspan="11" |VDD
 
−
| rowspan="11" |I/O
 
−
| rowspan="11" |
 
−
|Pin AF0
 
−
|TRACED4
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-2
−
|RTC_OUT2
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-3
−
|SAI1_D1
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-5
−
|DFSDM1_CKIN1
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|rowspan="5"|J1.187
−
|USART1_RX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-1
−
|I2S_CKIN
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-2
−
|SAI1_SD_A
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-3
−
|SPI3_MOSI/I2S3_SDO
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-5
−
|UART4_RX
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|rowspan="5"|J1.189
−
|QUADSPI_CLK
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="7" |J1.191
+
|Pin ALT-2
−
| rowspan="7" |PE1
+
|TBD
−
| rowspan="7" |CPU.PE1
 
−
| rowspan="7" |B1
 
−
| rowspan="7" |VDD
 
−
| rowspan="7" |I/O
 
−
| rowspan="7" |
 
−
|Pin AF1
 
−
|LPTIM1_IN2
 
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|I2S2_MCK
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-5
−
|SAI3_SD_B
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|rowspan="5"|J1.191
−
|UART8_TX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|FMC_NBL1
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-2
−
|DCMI_D3
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-3
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="10" |J1.193
+
|Pin ALT-5
−
| rowspan="10" |PE0
+
|TBD
−
| rowspan="10" |CPU.PE0
 
−
| rowspan="10" |C4
 
−
| rowspan="10" |VDD
 
−
| rowspan="10" |I/O
 
−
| rowspan="10" |
 
−
|Pin AF1
 
−
|LPTIM1_ETR
 
 
|-
 
|-
−
|Pin AF2
+
|rowspan="5"|J1.193
−
|TIM4_ETR
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-1
−
|LPTIM2_ETR
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|SPI3_SCK/I2S3_CK
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|SAI4_MCLK_B
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-5
−
|UART8_RX
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|rowspan="5"|J1.195
−
|SAI2_MCLK_A
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|FMC_NBL0
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-2
−
|DCMI_D2
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-3
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.195
+
|Pin ALT-5
−
|PE2
+
|TBD
−
|CPU.PE2
 
−
|T1
 
−
|VDD
 
−
|I/O
 
−
|internally used for
 
−
PMIC I2C
 
−
|Pin AF4
 
−
|I2C4_SCL
 
 
|-
 
|-
−
|J1.197
+
|rowspan="5"|J1.197
−
 
+
|rowspan="5"|TBD
−
(LAN PHY on board)
+
|rowspan="5"|TBD
−
|PA13
+
|rowspan="5"|TBD
−
|CPU.PA13
+
|rowspan="5"|TBD
−
|P2
+
|rowspan="5"|TBD
−
|VDD
+
|rowspan="5"|TBD
−
|I/O
+
|Pin ALT-0
−
|internally used for LAN PHY,
+
|TBD
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="6" |J1.197
+
|Pin ALT-1
−
| rowspan="6" |PA13
+
|TBD
−
| rowspan="6" |CPU.PA13
 
−
| rowspan="6" |P2
 
−
| rowspan="6" |VDD
 
−
| rowspan="6" |I/O
 
−
| rowspan="6" |
 
−
|Pin AF0
 
−
|DBTRGO
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-2
−
|DBTRGI
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-3
−
|MCO1
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-5
−
|UART4_TX
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.199
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Additional
+
|Pin ALT-1
−
functions
+
|TBD
−
|BOOTFAILN
 
 
|-
 
|-
−
|J1.199
+
|Pin ALT-2
−
 
+
|TBD
−
(NAND on board)
 
−
|PD14
 
−
|CPU.PD14
 
−
|F3
 
−
|VDD
 
−
|I/O
 
−
|internally used for NAND flash,
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="5" |J1.199
+
|Pin ALT-3
−
| rowspan="5" |PD14
+
|TBD
−
| rowspan="5" |CPU.PD14
 
−
| rowspan="5" |F3
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |internally used for
 
−
NAND flash
 
−
|Pin AF2
 
−
|TIM4_CH3
 
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-5
−
|SAI3_MCLK_B
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|rowspan="5"|J1.201
−
|UART8_CTS
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|FMC_AD0/FMC_D0
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.201
+
|Pin ALT-3
−
(NAND on board)
+
|TBD
−
|PD15
 
−
|CPU.PD15
 
−
|G1
 
−
|VDD
 
−
|I/O
 
−
|internally used for NAND flash,
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="5" |J1.201
+
|Pin ALT-5
−
| rowspan="5" |PD15
+
|TBD
−
| rowspan="5" |CPU.PD15
 
−
| rowspan="5" |G1
 
−
| rowspan="5" |VDD
 
−
| rowspan="5" |I/O
 
−
| rowspan="5" |internally used for
 
−
NAND flash
 
−
|Pin AF2
 
−
|TIM4_CH4
 
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.203
−
|SAI3_MCLK_A
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-1
−
|UART8_CTS
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|FMC_AD1/FMC_D1
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-3
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.203
+
|Pin ALT-5
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
 
|}
 
|}
Line 2,419: Line 2,382:
  
 
{| class="wikitable"  
 
{| class="wikitable"  
−
! latexfontsize="scriptsize" | Pin  
+
! latexfontsize="scriptsize"| Pin  
−
! latexfontsize="scriptsize" | Pin Name
+
! latexfontsize="scriptsize"| Pin Name
−
! latexfontsize="scriptsize" | Internal Connections  
+
! latexfontsize="scriptsize"| Internal Connections  
−
! latexfontsize="scriptsize" | Ball/pin #  
+
! latexfontsize="scriptsize"| Ball/pin #  
−
! latexfontsize="scriptsize" | Voltage domain
+
! latexfontsize="scriptsize"| Voltage domain
−
! latexfontsize="scriptsize" | Type  
+
! latexfontsize="scriptsize"| Type  
−
! latexfontsize="scriptsize" | Notes
+
! latexfontsize="scriptsize"| Notes
−
! colspan="2" latexfontsize="scriptsize" | Alternative Functions
+
! colspan="2" latexfontsize="scriptsize"| Alternative Functions
 +
|-
 +
|rowspan="5"|J1.1
 +
|rowspan="5"|SD2_CMD
 +
|rowspan="5"|CPU.SD2_CMD
 +
|rowspan="5"|F19
 +
|rowspan="5"|AXEL_IO_3V3
 +
|rowspan="5"|IO
 +
|rowspan="5"|Notes
 +
|Pin ALT-0
 +
|SD2_CMD
 +
|-
 +
|Pin ALT-1
 +
|ECSPI5_MOSI
 +
|-
 +
|Pin ALT-2
 +
|KEY_ROW5
 +
|-
 +
|Pin ALT-3
 +
|AUD4_RXC
 +
|-
 +
|Pin ALT-5
 +
|GPIO1_IO11
 +
|-
 +
|rowspan="5"|J1.3
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 +
|-
 +
|Pin ALT-1
 +
|TBD
 +
|-
 +
|Pin ALT-2
 +
|TBD
 
|-
 
|-
−
|J1.2
+
|Pin ALT-3
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.4
+
|Pin ALT-5
−
|3.3VIN
+
|TBD
−
|INPUT VOLTAGE
 
−
| -
 
−
|3.3VIN
 
−
|S
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.6
+
|rowspan="5"|J1.5
−
|3.3VIN
+
|rowspan="5"|TBD
−
|INPUT VOLTAGE
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|3.3VIN
+
|rowspan="5"|TBD
−
|S
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.8
+
|Pin ALT-1
−
|3.3VIN
+
|TBD
−
|INPUT VOLTAGE
 
−
| -
 
−
|3.3VIN
 
−
|S
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.10
+
|Pin ALT-2
−
|3.3VIN
+
|TBD
−
|INPUT VOLTAGE
 
−
| -
 
−
|3.3VIN
 
−
|S
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.12
+
|Pin ALT-3
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.14
+
|Pin ALT-5
−
|VBAT
+
|TBD
−
|CPU.VBAT
 
−
|H3
 
−
|VBAT
 
−
|S
 
−
|BACKUP VOLTAGE
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.16
+
|rowspan="5"|J1.7
−
|PONKEYn
+
|rowspan="5"|TBD
−
|PMIC.PONKEYN
+
|rowspan="5"|TBD
−
|17
+
|rowspan="5"|TBD
−
|3.3VIN
+
|rowspan="5"|TBD
−
|I
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.18
+
|Pin ALT-1
−
|SOM_PGOOD
+
|TBD
−
| -
 
−
| -
 
−
|VDD
 
−
|O
 
−
|internally connected to VDD
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.20
+
|Pin ALT-2
−
|BOOT_MODE0
+
|TBD
−
|CPU.BOOT0
 
−
|K1
 
−
|VDD
 
−
|I
 
−
|internal pull-up or pull-down
 
−
according to specific model
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.22
+
|Pin ALT-3
−
|PWR_ON
+
|TBD
−
|CPU.PWR_ON
 
−
|L1
 
−
|VDD
 
−
|O
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.24
+
|Pin ALT-5
−
|NRST
+
|TBD
−
|CPU.NRST
 
−
PMIC.RSTN
 
−
 
 
−
eMMC.RST_n
 
−
 
 
−
NOR.NRESET
 
−
|J1
 
−
1
 
−
 
 
−
K5
 
−
 
 
−
A4
 
−
|VDD
 
−
|I/O
 
−
|internal 10k pull-up to VDD
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.26
+
|rowspan="5"|J1.9
−
|BOOT_MODE1
+
|rowspan="5"|TBD
−
|CPU.BOOT1
+
|rowspan="5"|TBD
−
|K4
+
|rowspan="5"|TBD
−
|VDD
+
|rowspan="5"|TBD
−
|I
+
|rowspan="5"|TBD
−
|internal pull-up or pull-down
+
|rowspan="5"|TBD
−
according to specific model
+
|Pin ALT-0
−
|
+
|TBD
−
|
 
 
|-
 
|-
−
| rowspan="9" |J1.28
+
|Pin ALT-1
−
| rowspan="9" |PA9
+
|TBD
−
| rowspan="9" |CPU.PA9
 
−
| rowspan="9" |C8
 
−
| rowspan="9" |VDD
 
−
| rowspan="9" |I/O
 
−
| rowspan="9" |
 
−
|Pin AF1
 
−
|TIM1_CH2
 
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-2
−
|I2C3_SMBA
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|SPI2_SCK/I2S2_CK
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-5
−
|USART1_TX
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|rowspan="5"|J1.11
−
|SDMMC2_CDIR
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-1
−
|SDMMC2_D5
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-2
−
|DCMI_D0
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_R5
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.30
+
|rowspan="5"|J1.13
−
|DGND
+
|rowspan="5"|TBD
−
|DGND
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|G
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.32
+
|Pin ALT-1
−
|WAKEUP
+
|TBD
−
|PMIC.WAKEUP
 
−
|2
 
−
|VINTLDO
 
−
|I
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="10" |J1.34
+
|Pin ALT-2
−
| rowspan="10" |PB13
+
|TBD
−
| rowspan="10" |CPU.PB13
 
−
| rowspan="10" |T9
 
−
| rowspan="10" |VDD
 
−
| rowspan="10" |I/O
 
−
| rowspan="10" |
 
−
|Pin AF1
 
−
|TIM1_CH1N
 
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-3
−
|DFSDM1_CKOUT
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-5
−
|LPTIM2_OUT
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.15
−
|SPI2_SCK/I2S2_CK
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-1
−
|DFSDM1_CKIN1
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-2
−
|USART3_CTS/USART3_NSS
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|FDCAN2_TX
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-5
−
|ETH1_GMII_TXD1/
+
|TBD
−
 
 
−
ETH1_MII_TXD1/
 
−
 
 
−
ETH1_RGMII_TXD1/
 
−
 
 
−
ETH1_RMII_TXD1
 
 
|-
 
|-
−
|Pin AF14
+
|rowspan="5"|J1.17
−
|UART5_TX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.36
+
|Pin ALT-2
−
|BOOT_MODE2
+
|TBD
−
|CPU-BOOT2
 
−
|L2
 
−
|VDD
 
−
|I
 
−
|internal pull-up or pull-down
 
−
according to specific model
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="10" |J1.38
+
|Pin ALT-3
−
| rowspan="10" |PA11
+
|TBD
−
| rowspan="10" |CPU.PA11
 
−
| rowspan="10" |V17
 
−
| rowspan="10" |VDD
 
−
| rowspan="10" |I/O
 
−
| rowspan="10" |
 
−
|Pin AF1
 
−
|TIM1_CH4
 
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-5
−
|I2C6_SCL
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|rowspan="5"|J1.19
−
|I2C5_SCL
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-1
−
|SPI2_NSS/I2S2_WS
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-2
−
|UART4_RX
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-3
−
|USART1_CTS/USART1_NSS
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-5
−
|FDCAN1_RX
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|rowspan="5"|J1.21
−
|LCD_R4
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|Additional
+
|Pin ALT-2
−
functions
+
|TBD
−
|OTG_FS_DM
 
 
|-
 
|-
−
|J1.40
+
|Pin ALT-3
−
|NAND_WP#
+
|TBD
−
|NAND.WPn
 
−
|19
 
−
|VDD
 
−
|I/O
 
−
|internal pull-up to VDD
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.42
+
|Pin ALT-5
−
 
+
|TBD
−
(NOR on board)
 
−
|PB6
 
−
|CPU.PB6
 
−
|T12
 
−
|VDD
 
−
|I/O
 
−
|internally used for NOR flash.
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="12" |J1.42
+
|rowspan="5"|J1.23
−
| rowspan="12" |PB6
+
|rowspan="5"|TBD
−
| rowspan="12" |CPU.PB6
+
|rowspan="5"|TBD
−
| rowspan="12" |T12
+
|rowspan="5"|TBD
−
| rowspan="12" |VDD
+
|rowspan="5"|TBD
−
| rowspan="12" |I/O
+
|rowspan="5"|TBD
−
| rowspan="12" |
+
|rowspan="5"|TBD
−
|Pin AF1
+
|Pin ALT-0
−
|TIM16_CH1N
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-1
−
|TIM4_CH1
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-2
−
|I2C1_SCL
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|CEC
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-5
−
|I2C4_SCL
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|rowspan="5"|J1.25
−
|USART1_TX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-1
−
|FDCAN2_TX
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-2
−
|QUADSPI_BK1_NCS
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-3
−
|DFSDM1_DATIN5
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|UART5_TX
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|rowspan="5"|J1.27
−
|DCMI_D5
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.44
+
|Pin ALT-2
−
|PB7
+
|TBD
−
|CPU.PB7
 
−
|B5
 
−
|VDD
 
−
|I/O
 
−
|internally used for
 
−
PMIC I2C
 
−
|Pin AF6
 
−
|I2C1_SDA
 
 
|-
 
|-
−
| rowspan="9" |J1.46
+
|Pin ALT-3
−
| rowspan="9" |PE14
+
|TBD
−
| rowspan="9" |CPU.PE14
 
−
| rowspan="9" |D3
 
−
| rowspan="9" |VDD
 
−
| rowspan="9" |I/O
 
−
| rowspan="9" |
 
−
|Pin AF1
 
−
|TIM1_CH4
 
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-5
−
|SPI4_MOSI
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|rowspan="5"|J1.29
−
|UART8_RTS/UART8_DE
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-1
−
|SAI2_MCLK_B
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-2
−
|SDMMC1_D123DIR
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-3
−
|FMC_AD11/FMC_D11
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-5
−
|LCD_G0
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|rowspan="5"|J1.31
−
|LCD_CLK
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="10" |J1.48
+
|Pin ALT-2
−
| rowspan="10" |PA12
+
|TBD
−
| rowspan="10" |CPU.PA12
 
−
| rowspan="10" |U16
 
−
| rowspan="10" |VDD
 
−
| rowspan="10" |I/O
 
−
| rowspan="10" |
 
−
|Pin AF1
 
−
|TIM1_ETR
 
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-3
−
|I2C6_SDA
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-5
−
|I2C5_SDA
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.33
−
|UART4_TX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-1
−
|USART1_RTS/USART1_DE
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-2
−
|SAI2_FS_B
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|FDCAN1_TX
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-5
−
|LCD_R5
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.35
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Additional
+
|Pin ALT-1
−
functions
+
|TBD
−
|OTG_FS_DP
 
 
|-
 
|-
−
|J1.50
+
|Pin ALT-2
−
|BST_OUT
+
|TBD
−
|PMIC.BST_OUT
 
−
|34
 
−
|BST_OUT
 
−
|S
 
−
|BOOST OUTPUT
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.52
+
|Pin ALT-3
−
|BST_OUT
+
|TBD
−
|PMIC.BST_OUT
 
−
|34
 
−
|BST_OUT
 
−
|S
 
−
|BOOST OUTPUT
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.54
+
|Pin ALT-5
−
|PMIC_INT#
+
|TBD
−
|PMIC-INTN
 
−
|43
 
−
|VDD
 
−
|O
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.56
+
|rowspan="5"|J1.37
−
|DGND
+
|rowspan="5"|TBD
−
|DGND
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|G
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
| rowspan="4" |J1.58
+
|Pin ALT-1
−
| rowspan="4" |PA14
+
|TBD
−
| rowspan="4" |CPU.PA14
 
−
| rowspan="4" |R1
 
−
| rowspan="4" |VDD
 
−
| rowspan="4" |I/O
 
−
| rowspan="4" |
 
−
|Pin AF0
 
−
|DBTRGO
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-2
−
|DBTRGI
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-3
−
|MCO2
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.60
+
|rowspan="5"|J1.39
−
|VDD
+
|rowspan="5"|TBD
−
|VOLTAGE OUTPUT
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|VDD
+
|rowspan="5"|TBD
−
|S
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.62
+
|Pin ALT-1
−
|VDD
+
|TBD
−
|VOLTAGE OUTPUT
 
−
| -
 
−
|VDD
 
−
|S
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.64
+
|Pin ALT-2
−
|1V8
+
|TBD
−
|PMIC.LDO6OUT
 
−
|21
 
−
|1V8
 
−
|S
 
−
|Spare LDO output
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="11" |J1.66
+
|Pin ALT-3
−
| rowspan="11" |PG12
+
|TBD
−
| rowspan="11" |CPU.PG12
 
−
| rowspan="11" |F1
 
−
| rowspan="11" |VDD
 
−
| rowspan="11" |I/O
 
−
| rowspan="11" |
 
−
|Pin AF1
 
−
|LPTIM1_IN1
 
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-5
−
|SPI6_MISO
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.31
−
|SAI4_CK2
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-1
−
|USART6_RTS/USART6_DE
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-2
−
|SPDIFRX_IN2
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|LCD_B4
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|SAI4_SCK_A
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|rowspan="5"|J1.33
−
|ETH1_PHY_INTN
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|FMC_NE4
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-2
−
|LCD_B1
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-3
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="16" |J1.68
+
|Pin ALT-5
−
| rowspan="16" |PB5
+
|TBD
−
| rowspan="16" |CPU.PB5
 
−
| rowspan="16" |T8
 
−
| rowspan="16" |VDD
 
−
| rowspan="16" |I/O
 
−
| rowspan="16" |
 
−
|Pin AF0
 
−
|ETH_CLK
 
 
|-
 
|-
−
|Pin AF1
+
|rowspan="5"|J1.35
−
|TIM17_BKIN
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-1
−
|TIM3_CH2
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-2
−
|SAI4_D1
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-3
−
|I2C1_SMBA
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-5
−
|SPI1_MOSI/I2S1_SDO
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.37
−
|I2C4_SMBA
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-1
−
|SPI3_MOSI/I2S3_SDO
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-2
−
|SPI6_MOSI
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|FDCAN2_RX
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|SAI4_SD_A
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|rowspan="5"|J1.39
−
|ETH1_PPS_OUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|UART5_RX
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-2
−
|DCMI_D10
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_G7
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="13" |J1.70
+
|rowspan="5"|J1.41
−
| rowspan="13" |PG8
+
|rowspan="5"|TBD
−
| rowspan="13" |CPU.PG8
+
|rowspan="5"|TBD
−
| rowspan="13" |U7
+
|rowspan="5"|TBD
−
| rowspan="13" |VDD
+
|rowspan="5"|TBD
−
| rowspan="13" |I/O
+
|rowspan="5"|TBD
−
| rowspan="13" |
+
|rowspan="5"|TBD
−
|Pin AF0
+
|Pin ALT-0
−
|TRACED15
+
|TBD
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-1
−
|TIM2_CH1/TIM2_ETR
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-2
−
|ETH_CLK
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-3
−
|TIM8_ETR
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-5
−
|SPI6_NSS
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.43
−
|SAI4_D2
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-1
−
|USART6_RTS/USART6_DE
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-2
−
|USART3_RTS/USART3_DE
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|SPDIFRX_IN3
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|SAI4_FS_A
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|rowspan="5"|J1.45
−
|ETH1_PPS_OUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-1
−
|LCD_G7
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="13" |J1.72
+
|Pin ALT-3
−
| rowspan="13" |PA8
+
|TBD
−
| rowspan="13" |CPU.PA8
 
−
| rowspan="13" |B8
 
−
| rowspan="13" |VDD
 
−
| rowspan="13" |I/O
 
−
| rowspan="13" |
 
−
|Pin AF0
 
−
|MCO1
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-5
−
|TIM1_CH1
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|rowspan="5"|J1.47
−
|TIM8_BKIN2
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-1
−
|I2C3_SCL
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|SPI3_MOSI/I2S3_SDO
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-3
−
|USART1_CK
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-5
−
|SDMMC2_CKIN
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|rowspan="5"|J1.49
−
|SDMMC2_D4
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-1
−
|OTG_FS_SOF/OTG_HS_SOF
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|SAI4_SD_B
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-3
−
|UART7_RX
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-5
−
|LCD_R6
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.51
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|J1.74
+
|Pin ALT-1
−
 
+
|TBD
−
(NOR on board)
 
−
|PF7
 
−
|CPU.PF7
 
−
|W8
 
−
|VDD
 
−
|I/O
 
−
|internally used for NOR flash.
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="6" |J1.74
+
|Pin ALT-2
−
| rowspan="6" |PF7
+
|TBD
−
| rowspan="6" |CPU.PF7
 
−
| rowspan="6" |W8
 
−
| rowspan="6" |VDD
 
−
| rowspan="6" |I/O
 
−
| rowspan="6" |
 
−
|Pin AF1
 
−
|TIM17_CH1
 
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|SPI5_SCK
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-5
−
|SAI1_MCLK_B
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|rowspan="5"|J1.53
−
|UART7_TX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-1
−
|QUADSPI_BK1_IO2
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.76
+
|Pin ALT-3
−
 
+
|TBD
−
(NOR on board)
 
−
|PF9
 
−
|CPU.PF9
 
−
|W9
 
−
|VDD
 
−
|I/O
 
−
|internally used for NOR flash.
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="8" |J1.76
+
|Pin ALT-5
−
| rowspan="8" |PF9
+
|TBD
−
| rowspan="8" |CPU.PF9
 
−
| rowspan="8" |W9
 
−
| rowspan="8" |VDD
 
−
| rowspan="8" |I/O
 
−
| rowspan="8" |
 
−
|Pin AF0
 
−
|TRACED13
 
 
|-
 
|-
−
|Pin AF1
+
|rowspan="5"|J1.55
−
|TIM17_CH1N
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-1
−
|SPI5_MOSI
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-2
−
|SAI1_FS_B
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-3
−
|UART7_CTS
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-5
−
|TIM14_CH1
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|rowspan="5"|J1.57
−
|QUADSPI_BK1_IO1
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.78
+
|Pin ALT-2
−
 
+
|TBD
−
(NOR on board)
 
−
|PF8
 
−
|CPU.PF8
 
−
|U10
 
−
|VDD
 
−
|I/O
 
−
|internally used for NOR flash.
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="8" |J1.78
+
|Pin ALT-3
−
| rowspan="8" |PF8
+
|TBD
−
| rowspan="8" |CPU.PF8
 
−
| rowspan="8" |U10
 
−
| rowspan="8" |VDD
 
−
| rowspan="8" |I/O
 
−
| rowspan="8" |
 
−
|Pin AF0
 
−
|TRACED12
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-5
−
|TIM16_CH1N
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.59
−
|SPI5_MISO
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-1
−
|SAI1_SCK_B
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-2
−
|UART7_RTS/UART7_DE
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|TIM13_CH1
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|QUADSPI_BK1_IO0
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.61
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|J1.80
+
|Pin ALT-1
−
 
+
|TBD
−
(NOR on board)
 
−
|PF6
 
−
|CPU.PF6
 
−
|V9
 
−
|VDD
 
−
|I/O
 
−
|internally used for NOR flash.
 
−
 
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="7" |J1.80
+
|Pin ALT-2
−
| rowspan="7" |PF6
+
|TBD
−
| rowspan="7" |CPU.PF6
 
−
| rowspan="7" |V9
 
−
| rowspan="7" |VDD
 
−
| rowspan="7" |I/O
 
−
| rowspan="7" |
 
−
|Pin AF1
 
−
|TIM16_CH1
 
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|SPI5_NSS
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-5
−
|SAI1_SD_B
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|rowspan="5"|J1.63
−
|UART7_RX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-1
−
|QUADSPI_BK1_IO3
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|SAI4_SCK_B
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-3
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.82
+
|Pin ALT-5
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.84
+
|rowspan="5"|J1.65
−
|PMIC_3V3
+
|rowspan="5"|TBD
−
|VOLTAGE OUTPUT
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|PMIC_3V3
+
|rowspan="5"|TBD
−
|S
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.86
+
|Pin ALT-1
−
|PMIC_3V3
+
|TBD
−
|VOLTAGE OUTPUT
 
−
| -
 
−
|PMIC_3V3
 
−
|S
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.88
+
|Pin ALT-2
−
|PMIC_3V3
+
|TBD
−
|VOLTAGE OUTPUT
 
−
| -
 
−
|PMIC_3V3
 
−
|S
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.90
+
|Pin ALT-3
−
|JTMS-SWDIO
+
|TBD
−
|CPU.JTMS-SWDIO
 
−
|D15
 
−
|VDD
 
−
|I/O
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.92
+
|Pin ALT-5
−
|JTDI
+
|TBD
−
|CPU.JTDI
 
−
|D13
 
−
|VDD
 
−
|I/O
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.94
+
|rowspan="5"|J1.67
−
|NJTRST
+
|rowspan="5"|TBD
−
|CPU.NJTRST
+
|rowspan="5"|TBD
−
|D12
+
|rowspan="5"|TBD
−
|VDD
+
|rowspan="5"|TBD
−
|I/O
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.96
+
|Pin ALT-1
−
|JTDO-TRACESWOO
+
|TBD
−
|CPU.JTDO-TRACESWOO
 
−
|D14
 
−
|VDD
 
−
|I/O
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.98
+
|Pin ALT-2
−
|JTCK-SWCLK
+
|TBD
−
|CPU.JTCK-SWCLK
 
−
|D16
 
−
|VDD
 
−
|I/O
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.100
+
|Pin ALT-3
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.102
+
|Pin ALT-5
−
|NRST_CORE
+
|TBD
−
|CPU.NRST_CORE
 
−
|J2
 
−
|VDD
 
−
|I
 
−
|internally connected to NRST
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.104
+
|rowspan="5"|J1.69
−
|PDR_ON
+
|rowspan="5"|TBD
−
|CPU.PDR_ON
+
|rowspan="5"|TBD
−
|N2
+
|rowspan="5"|TBD
−
|VDD
+
|rowspan="5"|TBD
−
|I
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.106
+
|Pin ALT-1
−
|PDR_ON_CORE
+
|TBD
−
|CPU.PDR_ON_CORE
 
−
|N1
 
−
|VDD
 
−
|I
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.108
+
|Pin ALT-2
−
|PWR_LP
+
|TBD
−
|CPU.PWR_LP
 
−
|P1
 
−
|VDD
 
−
|O
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.110
+
|Pin ALT-3
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.112
+
|Pin ALT-5
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.114
+
|rowspan="5"|J1.71
−
| -
+
|rowspan="5"|TBD
−
|NC
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.116
+
|Pin ALT-1
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.118
+
|Pin ALT-2
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.120
+
|Pin ALT-3
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.122
+
|Pin ALT-5
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="9" |J1.124
+
|rowspan="5"|J1.73
−
| rowspan="9" |PE13
+
|rowspan="5"|TBD
−
| rowspan="9" |CPU.PE13
+
|rowspan="5"|TBD
−
| rowspan="9" |C2
+
|rowspan="5"|TBD
−
| rowspan="9" |VDD
+
|rowspan="5"|TBD
−
| rowspan="9" |I/O
+
|rowspan="5"|TBD
−
| rowspan="9" |
+
|rowspan="5"|TBD
−
|Pin AF0
+
|Pin ALT-0
−
|HDP2
+
|TBD
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-1
−
|TIM1_CH3
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-2
−
|DFSDM1_CKIN5
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|SPI4_MISO
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|SAI2_FS_B
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|rowspan="5"|J1.75
−
|FMC_AD10/FMC_D10
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-1
−
|DCMI_D6
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-2
−
|LCD_DE
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-3
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.126
+
|Pin ALT-5
−
|PC13
+
|TBD
−
|CPU.PC13
 
−
|K3
 
−
|VDD
 
−
|I/O
 
−
|internally used for PMIC,
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="12" |J1.128
+
|rowspan="5"|J1.77
−
| rowspan="12" |PA4
+
|rowspan="5"|TBD
−
| rowspan="12" |CPU.PA4
+
|rowspan="5"|TBD
−
| rowspan="12" |R4
+
|rowspan="5"|TBD
−
| rowspan="12" |VDD
+
|rowspan="5"|TBD
−
| rowspan="12" |I/O
+
|rowspan="5"|TBD
−
| rowspan="12" |
+
|rowspan="5"|TBD
−
|Pin AF0
+
|Pin ALT-0
−
|HDP0
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-1
−
|TIM5_ETR
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-2
−
|SAI4_D2
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|SPI1_NSS/I2S1_WS
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-5
−
|SPI3_NSS/I2S3_WS
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|rowspan="5"|J1.79
−
|USART2_CK
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-1
−
|SPI6_NSS
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|SAI4_FS_A
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-3
−
|DCMI_HSYNC
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-5
−
|LCD_VSYNC
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.81
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Additional
+
|Pin ALT-1
−
functions
+
|TBD
−
|ADC1_INP18
 
−
 
 
−
ADC2_INP18
 
−
 
 
−
DAC_OUT1
 
 
|-
 
|-
−
|J1.130
+
|Pin ALT-2
−
 
+
|TBD
−
(eMMC 8-bit
 
−
 
 
−
on board)
 
−
|PC6_OPT
 
−
|CPU.PC6
 
−
|D10
 
−
|VDD
 
−
|I/O
 
−
|internally used for eMMC,
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="14" |J1.130
+
|Pin ALT-3
−
| rowspan="14" |PC6_OPT
+
|TBD
−
| rowspan="14" | CPU.PC6
 
−
| rowspan="14" | D10
 
−
| rowspan="14" |VDD
 
−
| rowspan="14" |I/O
 
−
| rowspan="14" |
 
−
|Pin AF0
 
−
|HDP1
 
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-5
−
|TIM3_CH1
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|rowspan="5"|J1.83
−
|TIM8_CH1
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-1
−
|DFSDM1_CKIN3
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|I2S2_MCK
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-3
−
|USART6_TX
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-5
−
|SDMMC1_D0DIR
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|rowspan="5"|J1.85
−
|SDMMC2_D0DIR
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-1
−
|SDMMC2_D6
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-2
−
|DSI_TE
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-3
−
|SDMMC1_D6
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-5
−
|DCMI_D0
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|rowspan="5"|J1.87
−
|LCD_HSYNC
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="9" |J1.132
+
|Pin ALT-2
−
| rowspan="9" |PG7
+
|TBD
−
| rowspan="9" |CPU.PG7
 
−
| rowspan="9" |W10
 
−
| rowspan="9" |VDD
 
−
| rowspan="9" |I/O
 
−
| rowspan="9" |
 
−
|Pin AF0
 
−
|TRACED5
 
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|SAI1_MCLK_A
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-5
−
|USART6_CK
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|rowspan="5"|J1.89
−
|UART8_RTS/UART8_DE
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-1
−
|QUADSPI_CLK
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-2
−
|QUADSPI_BK2_IO3
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-3
−
|DCMI_D13
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-5
−
|LCD_CLK
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.91
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
| rowspan="9" |J1.134
+
|Pin ALT-1
−
| rowspan="9" |PG10
+
|TBD
−
| rowspan="9" |CPU.PG10
 
−
| rowspan="9" |V7
 
−
| rowspan="9" |VDD
 
−
| rowspan="9" |I/O
 
−
| rowspan="9" |
 
−
|Pin AF0
 
−
|TRACED10
 
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-2
−
|UART8_CTS
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|LCD_G3
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|SAI2_SD_B
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|rowspan="5"|J1.93
−
|QUADSPI_BK2_IO2
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|FMC_NE3
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-2
−
|DCMI_D2
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_B2
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="10" |J1.136
+
|rowspan="5"|J1.95
−
| rowspan="10" |PD10
+
|rowspan="5"|TBD
−
| rowspan="10" |CPU.PD10
+
|rowspan="5"|TBD
−
| rowspan="10" |C5
+
|rowspan="5"|TBD
−
| rowspan="10" |VDD
+
|rowspan="5"|TBD
−
| rowspan="10" |I/O
+
|rowspan="5"|TBD
−
| rowspan="10" |
+
|rowspan="5"|TBD
−
|Pin AF0
+
|Pin ALT-0
−
|RTC_REFIN
+
|TBD
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-1
−
|TIM16_BKIN
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-2
−
|DFSDM1_CKOUT
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-3
−
|I2C5_SMBA
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-5
−
|SPI3_MISO/I2S3_SDI
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.97
−
|SAI3_FS_B
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-1
−
|USART3_CK
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|FMC_AD15/FMC_D15
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_B3
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="8" |J1.138
+
|rowspan="5"|J1.99
−
| rowspan="8" |PE12
+
|rowspan="5"|TBD
−
| rowspan="8" |CPU.PE12
+
|rowspan="5"|TBD
−
| rowspan="8" |D2
+
|rowspan="5"|TBD
−
| rowspan="8" |VDD
+
|rowspan="5"|TBD
−
| rowspan="8" |I/O
+
|rowspan="5"|TBD
−
| rowspan="8" |
+
|rowspan="5"|TBD
−
|Pin AF1
+
|Pin ALT-0
−
|TIM1_CH3N
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-1
−
|DFSDM1_DATIN5
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|SPI4_SCK
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-3
−
|SDMMC1_D0DIR
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|SAI2_SCK_B
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|rowspan="5"|J1.101
−
|FMC_AD9/FMC_D9
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-1
−
|LCD_B4
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="10" |J1.140
+
|Pin ALT-3
−
| rowspan="10" |PA3
+
|TBD
−
| rowspan="10" |CPU.PA3
 
−
| rowspan="10" |P3
 
−
| rowspan="10" |VDD
 
−
| rowspan="10" |I/O
 
−
| rowspan="10" |
 
−
|Pin AF1
 
−
|TIM2_CH4
 
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-5
−
|TIM5_CH4
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|rowspan="5"|J1.103
−
|LPTIM5_OUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-1
−
|TIM15_CH2
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-2
−
|USART2_RX
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|LCD_B2
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-5
−
|ETH1_GMII_COL/
+
|TBD
−
 
 
−
ETH1_MII_COL
 
 
|-
 
|-
−
|Pin AF14
+
|rowspan="5"|J1.105
−
|LCD_B5
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|Additional
+
|Pin ALT-2
−
functions
+
|TBD
−
|ADC1_INP15
 
−
 
 
−
PVD_IN
 
 
|-
 
|-
−
| rowspan="16" |J1.142
+
|Pin ALT-3
−
| rowspan="16" |PB8
+
|TBD
−
| rowspan="16" |CPU.PB8
 
−
| rowspan="16" |W6
 
−
| rowspan="16" |VDD
 
−
| rowspan="16" |I/O
 
−
| rowspan="16" |
 
−
|Pin AF0
 
−
|HDP6
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-5
−
|TIM16_CH1
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|rowspan="5"|J1.107
−
|TIM4_CH3
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-1
−
|DFSDM1_CKIN7
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-2
−
|I2C1_SCL
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|SDMMC1_CKIN
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-5
−
|I2C4_SCL
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|rowspan="5"|J1.109
−
|SDMMC2_CKIN
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-1
−
|UART4_RX
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-2
−
|FDCAN1_RX
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-3
−
|SDMMC2_D4
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-5
−
|ETH1_GMII_TXD3/
+
|TBD
−
 
 
−
ETH1_MII_TXD3/
 
−
 
 
−
ETH1_RGMII_TXD3
 
 
|-
 
|-
−
|Pin AF12
+
|rowspan="5"|J1.111
−
|SDMMC1_D4
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-1
−
|DCMI_D6
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-2
−
|LCD_B6
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-3
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="16" |J1.144
+
|Pin ALT-5
−
| rowspan="16" |PB9
+
|TBD
−
| rowspan="16" |CPU.PB9
 
−
| rowspan="16" |D9
 
−
| rowspan="16" |VDD
 
−
| rowspan="16" |I/O
 
−
| rowspan="16" |
 
−
|Pin AF0
 
−
|HDP7
 
 
|-
 
|-
−
|Pin AF1
+
|rowspan="5"|J1.113
−
|TIM17_CH1
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-1
−
|TIM4_CH4
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-2
−
|DFSDM1_DATIN7
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-3
−
|I2C1_SDA
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-5
−
|SPI2_NSS/I2S2_WS
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.115
−
|I2C4_SDA
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-1
−
|SDMMC2_CDIR
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-2
−
|UART4_TX
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|FDCAN1_TX
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|SDMMC2_D5
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|rowspan="5"|J1.117
−
|SDMMC1_CDIR
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|SDMMC1_D5
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-2
−
|DCMI_D7
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_B7
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.146
+
|rowspan="5"|J1.119
−
|DGND
+
|rowspan="5"|TBD
−
|DGND
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|G
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
| rowspan="13" |J1.148
+
|Pin ALT-1
−
| rowspan="13" |PA6
+
|TBD
−
| rowspan="13" |CPU.PA6
 
−
| rowspan="13" |T5
 
−
| rowspan="13" |VDD
 
−
| rowspan="13" |I/O
 
−
| rowspan="13" |
 
−
|Pin AF1
 
−
|TIM1_BKIN
 
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-2
−
|TIM3_CH1
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-3
−
|TIM8_BKIN
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-5
−
|SAI4_CK2
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.121
−
|SPI1_MISO/I2S1_SDI
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-1
−
|SPI6_MISO
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-2
−
|TIM13_CH1
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-3
−
|MDIOS_MDC
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|SAI4_SCK_A
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|rowspan="5"|J1.123
−
|DCMI_PIXCLK
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-1
−
|LCD_G2
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|Additional
+
|Pin ALT-3
−
functions
+
|TBD
−
|ADC1_INP3
 
−
 
 
−
ADC2_INP3
 
 
|-
 
|-
−
| rowspan="9" |J1.150
+
|Pin ALT-5
−
| rowspan="9" |PE11
+
|TBD
−
| rowspan="9" |CPU.PE11
 
−
| rowspan="9" |C1
 
−
| rowspan="9" |VDD
 
−
| rowspan="9" |I/O
 
−
| rowspan="9" |
 
−
|Pin AF1
 
−
|TIM1_CH2
 
 
|-
 
|-
−
|Pin AF3
+
|rowspan="5"|J1.125
−
|DFSDM1_CKIN4
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-1
−
|SPI4_NSS
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-2
−
|USART6_CK
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-3
−
|SAI2_SD_B
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|FMC_AD8/FMC_D8
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|rowspan="5"|J1.127
−
|DCMI_D4
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-1
−
|LCD_G3
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="10" |J1.152
+
|Pin ALT-3
−
| rowspan="10" |PB10
+
|TBD
−
| rowspan="10" |CPU.PB10
 
−
| rowspan="10" |W5
 
−
| rowspan="10" |VDD
 
−
| rowspan="10" |I/O
 
−
| rowspan="10" |
 
−
|Pin AF1
 
−
|TIM2_CH3
 
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-5
−
|LPTIM2_IN1
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|rowspan="5"|J1.129
−
|I2C2_SCL
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-1
−
|SPI2_SCK/I2S2_CK
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-2
−
|DFSDM1_DATIN7
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-3
−
|USART3_TX
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-5
−
|QUADSPI_BK1_NCS
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|rowspan="5"|J1.131
−
|ETH1_GMII_RX_ER/
+
|rowspan="5"|TBD
−
 
+
|rowspan="5"|TBD
−
ETH1_MII_RX_ER
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-1
−
|LCD_G4
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="6" |J1.154
+
|Pin ALT-3
−
| rowspan="6" |PF11
+
|TBD
−
| rowspan="6" |CPU.PF11
 
−
| rowspan="6" |U5
 
−
| rowspan="6" |VDD
 
−
| rowspan="6" |I/O
 
−
| rowspan="6" |
 
−
|Pin AF5
 
−
|SPI5_MOS
 
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|SAI2_SD_B
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|rowspan="5"|J1.133
−
|DCMI_D12
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-1
−
|LCD_G5
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|Additional
+
|Pin ALT-3
−
functions
+
|TBD
−
|ADC1_INP2
 
 
|-
 
|-
−
| rowspan="13" |J1.156
+
|Pin ALT-5
−
| rowspan="13" |PC7
+
|TBD
−
| rowspan="13" |CPU.PC7
 
−
| rowspan="13" |A9
 
−
| rowspan="13" |VDD
 
−
| rowspan="13" |I/O
 
−
| rowspan="13" |
 
−
|Pin AF0
 
−
|HDP4
 
 
|-
 
|-
−
|Pin AF2
+
|rowspan="5"|J1.135
−
|TIM3_CH2
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-1
−
|TIM8_CH2
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-2
−
|DFSDM1_DATIN3
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|I2S3_MCK
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-5
−
|USART6_RX
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|rowspan="5"|J1.137
−
|SDMMC1_D123DIR
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-1
−
|SDMMC2_D123DIR
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-2
−
|SDMMC2_D7
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-3
−
|SDMMC1_D7
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-5
−
|DCMI_D1
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|rowspan="5"|J1.139
−
|LCD_G6
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.158
+
|Pin ALT-2
−
 
+
|TBD
−
(eMMC 8-bit
 
−
 
 
−
on board)
 
−
|PD3_OPT
 
−
|CPU.PD3
 
−
|C6
 
−
|VDD
 
−
|I/O
 
−
|internally used for eMMC,
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="13" |J1.158
+
|Pin ALT-3
−
| rowspan="13" |PD3_OPT
+
|TBD
−
| rowspan="13" | CPU.PD3
 
−
| rowspan="13" | C6
 
−
| rowspan="13" |VDD
 
−
| rowspan="13" |I/O
 
−
| rowspan="13" |
 
−
|Pin AF0
 
−
|HDP5
 
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-5
−
|DFSDM1_CKOUT
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.141
−
|SPI2_SCK/I2S2_CK
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-1
−
|DFSDM1_DATIN0
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-2
−
|USART2_CTS/USART2_NSS
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-3
−
|SDMMC1_D123DIR
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-5
−
|SDMMC2_D7
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|rowspan="5"|J1.143
−
|SDMMC2_D123DIR
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-1
−
|SDMMC1_D7
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|FMC_CLK
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-3
−
|DCMI_D5
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-5
−
|LCD_G7
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.145
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
| rowspan="11" |J1.160
+
|Pin ALT-1
−
| rowspan="11" |PC10
+
|TBD
−
| rowspan="11" |CPU.PC10
 
−
| rowspan="11" |D11
 
−
| rowspan="11" |VDD
 
−
| rowspan="11" |I/O
 
−
| rowspan="11" |
 
−
|Pin AF0
 
−
|TRACED2
 
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-2
−
|DFSDM1_CKIN5
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|SPI3_SCK/I2S3_CK
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-5
−
|USART3_TX
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|rowspan="5"|J1.147
−
|UART4_TX
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-1
−
|QUADSPI_BK1_IO1
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-2
−
|SAI4_MCLK_B
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-3
−
|SDMMC1_D2
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-5
−
|DCMI_D8
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|rowspan="5"|J1.149
−
|LCD_R2
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="11" |J1.162
+
|Pin ALT-2
−
| rowspan="11" |PB0
+
|TBD
−
| rowspan="11" |CPU.PB0
 
−
| rowspan="11" |W3
 
−
| rowspan="11" |VDD
 
−
| rowspan="11" |I/O
 
−
| rowspan="11" |
 
−
|Pin AF1
 
−
|TIM1_CH2N
 
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-3
−
|TIM3_CH3
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-5
−
|TIM8_CH2N
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.151
−
|DFSDM1_CKOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-1
−
|UART4_CTS
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-2
−
|LCD_R3
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-3
−
|ETH1_GMII_RXD2/
+
|TBD
−
 
 
−
ETH1_MII_RXD2/
 
−
 
 
−
ETH1_RGMII_RXD2
 
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|MDIOS_MDIO
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|rowspan="5"|J1.153
−
|LCD_G1
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|Additional
+
|Pin ALT-2
−
functions
+
|TBD
−
|ADC1_INP9
 
−
 
 
−
ADC1_INN5
 
−
 
 
−
ADC2_INP9
 
−
 
 
−
ADC2_INN5
 
 
|-
 
|-
−
|J1.164
+
|Pin ALT-3
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="9" |J1.166
+
|Pin ALT-5
−
| rowspan="9" |PA5
+
|TBD
−
| rowspan="9" |CPU.PA5
 
−
| rowspan="9" |P4
 
−
| rowspan="9" |VDD
 
−
| rowspan="9" |I/O
 
−
| rowspan="9" |
 
−
|Pin AF1
 
−
|TIM2_CH1/TIM2_ETR
 
 
|-
 
|-
−
|Pin AF3
+
|rowspan="5"|J1.155
−
|TIM8_CH1N
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-1
−
|SAI4_CK1
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|SPI1_SCK/I2S1_CK
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-3
−
|SPI6_SCK
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|SAI4_MCLK_A
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|rowspan="5"|J1.157
−
|LCD_R4
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-1
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|Additional
+
|Pin ALT-2
−
functions
+
|TBD
−
|ADC1_INP19
 
−
 
 
−
ADC1_INN18
 
−
 
 
−
ADC2_INP19
 
−
 
 
−
ADC2_INN18
 
−
 
 
−
DAC_OUT2
 
 
|-
 
|-
−
| rowspan="8" |J1.168
+
|Pin ALT-3
−
| rowspan="8" |PC0
+
|TBD
−
| rowspan="8" |CPU.PC0
 
−
| rowspan="8" |T7
 
−
| rowspan="8" |VDD
 
−
| rowspan="8" |I/O
 
−
| rowspan="8" |
 
−
|Pin AF3
 
−
|DFSDM1_CKIN0
 
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-5
−
|LPTIM2_IN2
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.159
−
|DFSDM1_DATIN4
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-1
−
|SAI2_FS_B
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-2
−
|QUADSPI_BK2_NCS
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_R5
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|Additional
+
|rowspan="5"|J1.161
−
functions
+
|rowspan="5"|TBD
−
|ADC1_INP10
+
|rowspan="5"|TBD
−
 
+
|rowspan="5"|TBD
−
ADC2_INP10
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
| rowspan="10" |J1.170
+
|Pin ALT-1
−
| rowspan="10" |PB1
+
|TBD
−
| rowspan="10" |CPU.PB1
 
−
| rowspan="10" |V3
 
−
| rowspan="10" |VDD
 
−
| rowspan="10" |I/O
 
−
| rowspan="10" |
 
−
|Pin AF1
 
−
|TIM1_CH3N
 
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-2
−
|TIM3_CH4
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-3
−
|TIM8_CH3N
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-5
−
|DFSDM1_DATIN1
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|rowspan="5"|J1.163
−
|LCD_R6
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-1
−
|ETH1_GMII_RXD3/
+
|TBD
−
 
 
−
ETH1_MII_RXD3/
 
−
 
 
−
ETH1_RGMII_RXD3
 
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|MDIOS_MDC
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_G0
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|Additional
+
|rowspan="5"|J1.165
−
functions
+
|rowspan="5"|TBD
−
|ADC1_INP5
+
|rowspan="5"|TBD
−
 
+
|rowspan="5"|TBD
−
ADC2_INP5
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
| rowspan="9" |J1.172
+
|Pin ALT-1
−
| rowspan="9" |PE15
+
|TBD
−
| rowspan="9" |CPU.PE15
 
−
| rowspan="9" |E1
 
−
| rowspan="9" |VDD
 
−
| rowspan="9" |I/O
 
−
| rowspan="9" |
 
−
|Pin AF0
 
−
|HDP3
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-2
−
|TIM1_BKIN
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-3
−
|TIM15_BKIN
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-5
−
|USART2_CTS/USART2_NSS
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|rowspan="5"|J1.167
−
|UART8_CTS
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-1
−
|FMC_NCE2
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|FMC_AD12/FMC_D12
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_R7
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.174
+
|rowspan="5"|J1.169
−
 
+
|rowspan="5"|TBD
−
(eMMC 8-bit
+
|rowspan="5"|TBD
−
 
+
|rowspan="5"|TBD
−
on board)
+
|rowspan="5"|TBD
−
|PE4_OPT
+
|rowspan="5"|TBD
−
|CPU.PE4
+
|rowspan="5"|TBD
−
|B11
+
|Pin ALT-0
−
|VDD
+
|TBD
−
|I/O
 
−
|internally used for eMMC,
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="14" |J1.174
+
|Pin ALT-1
−
| rowspan="14" |PE4_OPT
+
|TBD
−
| rowspan="14" | CPU.PE4
 
−
| rowspan="14" | B11
 
−
| rowspan="14" |VDD
 
−
| rowspan="14" |I/O
 
−
| rowspan="14" |
 
−
|Pin AF0
 
−
|TRACED1
 
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-2
−
|SAI1_D2
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-3
−
|DFSDM1_DATIN3
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-5
−
|TIM15_CH1N
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.171
−
|SPI4_NSS
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-1
−
|SAI1_FS_A
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-2
−
|SDMMC2_CKIN
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-3
−
|SDMMC1_CKIN
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-5
−
|SDMMC2_D4
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|rowspan="5"|J1.173
−
|SDMMC1_D4
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|FMC_A20
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-2
−
|DCMI_D4
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_B0
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="9" |J1.176
+
|rowspan="5"|J1.175
−
| rowspan="9" |PA10
+
|rowspan="5"|TBD
−
| rowspan="9" |CPU.PA10
+
|rowspan="5"|TBD
−
| rowspan="9" |T16
+
|rowspan="5"|TBD
−
| rowspan="9" |VDD
+
|rowspan="5"|TBD
−
| rowspan="9" |I/O
+
|rowspan="5"|TBD
−
| rowspan="9" |
+
|rowspan="5"|TBD
−
|Pin AF1
+
|Pin ALT-0
−
|TIM1_CH3
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-1
−
|SPI3_NSS/I2S3_WS
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-2
−
|USART1_RX
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-3
−
|MDIOS_MDIO
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|SAI4_FS_B
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|rowspan="5"|J1.177
−
|DCMI_D1
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-1
−
|LCD_B1
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|Additional
+
|Pin ALT-3
−
functions
+
|TBD
−
|OTG_FS_ID
 
−
 
 
−
OTG_HS_ID
 
 
|-
 
|-
−
| rowspan="14" |J1.178
+
|Pin ALT-5
−
| rowspan="14" |PE5
+
|TBD
−
| rowspan="14" |CPU.PE5
 
−
| rowspan="14" |B7
 
−
| rowspan="14" |VDD
 
−
| rowspan="14" |I/O
 
−
| rowspan="14" |
 
−
|Pin AF0
 
−
|TRACED3
 
 
|-
 
|-
−
|Pin AF2
+
|rowspan="5"|J1.179
−
|SAI1_CK2
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-1
−
|DFSDM1_CKIN3
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-2
−
|TIM15_CH1
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-3
−
|SPI4_MISO
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-5
−
|SAI1_SCK_A
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|rowspan="5"|J1.181
−
|SDMMC2_D0DIR
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-1
−
|SDMMC1_D0DIR
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-2
−
|SDMMC2_D6
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-3
−
|SDMMC1_D6
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-5
−
|FMC_A21
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|rowspan="5"|J1.183
−
|DCMI_D6
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-1
−
|LCD_G0
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
| rowspan="13" |J1.180
+
|Pin ALT-3
−
| rowspan="13" |PE6_OPT
+
|TBD
−
| rowspan="13" | CPU.PE6
 
−
| rowspan="13" | B3
 
−
| rowspan="13" |VDD
 
−
| rowspan="13" |I/O
 
−
| rowspan="13" |for SDMMC1_D2 function
 
−
use pin J1.79
 
−
 
 
−
(SDMMC lenght match)
 
−
|Pin AF0
 
−
|TRACED2
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-5
−
|TIM1_BKIN2
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|rowspan="5"|J1.185
−
|SAI1_D1
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-1
−
|TIM15_CH2
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-2
−
|SPI4_MOSI
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-3
−
|SAI1_SD_A
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-5
−
|SDMMC2_D0
+
|TBD
 
|-
 
|-
−
|<s>Pin AF8</s>
+
|rowspan="5"|J1.187
−
|<s>SDMMC1_D2</s>
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-1
−
|SAI2_MCLK_B
+
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-2
−
|FMC_A22
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-3
−
|DCMI_D7
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-5
−
|LCD_G1
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|rowspan="5"|J1.189
−
|EVENTOUT
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
| rowspan="12" |J1.182
+
|Pin ALT-1
−
| rowspan="12" |PG13
+
|TBD
−
| rowspan="12" |CPU.PG13
 
−
| rowspan="12" |U2
 
−
| rowspan="12" |VDD
 
−
| rowspan="12" |I/O
 
−
| rowspan="12" |
 
−
|Pin AF0
 
−
|TRACED0
 
 
|-
 
|-
−
|Pin AF1
+
|Pin ALT-2
−
|LPTIM1_OUT
+
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-3
−
|SAI1_CK2
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-5
−
|SAI4_CK1
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|rowspan="5"|J1.191
−
|SPI6_SCK
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF6
+
|Pin ALT-1
−
|SAI1_SCK_A
+
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-2
−
|USART6_CTS/USART6_NSS
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-3
−
|SAI4_MCLK_A
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|Pin ALT-5
−
|ETH1_GMII_TXD0/
+
|TBD
−
 
 
−
ETH1_MII_TXD0/
 
−
 
 
−
ETH1_RGMII_TXD0/
 
−
 
 
−
ETH1_RMII_TXD0
 
 
|-
 
|-
−
|Pin AF12
+
|rowspan="5"|J1.193
−
|FMC_A24
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-1
−
|LCD_R0
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-2
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.184
+
|Pin ALT-3
−
 
+
|TBD
−
(eMMC 8-bit
 
−
 
 
−
on board)
 
−
|PA15_OPT
 
−
|CPU.PA15
 
−
|C7
 
−
|VDD
 
−
|I/O
 
−
|internally used for eMMC,
 
−
do not connect
 
−
|
 
−
|
 
 
|-
 
|-
−
| rowspan="16" |J1.184
+
|Pin ALT-5
−
| rowspan="16" |PA15_OPT
+
|TBD
−
| rowspan="16" | CPU.PA15
 
−
| rowspan="16" | C7
 
−
| rowspan="16" |VDD
 
−
| rowspan="16" |I/O
 
−
| rowspan="16" |
 
−
|Pin AF0
 
−
|DBTRGI
 
 
|-
 
|-
−
|Pin AF1
+
|rowspan="5"|J1.195
−
|TIM2_CH1/TIM2_ETR
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF2
+
|Pin ALT-1
−
|SAI4_D2
+
|TBD
 
|-
 
|-
−
|Pin AF3
+
|Pin ALT-2
−
|SDMMC1_CDIR
+
|TBD
 
|-
 
|-
−
|Pin AF4
+
|Pin ALT-3
−
|CEC
+
|TBD
 
|-
 
|-
−
|Pin AF5
+
|Pin ALT-5
−
|SPI1_NSS/I2S1_WS
+
|TBD
 
|-
 
|-
−
|Pin AF6
+
|rowspan="5"|J1.197
−
|SPI3_NSS/I2S3_WS
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF7
+
|Pin ALT-1
−
|SPI6_NSS
+
|TBD
 
|-
 
|-
−
|Pin AF8
+
|Pin ALT-2
−
|UART4_RTS/UART4_DE
+
|TBD
 
|-
 
|-
−
|Pin AF9
+
|Pin ALT-3
−
|SDMMC2_D5
+
|TBD
 
|-
 
|-
−
|Pin AF10
+
|Pin ALT-5
−
|SDMMC2_CDIR
+
|TBD
 
|-
 
|-
−
|Pin AF11
+
|rowspan="5"|J1.199
−
|SDMMC1_D5
+
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|rowspan="5"|TBD
 +
|Pin ALT-0
 +
|TBD
 
|-
 
|-
−
|Pin AF12
+
|Pin ALT-1
−
|SAI4_FS_A
+
|TBD
 
|-
 
|-
−
|Pin AF13
+
|Pin ALT-2
−
|UART7_TX
+
|TBD
 
|-
 
|-
−
|Pin AF14
+
|Pin ALT-3
−
|LCD_R1
+
|TBD
 
|-
 
|-
−
|Pin AF15
+
|Pin ALT-5
−
|EVENTOUT
+
|TBD
 
|-
 
|-
−
|J1.186
+
|rowspan="5"|J1.201
−
|VBUS_OTG_IN
+
|rowspan="5"|TBD
−
|CPU.OTG_VBUS
+
|rowspan="5"|TBD
−
|U15
+
|rowspan="5"|TBD
−
|VBUS_OTG_IN
+
|rowspan="5"|TBD
−
|S
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.188
+
|Pin ALT-1
−
|VBUS_SW
+
|TBD
−
|PMIC.SWOUT
 
−
|38
 
−
|VBUS_SW
 
−
|S
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.190
+
|Pin ALT-2
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.192
+
|Pin ALT-3
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.194
+
|Pin ALT-5
−
| -
+
|TBD
−
|NC
 
−
| -
 
−
| -
 
−
| -
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.196
+
|rowspan="5"|J1.203
−
|USB_DM2
+
|rowspan="5"|TBD
−
|CPU.USB_DM2
+
|rowspan="5"|TBD
−
|V13
+
|rowspan="5"|TBD
−
| -
+
|rowspan="5"|TBD
−
|D
+
|rowspan="5"|TBD
−
|
+
|rowspan="5"|TBD
−
|
+
|Pin ALT-0
−
|
+
|TBD
 
|-
 
|-
−
|J1.198
+
|Pin ALT-1
−
|USB_DP2
+
|TBD
−
|CPU.USB_DP2
 
−
|W13
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.200
+
|Pin ALT-2
−
|USB_DP1
+
|TBD
−
|CPU.USB_DP1
 
−
|V14
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.202
+
|Pin ALT-3
−
|USB_DM1
+
|TBD
−
|CPU.USB_DM1
 
−
|W14
 
−
| -
 
−
|D
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
−
|J1.204
+
|Pin ALT-5
−
|DGND
+
|TBD
−
|DGND
 
−
| -
 
−
| -
 
−
|G
 
−
|
 
−
|
 
−
|
 
 
|-
 
|-
 
|}
 
|}

Revision as of 12:59, 28 December 2020

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History
Version Issue Date Notes
X.Y.Z Month Year TBD
[TBD_link X.Y.Z] Month Year TBD
... ... ...


TBD: modificare la tabella seguente con le caratteristiche dei pin del SOM

TBD: modificare le due tabelle ODD e EVEN con la mappa completa dei pins

TBD: nella tabella naming conventions, inserire il codice dei vari IC presenti (PMIC, PHY ETH, ecc.)

Connectors and Pinout Table[edit | edit source]

Connectors description[edit | edit source]

In the following table are described all available connectors integrated on ETRA:

Connector name Connector Type Notes Carrier board counterpart
J1 SODIMM DDR3 edge connector 204 pin TE Connectivity 2-2013289-1
Jxx TBD TBD TBD
Jxx TBD TBD TBD
Jxx TBD TBD TBD
Jxx TBD TBD TBD

The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ETRA pinout specifications. See the images below for reference:

File:ETRA-top.png
ETRA TOP view
File:ETRA-bottom.png
ETRA BOTTOM view

Pinout table naming conventions[edit | edit source]

This chapter contains the pinout description of the ETRA module, grouped in two tables (odd and even pins) that report the pin mapping of the TBD: connector type ETRA connector.

Each row in the pinout tables contains the following information:

Pin Reference to the connector pin
Pin Name Pin (signal) name on the ETRA connectors
Internal
connections 		Connections to the ETRA components
  • CPU.<x> : pin connected to CPU pad named <x>
  • CAN.<x> : pin connected to the CAN transceiver (manufacturer part number)
  • PMIC.<x> : pin connected to the Power Manager IC (manufacturer part number)
  • LAN.<x> : pin connected to the LAN PHY (manufacturer part number)
  • NOR.<x>: pin connected to the flash NOR
  • SV.<x>: pin connected to voltage supervisor
  • MTR: pin connected to voltage monitors
Ball/pin # Component ball/pin number connected to signal
Voltage I/O voltage levels
Type Pin type:
  • I = Input
  • O = Output
  • D = Differential
  • Z = High impedance
  • S = Power supply voltage
  • G = Ground
  • A = Analog signal
Notes Remarks on special pin characteristics
Pin MUX alternative functions Muxes:
  • Pin ALT-0
  • ...
  • Pin ALT-N

The number of functions depends on platform

Pinout Table ODD pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.1 SD2_CMD CPU.SD2_CMD F19 AXEL_IO_3V3 IO Notes Pin ALT-0 SD2_CMD
Pin ALT-1 ECSPI5_MOSI
Pin ALT-2 KEY_ROW5
Pin ALT-3 AUD4_RXC
Pin ALT-5 GPIO1_IO11
J1.3 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.5 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.7 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.9 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.11 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.13 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.15 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.17 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.19 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.21 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.23 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.25 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.27 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.29 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.31 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.33 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.35 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.37 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.39 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.41 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.43 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.45 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.47 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.49 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.51 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.53 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.55 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.57 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.59 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.61 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.63 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.65 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.67 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.69 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.71 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.73 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.75 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.77 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.79 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.81 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.83 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.85 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.87 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.89 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.91 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.93 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.95 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.97 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.99 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.101 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.103 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.105 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.107 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.109 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.111 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.113 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.115 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.117 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.119 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.121 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.123 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.125 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.127 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.129 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.131 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.133 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.135 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.137 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.139 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.141 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.143 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.145 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.147 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.149 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.151 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.153 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.155 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.157 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.159 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.161 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.163 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.165 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.167 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.169 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.171 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.173 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.175 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.177 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.179 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.181 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.183 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.185 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.187 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.189 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.191 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.193 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.195 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.197 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.199 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.201 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.203 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD

Pinout Table EVEN pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.1 SD2_CMD CPU.SD2_CMD F19 AXEL_IO_3V3 IO Notes Pin ALT-0 SD2_CMD
Pin ALT-1 ECSPI5_MOSI
Pin ALT-2 KEY_ROW5
Pin ALT-3 AUD4_RXC
Pin ALT-5 GPIO1_IO11
J1.3 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.5 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.7 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.9 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.11 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.13 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.15 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.17 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.19 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.21 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.23 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.25 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.27 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.29 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.31 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.33 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.35 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.37 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.39 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.31 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.33 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.35 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.37 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.39 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.41 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.43 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.45 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.47 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.49 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.51 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.53 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.55 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.57 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.59 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.61 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.63 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.65 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.67 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.69 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.71 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.73 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.75 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.77 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.79 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.81 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.83 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.85 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.87 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.89 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.91 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.93 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.95 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.97 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.99 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.101 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.103 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.105 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.107 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.109 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.111 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.113 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.115 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.117 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.119 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.121 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.123 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.125 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.127 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.129 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.131 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.133 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.135 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.137 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.139 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.141 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.143 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.145 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.147 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.149 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.151 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.153 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.155 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.157 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.159 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.161 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.163 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.165 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.167 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.169 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.171 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.173 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.175 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.177 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.179 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.181 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.183 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.185 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.187 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.189 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.191 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.193 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.195 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.197 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.199 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.201 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
J1.203 TBD TBD TBD TBD TBD TBD Pin ALT-0 TBD
Pin ALT-1 TBD
Pin ALT-2 TBD
Pin ALT-3 TBD
Pin ALT-5 TBD
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