Difference between revisions of "BORA Lite SOM/Part number composition"

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<section begin=History/>
 
{| style="border-collapse:collapse; "
 
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! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
 
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
 
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|-  
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Version
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
 
|-
 
|-
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|11600|11600}}
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |1.0.0
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Nov 2020
 
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | First version
 
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | First version
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|-
 
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|17185|17185}}
 
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Added SOCs versions
 
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | {{oldid|17185|19369}}
 
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Added explanation NOR SPI size limitation
 
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | {{oldid|20242|20242}}
 
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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Added XC7020 speed grade 3
 
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|-
 
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | {{oldid|20317|20317}}
 
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | Added XC7014S speed grade 1
 
 
|}
 
|}
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<section end="History" />
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<section end=History/>
 
__FORCETOC__
 
__FORCETOC__
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<section begin="Body" />
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<section begin=Body/>
  
 
==Part number composition==
 
==Part number composition==
 
BORA Lite SOM module part number is identified by the following digit-code table:
 
BORA Lite SOM module part number is identified by the following digit-code table:
−
{| class="wikitable" style="width:50%"
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{|class="wikitable" style="width:50%"
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! style="width:10%" |Part number structure
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!style="width:10%"|Part number structure
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! style="width:40%" |Options
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!style="width:40%"|Options
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! style="width:20%" |Description
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!style="width:20%"|Description
−
|-
 
−
!Family
 
−
|'''DBT'''
 
−
|Family prefix code
 
 
|-
 
|-
 
!SOC
 
!SOC
 
|
 
|
 
* A: XC7Z010 ARM Cortex-A9 667MHz - Speed grade ''-1''
 
* A: XC7Z010 ARM Cortex-A9 667MHz - Speed grade ''-1''
 +
* B: XC7Z010 ARM Cortex-A9 766MHz - Speed grade ''-2''
 +
* C: XC7Z010 ARM Cortex-A9 866MHz - Speed grade ''-3''
 
* D: XC7Z020 ARM Cortex-A9 667MHz - Speed grade ''-1''
 
* D: XC7Z020 ARM Cortex-A9 667MHz - Speed grade ''-1''
−
* L: XC7Z020 ARM Cortex-A9 667MHz - Speed grade ''-1'' Automotive Grade
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* E: XC7Z020 ARM Cortex-A9 766MHz - Speed grade ''-2''
−
* J: XC7Z007S ARM Cortex-A9 667MHz - Speed grade ''-1''
 
 
* F: XC7Z020 ARM Cortex-A9 866MHz - Speed grade ''-3''
 
* F: XC7Z020 ARM Cortex-A9 866MHz - Speed grade ''-3''
−
* K: XC7Z014S ARM Cortex-A9 667MHz - Speed grade ''-1''
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* H: XC7Z020 ARM Cortex-A9 866MHz - Military grade
−
|System on chip definition (and FPGA speed grade)
+
* I: XC7Z014S ARM Cortex-A9 766MHz - Speed grade ''-2''
 +
|System on chip definition
 
|-
 
|-
 
!NOR SPI
 
!NOR SPI
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* 0: 0MB
 
* 0: 0MB
 
* 4: 16MB
 
* 4: 16MB
−
|QUAD SPI NOR flash memory size - The limitation to max 16MB is due to this [https://support.xilinx.com/s/article/57744?language=en_US Errata from Xilinx]. The proposed solution by Xilinx has not been approved by DAVE Embedded Systems
+
|QUAD SPI NOR flash memory NOR size
 
|-
 
|-
 
!RAM
 
!RAM
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* 1: 1GB
 
* 1: 1GB
 
* 9: 512MB
 
* 9: 512MB
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|DDR3 Memory RAM size
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|DDR Memory RAM size
 
|-
 
|-
 
!NAND
 
!NAND
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!Boot/Misc
 
!Boot/Misc
 
|
 
|
−
* 1: NOR boot
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* 0: NOR boot, FPGA 34 fixed PSU, no Voltage Monitor
−
|Boot options  
+
* 1: NOR boot, FPGA 34 variable PSU, no Voltage Monitor
 +
* 2: NOR boot, FPGA 34 fixed PSU, Voltage Monitor
 +
* 3: NOR boot, FPGA 34 variable PSU, Voltage Monitor
 +
* 4: NOR boot, FPGA 34 fixed PSU, MON_1V8
 +
|Boot and Voltage Monitor options  
 
|-
 
|-
 
!Temperature range
 
!Temperature range
 
|
 
|
−
* C - Commercial grade: 0 to70°C
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* C - Commercial grade: suitable for 0/70°C environment
−
* I - Industrial grade: -40 to 85°C
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* I - Industrial grade: suitable for -40/85°C environment
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|For the  DAVE Embedded Systems' product Temperature Range classification, please find more information at the page [[Products Classification]]
+
* S - Super Commercial grade: suitable for 0/85°C environment
 +
* Q - Military Grade: -40-125°C
 +
|
 
|-
 
|-
 
!PCB revision
 
!PCB revision
 
|
 
|
 
* 0: first version
 
* 0: first version
 +
* 1: revision B
 +
* 2: revision C
 +
* 3: revision D - SnPb version
 +
* 4: revision C - NAND winbond
 
|PCB release may change for manufacturing purposes (i.e. text fixture adaptation)
 
|PCB release may change for manufacturing purposes (i.e. text fixture adaptation)
 
|-
 
|-
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|
 
|
 
* R: RoHS compliant
 
* R: RoHS compliant
 +
* D: No RoHS, conformal coating, sealing
 +
* P: SnPb process, sealing, acrylic coating
 
|typically connected to production process and quality
 
|typically connected to production process and quality
 
|-
 
|-
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=== Example ===
 
=== Example ===
−
BORA Lite SOM code '''DBTD4111I0R-00'''
+
BORA Lite SOM code '''DBRF4110C2R-00'''
  
−
* DBT - BORA Lite SOM module
+
* DBR - BORA Lite SOM module
−
* D - XC7Z020 ARM Cortex-A9 866MHz - Speed grade ''-1''
+
* F - XC7Z020 ARM Cortex-A9 866MHz - Speed grade ''-3''
 
* 4 - 16MB NOR Flash
 
* 4 - 16MB NOR Flash
 
* 1 - 1GB DDR3
 
* 1 - 1GB DDR3
 
* 1 - 1GB NAND flash
 
* 1 - 1GB NAND flash
−
* 1 - NOR boot
+
* 0 - NOR boot, FPGA bank 34 fixed PSU, without Voltage monitor
−
* I - Industrial temperature range
+
* C - Commercial temperature range
−
* 0 - PCB first version
+
* 2 - PCB revision C
 
* R- RoHS manufacturing process
 
* R- RoHS manufacturing process
 
* -00 - standard u-boot pre-programmed
 
* -00 - standard u-boot pre-programmed

Revision as of 16:58, 30 November 2020

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History
Version Issue Date Notes
1.0.0 Nov 2020 First version



Part number composition[edit | edit source]

BORA Lite SOM module part number is identified by the following digit-code table:

Part number structure Options Description
SOC
  • A: XC7Z010 ARM Cortex-A9 667MHz - Speed grade -1
  • B: XC7Z010 ARM Cortex-A9 766MHz - Speed grade -2
  • C: XC7Z010 ARM Cortex-A9 866MHz - Speed grade -3
  • D: XC7Z020 ARM Cortex-A9 667MHz - Speed grade -1
  • E: XC7Z020 ARM Cortex-A9 766MHz - Speed grade -2
  • F: XC7Z020 ARM Cortex-A9 866MHz - Speed grade -3
  • H: XC7Z020 ARM Cortex-A9 866MHz - Military grade
  • I: XC7Z014S ARM Cortex-A9 766MHz - Speed grade -2
 System on chip definition
NOR SPI
  • 0: 0MB
  • 4: 16MB
 QUAD SPI NOR flash memory NOR size
RAM
  • 1: 1GB
  • 9: 512MB
 DDR Memory RAM size
NAND
  • 0: 0MB
  • 1: 1GB NAND SLC
  • 7: 128MB NAND SLC
  • 8: 256MB NAND SLC
  • 9: 512MB NAND SLC
 Flash memory NAND size
Boot/Misc
  • 0: NOR boot, FPGA 34 fixed PSU, no Voltage Monitor
  • 1: NOR boot, FPGA 34 variable PSU, no Voltage Monitor
  • 2: NOR boot, FPGA 34 fixed PSU, Voltage Monitor
  • 3: NOR boot, FPGA 34 variable PSU, Voltage Monitor
  • 4: NOR boot, FPGA 34 fixed PSU, MON_1V8
 Boot and Voltage Monitor options
Temperature range
  • C - Commercial grade: suitable for 0/70°C environment
  • I - Industrial grade: suitable for -40/85°C environment
  • S - Super Commercial grade: suitable for 0/85°C environment
  • Q - Military Grade: -40-125°C
PCB revision
  • 0: first version
  • 1: revision B
  • 2: revision C
  • 3: revision D - SnPb version
  • 4: revision C - NAND winbond
 PCB release may change for manufacturing purposes (i.e. text fixture adaptation)
Manufacturing option
  • R: RoHS compliant
  • D: No RoHS, conformal coating, sealing
  • P: SnPb process, sealing, acrylic coating
 typically connected to production process and quality
Software Configuration -00: standard factory u-boot pre-programmed

-XX: custom version

If customers require custom SW deployed this section should be defined and agreed. Please contact technical support

Example[edit | edit source]

BORA Lite SOM code DBRF4110C2R-00

  • DBR - BORA Lite SOM module
  • F - XC7Z020 ARM Cortex-A9 866MHz - Speed grade -3
  • 4 - 16MB NOR Flash
  • 1 - 1GB DDR3
  • 1 - 1GB NAND flash
  • 0 - NOR boot, FPGA bank 34 fixed PSU, without Voltage monitor
  • C - Commercial temperature range
  • 2 - PCB revision C
  • R- RoHS manufacturing process
  • -00 - standard u-boot pre-programmed
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