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→Pinout and detailed pin functions
| 30||58||NC||||Reserved fo future use||-||Please leave unconnected.
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| 31||59||LCC_RESET#||Bidirectional||NAND flash controller reset(active low)||3.3V||Internally connected to 100kOhm pull-up and 10nF capacitor to ground. Can be used to force controller reset by external cicruitrySee [[#Reset]] for more details.
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| 32||60||SET_WP#||Input||NAND flash controller write protect (active low). When active, write operations are inhibited at controller level. See [[#Read-only modes]] for more details.||3.3V||Can be used to implement write protect mechanism like the switch of consumer USB pen drive.
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| 33||61||LED_0||Output||Ready/working indicator.||3.3V||Used to drive a LED to implement visual indicator.
| 35||63||NC||||Reserved fo future use||-||Please leave unconnected.
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| 36||64||EXT_FWP#||Output/Bidirectional||NAND flash write protect. On request it can be provided as bidirectional signal. See [[#Read-only modes]] for more details.||3.3V||
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===Reset===
NAND flash controller reset signal is generated by a simple on-board RC circuit (R=100kOhm, C=10nF). This signal is available on pin LCC_RESET# to :
* allow to force controller reset by external circuitry implemented on carrier board
* to propagate signal reset information to carrier board logic (for example in case a reset sequence must be implemented).
In case these functoins are not required it can be left open.
===Read-only modes===
Some applications require to implement write protection schemes in order to inhibit write operations on non-volatile memory. DUL provides two signals to accomplish this:
* SET_WP#: this signal is directly connected to the NAND flash controller. When low, ontroller disables any write operations on NAND flash. This signal is provided to implement write protect mechanism like the switch of consumer USB pen drive. If not used, it must be left open.
* EXT_FWP#: this signal is connected directly to the WPn pin of NAND flash device. Two options are available:
** by default, it is output only and is used to inform carrier board logic about the write protection enabling decided by controller
** on request it can be provided as bidirectional open-drain pin. In this case, beside the output function described previously, it allows carrier board logic to inhibit NAND flash write operations directly. For example system integrator could imagine a scenario where a hardware watchdog - that monitors host processor connected to DUL - acts on this pin disabling write operations in case processor hangs.
==Integration guide==
