Bureaucrats, dave_user, Administrators
8,184
edits
Changes
Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} == Introduction == BORA Lite requires a dedicated adapter to be plugged to the BoraXEVB carrier board..."
{{InfoBoxTop}}
{{Applies To BoraLite}}
{{InfoBoxBottom}}
== Introduction ==
BORA Lite requires a dedicated adapter to be plugged to the [[BoraXEVB | BoraXEVB carrier board]]. This adapter:
* provides the SODIMM socket for the BORA Lite SOM
* provides the following additional features:
** microSD slot (for SD boot)
** JTAG connector
** CAN traslator for testing the CAN bus on BoraXEVB
* routes the signals from the BORA Lite pins to the BoraXEVB mating connectors
The following images show the top and bottom views of the BoraLite Adapter:
[[Image:BoraLite-adapter-top.jpg|thumb|none|border|350px|Top view]]
[[Image:BoraLite-adapter-bottom.jpg|thumb|none|border|350px|Bottom view]]
== Connectors' pinout ==
=== J1 - SODIMM connector ===
J1 is a TE Connectivity 204-pin SODIMM socket. The pinout matches the [[Pinout_(AxelLite) | Axel Lite pinout]].
=== J4, J5, J6 - BoraXEVB mating connectors ===
J4, J5 and J6 are Hirose FX8C-140S-SV connectors that match the [[BoraXEVB#Connectors_pinout | BoraXEVB SOM connectors' pinout]].
=== J2 - [[On_board_JTAG_connector_(BoraLite)|JTAG]] ===
J2 is a SAMTEC FSI-110-03-G-S connector. The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || DGND || - || -
|-
|2 || JTAG_TCK || - || -
|-
|3 || JTAG_TMS || - || -
|-
|4 || JTAG_TDO || - || -
|-
|5 || JTAG_TDI || - || -
|-
|6 || FPGA_INIT_B || - || -
|-
|7 || FPGA_PROGRAM_B || - || -
|-
|8 || FPGA_DONE || - || -
|-
|9 || D.N.C. || - || -
|-
|10 || 3V3 || - || -
|-
|}
== CAN ==
Pins IO_L6P_T0_34 and IO_L19P_T3_34 can be used as CAN_TX and CAN_RX for the CAN0 interface. The BoraLite adapter provide the [http://www.ti.com/lit/ds/symlink/sn65hvd230.pdf SN65HVD232] CAN bus transceiver required for proper CAN bus bus interface.
The CAN_L and CAN_H translated signals are routed to the J5.103 and J5.105 connector pins on BoraXEVB.
===Schematics===
* Orcad: https://www.dave.eu/system/files/files/bora-lite-adapter-CS092619_dsn.zip
* PDF: https://www.dave.eu/system/files/files/bora-lite-adapter-CS092619.pdf
===BOM===
* https://www.dave.eu/system/files/files/bora-lite-adapter-BLADP0000I0R_csv.zip
===Layout===
* https://www.dave.eu/system/files/files/bora-lite-adapter-CS092619_assem_view.pdf
{{Applies To BoraLite}}
{{InfoBoxBottom}}
== Introduction ==
BORA Lite requires a dedicated adapter to be plugged to the [[BoraXEVB | BoraXEVB carrier board]]. This adapter:
* provides the SODIMM socket for the BORA Lite SOM
* provides the following additional features:
** microSD slot (for SD boot)
** JTAG connector
** CAN traslator for testing the CAN bus on BoraXEVB
* routes the signals from the BORA Lite pins to the BoraXEVB mating connectors
The following images show the top and bottom views of the BoraLite Adapter:
[[Image:BoraLite-adapter-top.jpg|thumb|none|border|350px|Top view]]
[[Image:BoraLite-adapter-bottom.jpg|thumb|none|border|350px|Bottom view]]
== Connectors' pinout ==
=== J1 - SODIMM connector ===
J1 is a TE Connectivity 204-pin SODIMM socket. The pinout matches the [[Pinout_(AxelLite) | Axel Lite pinout]].
=== J4, J5, J6 - BoraXEVB mating connectors ===
J4, J5 and J6 are Hirose FX8C-140S-SV connectors that match the [[BoraXEVB#Connectors_pinout | BoraXEVB SOM connectors' pinout]].
=== J2 - [[On_board_JTAG_connector_(BoraLite)|JTAG]] ===
J2 is a SAMTEC FSI-110-03-G-S connector. The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || DGND || - || -
|-
|2 || JTAG_TCK || - || -
|-
|3 || JTAG_TMS || - || -
|-
|4 || JTAG_TDO || - || -
|-
|5 || JTAG_TDI || - || -
|-
|6 || FPGA_INIT_B || - || -
|-
|7 || FPGA_PROGRAM_B || - || -
|-
|8 || FPGA_DONE || - || -
|-
|9 || D.N.C. || - || -
|-
|10 || 3V3 || - || -
|-
|}
== CAN ==
Pins IO_L6P_T0_34 and IO_L19P_T3_34 can be used as CAN_TX and CAN_RX for the CAN0 interface. The BoraLite adapter provide the [http://www.ti.com/lit/ds/symlink/sn65hvd230.pdf SN65HVD232] CAN bus transceiver required for proper CAN bus bus interface.
The CAN_L and CAN_H translated signals are routed to the J5.103 and J5.105 connector pins on BoraXEVB.
===Schematics===
* Orcad: https://www.dave.eu/system/files/files/bora-lite-adapter-CS092619_dsn.zip
* PDF: https://www.dave.eu/system/files/files/bora-lite-adapter-CS092619.pdf
===BOM===
* https://www.dave.eu/system/files/files/bora-lite-adapter-BLADP0000I0R_csv.zip
===Layout===
* https://www.dave.eu/system/files/files/bora-lite-adapter-CS092619_assem_view.pdf
