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<div style="clear:right; margin-bottom: .5em; float: right; padding: .5em 0 .8em 1.4em; background: none;">
__TOC__
</div>
= BORA Lite Xilinx ZYNQ XC7007S/12S/14S / XC7Z010 / XC7Z020 SOM module =
[[File:BORALite-TOP.png|200px|frameless|border|left]]
[https://www.dave.eu/products/som/xilinx/zynq-XC7Z010-XC7Z020_bora BORA Lite] is the updated version of BORA SOM in a more compact and convenient form factor SODIMM DDR3 204pins.
This new top-class Single/Dual Cortex-A9 + FPGA CPU module by DAVE Embedded Systems is based on the recent Xilinx Zynq XC7Z007S/012S/014S or XC7Z010/XC7Z020 application processor.
Thanks to BORA Lite, customers are going to save time and resources by using a compact solution that includes both a CPU and an FPGA, avoiding complexities on the carrier PCB. Additionally, thanks to SODIMM form factor this solution represent the cheapest way to integrate a Zynq SOC in an embedded design.
The use of this processor enables extensive system-level differentiation of new applications in many industry fields, where high-performance and extremely compact form facto are key factors. Smarter system designs are made possible, following the trends in functionalities and interfaces of the new, state-of-the-art embedded products.
BORA Lite, like its parent BORA offers great computational power, thanks to the rich set of peripherals, the Single/Dual Cortex-A9 and the Artix-7 FPGA together with a large set of high-speed I/Os (up to 5GHz).
Thanks to the tight integration between the ARM-based processing system and the on-chip programmable logic, designers are free to add virtually any peripheral or create custom accelerators that extend system performance and better match specific application requirements.
BORA Lite is designed and manufactured according to DAVE Embedded Systems LITE Line specifications, in order to guarantee premium quality and technical value for customers who require the best quality/price ratio.
BORA Lite is suitable mainly for medical and industrial applications such as medical devices, Industrial PLCs, IoT systems and any other APP where FPGAs are the best fit.
Please visit [https://www.dave.eu/products/som/xilinx/zynq-XC7Z010-XC7Z020_boralite BORA Lite Web Page] for more product information.
== Main Features ==
* Unmatched performance thanks to Single/Dual ARM Cortex-A9@ up to 800MHz
* All memories you need: on-board NOR and NAND Flash
* Enabling smarter system thanks to Artix-7 FPGA integrated on chip
* FPGA banks wide range PSU input from 1.2V to 3.3V
* Highest security and reliability: internal voltage monitoring and power good enable
* Reduced carrier complexity: dual CAN, USB, Ethernet GB and native 3.3V I/O
* Easy to USE thanks to SODIMM form factor
* Accurate timing application thanks to on-board 5ppm RTC
* Industrial (-40/+85°C) operating temperature range
== BORA Lite technical specification ==
{| class="wikitable outercollapse" | width="100%"
|
{| class="wikitable mw-collapsible mw-collapsed"
! colspan="3" style="text-align:left" | CPU and Memories
|-
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| CPU||Xilinx Single/Dual ARM Cortex-A9<br>ZYNQ XC7Z007S/012S014S or XC7Z010/ZC7Z020 @ 800MHz ||
|-
| Cache||L1: 32Kbyte instruction, 32Kbyte data<br>L2: 512Kbyte for each core ||
|-
| RAM|| DDR3 SDRAM @ 533 MHz<br>Up to 1 GB ||
|-
| SRAM|| On-chip RAM, 256 KB ||
|-
| Storage||Flash NOR SPI (8, 16 MB)<br>Flash NAND (all sizes, on request - Up to 1GB) ||
|-
|}
{| class="wikitable mw-collapsible mw-collapsed"
! colspan="3" style="text-align:left" | Peripherals
|-
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| Coprocessors|| NEON™ & Single / Double Precision<br>Floating Point for each processor||
|-
| USB||1x 2.0 OTG ports ||
|-
| UARTs||Up to 2x UART ports ||
|-
| GPIO||Up to x lines, shared with other functions (interrupts available) ||
|-
| Networks||Ethernet 10/100/1000 Mbps ||
|-
| CAN||Up to 2x full CAN 2.0B compliant interfaces ||
|-
| SD/MMC||2x SD/SDIO 2.0/MMC3.31 compliant controllers ||
|-
| Serial buses||2x full-duplex SPI ports with three peripheral chip selects<br>2x master and slave I²C interfaces ||
|-
| Timers||2x triple timers/counters (TTC) ||
|-
| RTC ||On board (DS3232), external battery powered ||
|-
| Debug||JTAG IEEE 1149.1 Test Access Port<br>CoreSight™ and Program Trace Macrocell (PTM) ||
|-
|}
{| class="wikitable mw-collapsible mw-collapsed"
! colspan="3" style="text-align:left" | Electrical, mechanical and environmentale specifications
|-
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| FPGA model||Artix™-7||
|-
| Logic cells||23K to 85K||
|-
| LUTs||14K to 53K||
|-
| Flip flops||29K to 106K||
|-
| RAM||225KB to 560KB||
|-
| DSP slices||66 to 220||
|-
| Differential pairs||Up to 62 differential pairs for high freq. interfaces||
|-
|}
{| class="wikitable mw-collapsible mw-collapsed"
! colspan="3" style="text-align:left" | Electrical, mechanical and environmentale specifications
|-
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| Supply Voltage||3.3V, on-board voltage regulation||
|-
| Active power consumption|| Please refer to [[Hardware_Manual_(BoraLite)#Power_consumption | Power consumption]] section||
|-
| Dimensions||67,5mm x 45mm||
|-
| Weight|| ||
|-
| MTBF|| ||
|-
| Operating temperature||0..70 °C<br>-40..+85 °C||
|-
| Connectors||SO-DIMM 204 pins||
|}
| [[File:Boralite-bd.png|300px|center]]
|
* [https://www.dave.eu/products/som/xilinx/zynq-XC7Z010-XC7Z020_boralite BORA Lite Web Page]
* [https://www.dave.eu/sites/default/files/products/BORA%20Lite%20leaflet.pdf BORA Lite leaflet]
* [https://www.dave.eu/sites/default/files/products/diagram/boralite-bd.pdf BORA Lite Block Diagram]
|}
== Hardware Documentation ==
{| class="wikitable" |width="100%"
| '''Electrical Schematics'''
|
* [[Hardware Manual (BoraLite)]]
* [[Reset scheme (BoraLite)| Reset Block Diagram]]
* [[RTC (Bora)|On board RTC specifications]]
* [[Pinout (BoraLite)|BORA Electrical pinout]]
| '''Mechanical Documentation'''
|
* [https://www.dave.eu/sites/default/files/files/boraLite.dxf.zip BORA 2D Mechanical Drawing (DXF format)]
* [https://www.dave.eu/sites/default/files/files/boraLite_stp.zip BORA 3D Mechanical Drawing (STEP format)]
|'''Carrier Board design'''
|
* [https://www.dave.eu/system/files/area-riservata/boraevb-2.2.0-BELK-dsn.zip Evaluation Board Electrical Schematics]
* [[Carrier_board_design_guidelines_(SOM) | General carrier board design guidelines]]
* [[Integration guide (Bora/BoraX)|BORA specific integration guidelines]]
| '''Thermal & Power Management
|'''
* [[Thermal_management_guidelines | Thermal management guidelines]]
* [[Power_consumption_(Bora)|Power consumption benchmarks]]
* [[Power (Bora)|Power management guidelines]]
|}
== Software Documentation ==
{| class="wikitable" | width="100%"
| '''Bootloader'''
|
* [[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components | U-boot releases]]
* [[System_boot_and_recovery_via_microSD_card_(BELK) | BORA Booting options]]
* [[Change_Linux_Command_Line_Parameter_from_U-boot | How to modify Linux parameters in U-Boot]]
| '''Linux'''
|
* [[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components | Linux releases]]
* [[Booting_Linux_Kernel | How to boot Linux on DAVE Embedded Systems' SOMs]]
* [[Bora_Embedded_Linux_Kit_(BELK) | DAVE Embedded Systems' Linux Kit]]
* [[BELK/BXELK_Quick_Start_Guide | Embedded Linux Kit Quick Start Guide]]
| '''Vivado'''
|
* [[Programmable_logic_(Bora) | BORA SOM's programmable logic PL]]
* [[Creating_and_building_example_Vivado_project_(BELK) | A project example in Vivado]]
|}
= BORA Lite Evaluation Kit =
BORA Lite Evaluation Kit BELK-L-S is based on BXELK development/test board designed to start working with the BORA Lite SOM and experimenting with the implemented features. The carrier board hosts a BORA Lite SOM module with a proper adapter let the SOM module to be inserted into the BXELK BORAX socket.
Please refer to [[BoraXEVB|this page]] for more details.
= Stay tuned with updates: BORA RSS Feed =
Please subscribe to the <newsfeedlink feed="Bora Pages Updates" format="rss">Bora Pages Updates</newsfeedlink> RSS Feed using your favourite RSS reader to be notified on '''wiki pages updates related to BORA'''.
Please refer to the [[Dave_Developer's_Wiki_Conventions#Keeping_updated_on_Dave_Developer.27s_wiki_pages.27_modifications | Keeping updated on '''DAVE Embedded Systems''' Developer's wiki pages modifications]] section for further information on how to subscribe to the RSS feed.
= Index of topics about BORA Lite SoM =
This category collects all the pages specific to BORA Lite module and related carrier board.
__TOC__
</div>
= BORA Lite Xilinx ZYNQ XC7007S/12S/14S / XC7Z010 / XC7Z020 SOM module =
[[File:BORALite-TOP.png|200px|frameless|border|left]]
[https://www.dave.eu/products/som/xilinx/zynq-XC7Z010-XC7Z020_bora BORA Lite] is the updated version of BORA SOM in a more compact and convenient form factor SODIMM DDR3 204pins.
This new top-class Single/Dual Cortex-A9 + FPGA CPU module by DAVE Embedded Systems is based on the recent Xilinx Zynq XC7Z007S/012S/014S or XC7Z010/XC7Z020 application processor.
Thanks to BORA Lite, customers are going to save time and resources by using a compact solution that includes both a CPU and an FPGA, avoiding complexities on the carrier PCB. Additionally, thanks to SODIMM form factor this solution represent the cheapest way to integrate a Zynq SOC in an embedded design.
The use of this processor enables extensive system-level differentiation of new applications in many industry fields, where high-performance and extremely compact form facto are key factors. Smarter system designs are made possible, following the trends in functionalities and interfaces of the new, state-of-the-art embedded products.
BORA Lite, like its parent BORA offers great computational power, thanks to the rich set of peripherals, the Single/Dual Cortex-A9 and the Artix-7 FPGA together with a large set of high-speed I/Os (up to 5GHz).
Thanks to the tight integration between the ARM-based processing system and the on-chip programmable logic, designers are free to add virtually any peripheral or create custom accelerators that extend system performance and better match specific application requirements.
BORA Lite is designed and manufactured according to DAVE Embedded Systems LITE Line specifications, in order to guarantee premium quality and technical value for customers who require the best quality/price ratio.
BORA Lite is suitable mainly for medical and industrial applications such as medical devices, Industrial PLCs, IoT systems and any other APP where FPGAs are the best fit.
Please visit [https://www.dave.eu/products/som/xilinx/zynq-XC7Z010-XC7Z020_boralite BORA Lite Web Page] for more product information.
== Main Features ==
* Unmatched performance thanks to Single/Dual ARM Cortex-A9@ up to 800MHz
* All memories you need: on-board NOR and NAND Flash
* Enabling smarter system thanks to Artix-7 FPGA integrated on chip
* FPGA banks wide range PSU input from 1.2V to 3.3V
* Highest security and reliability: internal voltage monitoring and power good enable
* Reduced carrier complexity: dual CAN, USB, Ethernet GB and native 3.3V I/O
* Easy to USE thanks to SODIMM form factor
* Accurate timing application thanks to on-board 5ppm RTC
* Industrial (-40/+85°C) operating temperature range
== BORA Lite technical specification ==
{| class="wikitable outercollapse" | width="100%"
|
{| class="wikitable mw-collapsible mw-collapsed"
! colspan="3" style="text-align:left" | CPU and Memories
|-
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| CPU||Xilinx Single/Dual ARM Cortex-A9<br>ZYNQ XC7Z007S/012S014S or XC7Z010/ZC7Z020 @ 800MHz ||
|-
| Cache||L1: 32Kbyte instruction, 32Kbyte data<br>L2: 512Kbyte for each core ||
|-
| RAM|| DDR3 SDRAM @ 533 MHz<br>Up to 1 GB ||
|-
| SRAM|| On-chip RAM, 256 KB ||
|-
| Storage||Flash NOR SPI (8, 16 MB)<br>Flash NAND (all sizes, on request - Up to 1GB) ||
|-
|}
{| class="wikitable mw-collapsible mw-collapsed"
! colspan="3" style="text-align:left" | Peripherals
|-
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| Coprocessors|| NEON™ & Single / Double Precision<br>Floating Point for each processor||
|-
| USB||1x 2.0 OTG ports ||
|-
| UARTs||Up to 2x UART ports ||
|-
| GPIO||Up to x lines, shared with other functions (interrupts available) ||
|-
| Networks||Ethernet 10/100/1000 Mbps ||
|-
| CAN||Up to 2x full CAN 2.0B compliant interfaces ||
|-
| SD/MMC||2x SD/SDIO 2.0/MMC3.31 compliant controllers ||
|-
| Serial buses||2x full-duplex SPI ports with three peripheral chip selects<br>2x master and slave I²C interfaces ||
|-
| Timers||2x triple timers/counters (TTC) ||
|-
| RTC ||On board (DS3232), external battery powered ||
|-
| Debug||JTAG IEEE 1149.1 Test Access Port<br>CoreSight™ and Program Trace Macrocell (PTM) ||
|-
|}
{| class="wikitable mw-collapsible mw-collapsed"
! colspan="3" style="text-align:left" | Electrical, mechanical and environmentale specifications
|-
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| FPGA model||Artix™-7||
|-
| Logic cells||23K to 85K||
|-
| LUTs||14K to 53K||
|-
| Flip flops||29K to 106K||
|-
| RAM||225KB to 560KB||
|-
| DSP slices||66 to 220||
|-
| Differential pairs||Up to 62 differential pairs for high freq. interfaces||
|-
|}
{| class="wikitable mw-collapsible mw-collapsed"
! colspan="3" style="text-align:left" | Electrical, mechanical and environmentale specifications
|-
| align="center" style="background:#f0f0f0;"|'''Feature'''
| align="center" style="background:#f0f0f0;"|'''Specifications'''
| align="center" style="background:#f0f0f0;"|'''Options'''
|-
| Supply Voltage||3.3V, on-board voltage regulation||
|-
| Active power consumption|| Please refer to [[Hardware_Manual_(BoraLite)#Power_consumption | Power consumption]] section||
|-
| Dimensions||67,5mm x 45mm||
|-
| Weight|| ||
|-
| MTBF|| ||
|-
| Operating temperature||0..70 °C<br>-40..+85 °C||
|-
| Connectors||SO-DIMM 204 pins||
|}
| [[File:Boralite-bd.png|300px|center]]
|
* [https://www.dave.eu/products/som/xilinx/zynq-XC7Z010-XC7Z020_boralite BORA Lite Web Page]
* [https://www.dave.eu/sites/default/files/products/BORA%20Lite%20leaflet.pdf BORA Lite leaflet]
* [https://www.dave.eu/sites/default/files/products/diagram/boralite-bd.pdf BORA Lite Block Diagram]
|}
== Hardware Documentation ==
{| class="wikitable" |width="100%"
| '''Electrical Schematics'''
|
* [[Hardware Manual (BoraLite)]]
* [[Reset scheme (BoraLite)| Reset Block Diagram]]
* [[RTC (Bora)|On board RTC specifications]]
* [[Pinout (BoraLite)|BORA Electrical pinout]]
| '''Mechanical Documentation'''
|
* [https://www.dave.eu/sites/default/files/files/boraLite.dxf.zip BORA 2D Mechanical Drawing (DXF format)]
* [https://www.dave.eu/sites/default/files/files/boraLite_stp.zip BORA 3D Mechanical Drawing (STEP format)]
|'''Carrier Board design'''
|
* [https://www.dave.eu/system/files/area-riservata/boraevb-2.2.0-BELK-dsn.zip Evaluation Board Electrical Schematics]
* [[Carrier_board_design_guidelines_(SOM) | General carrier board design guidelines]]
* [[Integration guide (Bora/BoraX)|BORA specific integration guidelines]]
| '''Thermal & Power Management
|'''
* [[Thermal_management_guidelines | Thermal management guidelines]]
* [[Power_consumption_(Bora)|Power consumption benchmarks]]
* [[Power (Bora)|Power management guidelines]]
|}
== Software Documentation ==
{| class="wikitable" | width="100%"
| '''Bootloader'''
|
* [[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components | U-boot releases]]
* [[System_boot_and_recovery_via_microSD_card_(BELK) | BORA Booting options]]
* [[Change_Linux_Command_Line_Parameter_from_U-boot | How to modify Linux parameters in U-Boot]]
| '''Linux'''
|
* [[Bora_Embedded_Linux_Kit_(BELK)#BELK_software_components | Linux releases]]
* [[Booting_Linux_Kernel | How to boot Linux on DAVE Embedded Systems' SOMs]]
* [[Bora_Embedded_Linux_Kit_(BELK) | DAVE Embedded Systems' Linux Kit]]
* [[BELK/BXELK_Quick_Start_Guide | Embedded Linux Kit Quick Start Guide]]
| '''Vivado'''
|
* [[Programmable_logic_(Bora) | BORA SOM's programmable logic PL]]
* [[Creating_and_building_example_Vivado_project_(BELK) | A project example in Vivado]]
|}
= BORA Lite Evaluation Kit =
BORA Lite Evaluation Kit BELK-L-S is based on BXELK development/test board designed to start working with the BORA Lite SOM and experimenting with the implemented features. The carrier board hosts a BORA Lite SOM module with a proper adapter let the SOM module to be inserted into the BXELK BORAX socket.
Please refer to [[BoraXEVB|this page]] for more details.
= Stay tuned with updates: BORA RSS Feed =
Please subscribe to the <newsfeedlink feed="Bora Pages Updates" format="rss">Bora Pages Updates</newsfeedlink> RSS Feed using your favourite RSS reader to be notified on '''wiki pages updates related to BORA'''.
Please refer to the [[Dave_Developer's_Wiki_Conventions#Keeping_updated_on_Dave_Developer.27s_wiki_pages.27_modifications | Keeping updated on '''DAVE Embedded Systems''' Developer's wiki pages modifications]] section for further information on how to subscribe to the RSS feed.
= Index of topics about BORA Lite SoM =
This category collects all the pages specific to BORA Lite module and related carrier board.
