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Created page with "{{InfoBoxTop}} {{Applies To SDVX}} {{InfoBoxBottom}} ==Introduction== 500px|frameless|border SDV04 is a carrier board designed to host :Category:Axel_U..."
{{InfoBoxTop}}
{{Applies To SDVX}}
{{InfoBoxBottom}}
==Introduction==
[[File:SDV04.png|500px|frameless|border]]
SDV04 is a carrier board designed to host [[:Category:Axel_ULite|AXEL ULITE]] and [[:Category:AxelLite|AXEL LITE]] (through an adapter) SoMs. It exports major specific peripherals connectors fro each SoMs.
==Block Diagram==
The following picture shows SDV04's block diagram:
[[File:SDV04-block diagram.png|700px|frameless|border|centre]]
== Features ==
* 10/100 Ethernet
* 1x USB HOST, 1x USB OTG
* Serial port (RS232)
* Single/Dual channel LVDS connector - for AxelLite SOM
* Single channel LVDS connector - for AxelUlite SOM
* Audio connector with internal power amplifier
* Pin strip expansion connectors for GPIOs
== Connectors pinout ==
=== J16 - PSU ===
J16 is a Molex 26-60-4020 2x1-pn 3.56mm pitch connector. The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || DGND|| Ground || -
|-
|2 || EXT_12V|| 12V Power Supply || -
|-
|}
=== J1 - SODIMM connector ===
J1 is a TE Connectivity 204-pin SODIMM socket. The pinout matches the [[Pinout_(AxelLite) | Axel Lite pinout]] and the [[Pinout_(AXEL_ULite) | Axel ULite pinout]].
=== J6 - JTAG ===
J6 is a SAMTEC FSI-110-03-G-S connector. The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || DGND || - || -
|-
|2 || JTAG_TCK || - || -
|-
|3 || JTAG_TMS || - || -
|-
|4 || JTAG_TDO || - || -
|-
|5 || JTAG_TDI || - || -
|-
|6 || JTAG_nTRST || - || -
|-
|7 || CPU_PORn || - || -
|-
|8 || N.C. || - || -
|-
|9 || N.C. || - || -
|-
|10 || JTAG_VREF || - || -
|-
|}
=== USB HOST - J11 ===
J11 is a standard USB Type A Vertical Female host connector.
The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 ||5V || VDD || -
|-
|2 ||USB_OTG_DN || USB OTG Data- || -
|-
|3 ||USB_OTG_DP || USB OTG Data+ || -
|-
|4 ||DGND || Ground || -
|-
|}
=== USB OTG - J12 ===
J12 is a Molex 4 pin connector. It can be used both as Host or OTG connector depending on internal USB_OTG_ID signal connection
The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 ||5V || VDD || -
|-
|2 ||USB_OTG_DN || USB OTG Data- || -
|-
|3 ||USB_OTG_DP || USB OTG Data+ || -
|-
|4 ||DGND || Ground || -
|-
|}
=== LVDS - J20 ===
J20 is a 10x2 DF13A-20DP header. The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1, 2 ||3.3V_LCD0 || +3.3V || -
|-
|4, 7, 10,<br>13, 16, 19, 21, 22 ||DGND || Ground || -
|-
|3 || GPIO || VDD or GND (internal mount) || -
|-
|5 || LVDS_TX0_N || TX0- || -
|-
|6 || LVDS_TX0_P || TX0+ || -
|-
|9 || LVDS_TX1_P || TX1+ || -
|-
|8 || LVDS_TX1_N || TX1- || -
|-
|11 || LVDS_TX2_N|| TX2- || -
|-
|12|| LVDS_TX2_P|| TX2+ || -
|-
|14 || LVDS_CLK_N || Clock- || -
|-
|15 || LVDS_CLK_P || Clock+ || -
|-
|17 || BL PWM || Backlight PWM control || -
|-
|18 || 5V LCD || Backlight 5V power supply - || -
|-
|19 || GPIO || VDD or GND (internal mount) || -
|-
|20 || BL EN || Backligth Enable || -
|-
|}
=== MicroSD - J13 ===
J13 is a microSD memory card connector. It can be used as a <b>boot device</b> properly configuring the J18 pin header connector.
The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 ||SD1_DAT2||| DATA[2] || -
|-
|2 ||SD1_DAT3||| Card Detect/DATA[3] || -
|-
|3 ||SD1_CMD||| CMD line || -
|-
|4 ||VDD||| 3.3V Power Supply || -
|-
|5 ||SD1_CLK||| Clock || -
|-
|6, 9, 10, 11, 12 ||DGND||| - || -
|-
|7 ||SD1_DAT0||| DATA[0] || -
|-
|8 ||SD1_DAT1||| DATA[1] || -
|-
|13 ||SD1_CD|| Card detect || -
|-
|}
=== JP1 pin strip connectors ===
JP1 is a 2x6-pin, 2.54mm pitch header, pinstrip connector. The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || 3.3V|| - || -
|-
|2 || DGND|| Ground || -
|-
|3 || GPIO_IN_0 || || -
|-
|4 || GPIO_OUT_0 || || -
|-
|5 || GPIO_IN_1 || || -
|-
|6 || GPIO_OUT_1 || || -
|-
|7 || GPIO_IN_2 || || -
|-
|8 || GPIO_OUT_2 || || -
|-
|9 || GPIO_IN_3 || || -
|-
|10 || GPIO_OUT_3 || || -
|-
|11 || GPIO_IN_4 || || -
|-
|12 || GPIO_OUT_4 || || -
|-
|}
{{Applies To SDVX}}
{{InfoBoxBottom}}
==Introduction==
[[File:SDV04.png|500px|frameless|border]]
SDV04 is a carrier board designed to host [[:Category:Axel_ULite|AXEL ULITE]] and [[:Category:AxelLite|AXEL LITE]] (through an adapter) SoMs. It exports major specific peripherals connectors fro each SoMs.
==Block Diagram==
The following picture shows SDV04's block diagram:
[[File:SDV04-block diagram.png|700px|frameless|border|centre]]
== Features ==
* 10/100 Ethernet
* 1x USB HOST, 1x USB OTG
* Serial port (RS232)
* Single/Dual channel LVDS connector - for AxelLite SOM
* Single channel LVDS connector - for AxelUlite SOM
* Audio connector with internal power amplifier
* Pin strip expansion connectors for GPIOs
== Connectors pinout ==
=== J16 - PSU ===
J16 is a Molex 26-60-4020 2x1-pn 3.56mm pitch connector. The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || DGND|| Ground || -
|-
|2 || EXT_12V|| 12V Power Supply || -
|-
|}
=== J1 - SODIMM connector ===
J1 is a TE Connectivity 204-pin SODIMM socket. The pinout matches the [[Pinout_(AxelLite) | Axel Lite pinout]] and the [[Pinout_(AXEL_ULite) | Axel ULite pinout]].
=== J6 - JTAG ===
J6 is a SAMTEC FSI-110-03-G-S connector. The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || DGND || - || -
|-
|2 || JTAG_TCK || - || -
|-
|3 || JTAG_TMS || - || -
|-
|4 || JTAG_TDO || - || -
|-
|5 || JTAG_TDI || - || -
|-
|6 || JTAG_nTRST || - || -
|-
|7 || CPU_PORn || - || -
|-
|8 || N.C. || - || -
|-
|9 || N.C. || - || -
|-
|10 || JTAG_VREF || - || -
|-
|}
=== USB HOST - J11 ===
J11 is a standard USB Type A Vertical Female host connector.
The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 ||5V || VDD || -
|-
|2 ||USB_OTG_DN || USB OTG Data- || -
|-
|3 ||USB_OTG_DP || USB OTG Data+ || -
|-
|4 ||DGND || Ground || -
|-
|}
=== USB OTG - J12 ===
J12 is a Molex 4 pin connector. It can be used both as Host or OTG connector depending on internal USB_OTG_ID signal connection
The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 ||5V || VDD || -
|-
|2 ||USB_OTG_DN || USB OTG Data- || -
|-
|3 ||USB_OTG_DP || USB OTG Data+ || -
|-
|4 ||DGND || Ground || -
|-
|}
=== LVDS - J20 ===
J20 is a 10x2 DF13A-20DP header. The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1, 2 ||3.3V_LCD0 || +3.3V || -
|-
|4, 7, 10,<br>13, 16, 19, 21, 22 ||DGND || Ground || -
|-
|3 || GPIO || VDD or GND (internal mount) || -
|-
|5 || LVDS_TX0_N || TX0- || -
|-
|6 || LVDS_TX0_P || TX0+ || -
|-
|9 || LVDS_TX1_P || TX1+ || -
|-
|8 || LVDS_TX1_N || TX1- || -
|-
|11 || LVDS_TX2_N|| TX2- || -
|-
|12|| LVDS_TX2_P|| TX2+ || -
|-
|14 || LVDS_CLK_N || Clock- || -
|-
|15 || LVDS_CLK_P || Clock+ || -
|-
|17 || BL PWM || Backlight PWM control || -
|-
|18 || 5V LCD || Backlight 5V power supply - || -
|-
|19 || GPIO || VDD or GND (internal mount) || -
|-
|20 || BL EN || Backligth Enable || -
|-
|}
=== MicroSD - J13 ===
J13 is a microSD memory card connector. It can be used as a <b>boot device</b> properly configuring the J18 pin header connector.
The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 ||SD1_DAT2||| DATA[2] || -
|-
|2 ||SD1_DAT3||| Card Detect/DATA[3] || -
|-
|3 ||SD1_CMD||| CMD line || -
|-
|4 ||VDD||| 3.3V Power Supply || -
|-
|5 ||SD1_CLK||| Clock || -
|-
|6, 9, 10, 11, 12 ||DGND||| - || -
|-
|7 ||SD1_DAT0||| DATA[0] || -
|-
|8 ||SD1_DAT1||| DATA[1] || -
|-
|13 ||SD1_CD|| Card detect || -
|-
|}
=== JP1 pin strip connectors ===
JP1 is a 2x6-pin, 2.54mm pitch header, pinstrip connector. The following table reports the connector's pinout:
{| class="wikitable"
|-
!Pin#
!Pin name
!Function
!Notes
|-
|1 || 3.3V|| - || -
|-
|2 || DGND|| Ground || -
|-
|3 || GPIO_IN_0 || || -
|-
|4 || GPIO_OUT_0 || || -
|-
|5 || GPIO_IN_1 || || -
|-
|6 || GPIO_OUT_1 || || -
|-
|7 || GPIO_IN_2 || || -
|-
|8 || GPIO_OUT_2 || || -
|-
|9 || GPIO_IN_3 || || -
|-
|10 || GPIO_OUT_3 || || -
|-
|11 || GPIO_IN_4 || || -
|-
|12 || GPIO_OUT_4 || || -
|-
|}
