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Camera parallel interface belongs to the Imaging Subsystem (ISS) instead. As ISS documentation is released under NDA, no information are provided here. For more details about it please contact your local Texas Instruments sales representative or FAE.
===Main features===The following is a list of VIN0/VIN1 main features:* The HDVPSS supports two independently configurable external video input capture ports with up to165MHz.* Each video input capture port can be operated as one 24-bit mode to support RGB capture or 16-bitinput channel (with separate Y and Cb/Cr inputs) or two clock independent 8-bit input channels (withinterleaved Y/C data input).* Support both embedded sync and discrete sync* The video capture port channel supports de-multiplexing of both pixel-to-pixel and line-to-linemultiplexed streams.* Up to 1920x1200@60 Hz (165 MHz) input data rate supports 16-bit mode input port.* Each video capture port supports one scaler capable of both up and down scaling of onenon-multiplexed input stream (one of two 8-bit channel inputs or 16-bit channel input data). Note that ifthe source is from external video decoder/camera, only down scaling is supported.* Each video capture port supports one programmable color space conversion to convert between 24-bitRGB data and YCbCr data.* The VIP supports data storage in RGB, 422, and 420 formats.* Each video capture port channel supports chroma down-sampling (422 to 420) for any non-multiplexedinput data. The chroma down-sampling for multiplexed streams is done as memory to memoryoperations outside of HDVPSS on an individual frame data.
===Routing on Naon connectors===
The following tables summarizes which signals - referred to video input/output ports - are routed to Naon connectors and thus are available to user application. It is also useful to visualize potential issues due to the pads' multiplexing scheme.
