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Power consumption (SBC Lynx)

93 bytes added, 08:54, 27 January 2017
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Please note that SBC Lynx platform is extremely flexible{{efn|Consider for example the expandability provided by J45/J52 interfaces.}}, so it is virtually impossible to test for all possible configurations and applications on the market. The use cases here presented should cover most of real-world scenarios. However actual customer's application might require more power than values reported here or customer's use case may be differ significantly with respect to the ones here considered. Therefore, '''application-specific requirements have always to be taken into consideration''' in order to size power supply unit and to implement thermal management properly.
 
==Use case #1: headless system==
 
==Use case #2: system equipped with LCD panel==
<div id="PSUBlockDiagram">The following picture shows a simplified block diagram of the measurement system.</div>
*power probe #2 is connected to the input power rail of the PMIC NXP PF3000 (nominal voltage is 3.75V); this, in turn, powers the processor subsystem.
===Heavy load configurations===
Measurements have been performed on the following platform (also denoted as ''testbed1'' in the rest of the document):
* SBC Lynx rev.0 (S-XUBB0000C0R) equipped with a plug-in board for 24-bit RGB LCD interfacing
** NAND: stress test with <code>mtd</code> kernel modules.
===Idle configurations===
Some power-constrained applications can't afford to make use of [[#Deep-sleep mode (aka suspend)|deep-sleep mode]] when the system "has nothing to do", because wake up process may take too long to complete. In such situations aggressive implementation of so-called idle mode can come to help.
Basic assumption is that the system spends most of the time in an idle condition (that is there are no user applications ready to run nor interrupt requests to serve).
** RS232 transceiver is shutdown via unused processor's GPIO
**RS485 polarization network has been removed.
====Generic idle====
In this case the default governor (<code>interactive</code>) is used.
[1] '''24MHz active oscillator power consumption is included'''. As the board under test is equipped with iMX6UL revision 1.0, active oscillator is required to implement the fix described by errata ERR009455. Typical consumption of this oscillator is about 20mW. Future revision of the board will be populated with silicon revision 1.1 or newer. Thus active oscillator will be removed. For more details please refer to ''Chip Errata for the i.MX 6UltraLite''<ref name="IMX6ULCE">Freescale Semiconductor, ''Chip Errata for the i.MX 6UltraLite'', Rev. 0.1, 02/2016</ref>.
====Optimized idle====
In this case the <code>powersave</code> governor is used. Most importantly, Ethernet interface is disabled, as described in ''i.MX 6UltraLite Power Consumption Measurement'' application note<ref name="AN5170">NXP Semiconductors, ''i.MX 6UltraLite Power Consumption Measurement'', Rev. 1, 04/2016</ref>. This allows to reduce power consumption significantly because
*processor's peripheral bus can be disabled as well
</pre>
===Deep-sleep mode (aka suspend)===
The same test bed described in the [[#Idle configurations|Idle configuration]] section has been used.
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