Bureaucrats, dave_user, Administrators
4,650
edits
Changes
no edit summary
== Power Supply Unit (PSU) and recommended power-up sequence ==
Implementing correct power-up sequence for i.MX6UL processors is not a trivial task because several power rails are involved. AXELULite SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
[[File:AxelLite-power-sequence.png | 800px]]
The PSU is composed of two main blocks:
* power management integrated circuit (PMIC NXP PF3000)
* additional generic power management circuitry that completes PMIC functionalities.
The PSU:
* generates the proper power-up sequence required by i.MX6UL processor and , surrounding memories and peripherals
* synchronizes the powering up of carrier board in order to prevent back power.
The typical power-up sequence is the following:
# (optional) PMIC_LICELL is poweredby a Lithium coin cell battery#*iMX6UL SNVS domain is powered (VDD_SNVS_IN)
# VIN_SOM main power supply rail is powered
#*iMX6UL SNVS domain is powered (VDD_SNVS_IN)
# CPU_PORn (active-low) is driven low
# PMIC_PWRON signal is pulled-up (unless carrier board circuitry keeps this signal low for any reason)
# PMIC transitions from OFF to ON state
# PMIC initiates power-up sequence needed by MX6 processor as per iMX6UL requirements# SOM_PGOOD signal is raisedset ti logic '1'; this active-high signal indicates that SoM's I/O is powered. This signal can be used to manage carrier board power up sequence in order to prevent back powering (from SoM to carrier board or vice versa). For additional informationGenerally speaking, please refer all the circuitry that interfaces SOM's I/O signals should be powered on when SOM_PGOOD turns to the [[Power_(AxelLite)#Note_on_BOARD_PGOOD_usage | Note]] belowlogic '1'.
# CPU_PORn is released.
For further details, please refer to <ref name==== Note on SOM_PGOOD usage ====SOM_PGOOD is used on carrier board to implement proper power up sequencing. Generally speaking"PF3000">Freescale Semiconductor, all the circuitry that interfaces SOM's I/O signals should be powered on when SOM_PGOOD turns to logic '1'. [[File:Axel-litePF3000 Advance Information -power-good.png]] === Power rails and related signals === The following list describes in detail the power rails and the power related signals. Please note that Management Integrated Circuit (PMIC regulators ouput voltages can be changed only if explicitly allowed) for i. * 3MX 7 & i.3VINMX 6SL/SX/UL</ref>, <ref name="IMX6ULIEC">Freescale Semiconductor, Data Sheet: this is external main power railTechnical Data - i. Voltage range is 3.3V±5%* PMIC_CELL: PMIC's coin cell supply inputMX 6UltraLite Applications Processors for Industrial Products</output* BOARD_PGOOD: this output signal is used to indicate when carrier board's circuitry interfacing Axel Lite's I/Os has to be powered upref>.
