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→Vivado project
export PROJ_DIR=$(pwd)/../bora-build-YYYYMMDD-nobk
</pre>
Configure Vivado settings (1){{efn|In a 32 bit system, Vivado settings are configured with the following command <code>/opt/Xilinx/Vivado/2013.3/settings32.sh</code>.}}:
<pre>
. /opt/Xilinx/Vivado/2013.3/settings64.sh
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Launch Vivado with <code>build_project</code> script (2){{efn|Passing the <code>-tclargs "-bitstream"</code> parameters allows for automatic building of the FPGA bitstream.}}:
<pre>
vivado -mode tcl -source build_project.tcl -notrace -tclargs "-bitstream"
</pre>
====FSBL====
Once the Vivado project build is completed, the hardware configuration can be exported starting the SDK to build the FSBL. From the SDK GUI:
