Bureaucrats, dave_user, Administrators
4,650
edits
Changes
→J1 even pins (2 to 140)
| J1.2||VDDIO_BANK35||||||||S||||
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| J1.4||DGND||DGND||-||-||-||-G||Digital ground
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| J1.6||IO_L24P_T3_AD15P_35||FPGA.IO_L24P_T3_AD15P_35||H1||Bank 35||I/O||User defined||
| J1.12||IO_L22N_T3_AD7N_35||FPGA.IO_L22N_T3_AD7N_35||G2||Bank 35||I/O||User defined||
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| J1.14||DGND||DGND||-||-||-||-G||Digital ground
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| J1.16||IO_L20P_T3_AD6P_35||FPGA.IO_L20P_T3_AD6P_35||G4||Bank 35||I/O||User defined||
| J1.22||IO_L18N_T2_AD13N_35||FPGA.IO_L18N_T2_AD13N_35||B1||Bank 35||I/O||User defined||
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| J1.24||DGND||DGND||-||-||-||-G||Digital ground
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| J1.26||IO_L16P_T2_35||FPGA.IO_L16P_T2_35||D1||Bank 35||I/O||User defined||
| J1.28||IO_L16N_T2_35||FPGA.IO_L16N_T2_35||C1||Bank 35||I/O||User defined||
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| J1.30||DGND||DGND||-||-||-||-G||Digital ground
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| J1.32||IO_L14P_T2_AD4P_SRCC_35||FPGA.IO_L14P_T2_AD4P_SRCC_35||D3||Bank 35||I/O||User defined||
| J1.36||IO_L12P_T1_MRCC_35||FPGA.IO_L12P_T1_MRCC_35||D5||Bank 35||I/O||User defined||
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| J1.38||DGND||DGND||-||-||-||-G||Digital ground
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| J1.40||IO_L12N_T1_MRCC_35||FPGA.IO_L12N_T1_MRCC_35||C4||Bank 35||I/O||User defined||
| J1.46||IO_L8P_T1_AD10P_35||FPGA.IO_L8P_T1_AD10P_35||B7||Bank 35||I/O||User defined||
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| J1.48||DGND||DGND||-||-||-||-G||Digital ground
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| J1.50||IO_L8N_T1_AD10N_35||FPGA.IO_L8N_T1_AD10N_35||B6||Bank 35||I/O||User defined||
| J1.58||IO_L4N_T0_35||FPGA.IO_L4N_T0_35||G7||Bank 35||I/O||User defined||
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| J1.60||DGND||DGND||-||-||-||-G||Digital ground
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| J1.62||IO_L2P_T0_AD8P_35||FPGA.IO_L2P_T0_AD8P_35||D7||Bank 35||I/O||User defined||
TBD
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| J1.86||DGND||DGND||-||-||-||-G||Digital ground
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| J1.88||PS_MIO46_501||CPU.PS_MIO46_501||D11||Bank 501||I/O||1.8V||10kOhm pull-up
| J1.90||ETH_INTn||||||||||||Can be optionally connected to Ethernet PHY's INT_N / PME_N2
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| J1.92||DGND||DGND||-||-||-||-G||Digital ground
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| J1.94||ETH_TXRX3_M||LAN.TXRXM_D||11||||D||||
| J1.96||ETH_TXRX3_P||LAN.TXRXP_D||10||||D||||
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| J1.98||DGND||DGND||-||-||-||-G||Digital ground
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| J1.100||ETH_TXRX2_M||||||||||||
| J1.102||ETH_TXRX2_P||||||||||||
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| J1.104||DGND||DGND||-||-||-||-G||Digital ground
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| J1.106||CLK125_NDO||LAN.CLK125_NDO||41||||O||1.8V||10kOhm pull-up
| J1.110||RFU||-||-||-||-||-||Reserved fo future use. Must be left floating.
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| J1.112||DGND||DGND||-||-||-||-G||Digital ground
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| J1.114||USBP1||USB.DP||6||||D||||
| J1.116||USBM1||USB.DM||5||||D||||
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| J1.118||DGND||DGND||-||-||-||-G||Digital ground
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| J1.120||SPI0_CS0n||CPU.PS_MIO1_500<br>NOR flash||CPU.A22||Bank 500||I/O||3.3V||
| J1.128||NAND_IO5||CPU.PS_MIO10_500<br>NAND flash||CPU.G16||Bank 500||I/O||3.3V||
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| J1.130||DGND||DGND||-||-||-||-G||Digital ground
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| J1.132||NAND_IO6||CPU.PS_MIO11_500<br>NAND flash||CPU.B19||Bank 500||I/O||3.3V||
| J1.138||NAND_CLE/VCFG0||CPU.PS_MIO7_500<br>NAND flash||CPU.D18||Bank 500||I/O||3.3V||This signal is pulled up or down by 20kOhm resistor to select proper bootstrap configuration.
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| J1.140||DGND||DGND||-||-||-||-G||Digital ground
|}
