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Created page with "{{InfoBoxTop}} {{AppliesToAxelLite}} {{InfoBoxBottom}} == Power Supply Unit (PSU) and recommended power-up sequence [5.1]== Implementing correct power-up sequence for i.MX6 p..."
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{{AppliesToAxelLite}}
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== Power Supply Unit (PSU) and recommended power-up sequence [5.1]==
Implementing correct power-up sequence for i.MX6 processors is not a trivial task because several power rails are involved. Axel Lite SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
[[File:AxelLite-power-sequence.png | 800px]]
The PSU is composed of two main blocks:
* power management integrated circuit (PMIC, Freescale PF0100E0 - on request this part is available in automotive grade)
* additional generic power management circuitry that completes PMIC functionalities.
The PSU:
* generates the proper power-up sequence required by i.MX processor and surrounding memories and peripherals
* synchronizes the powering up of carrier board in order to prevent back power
* provides some spare regulated voltages that can be used to power carrier board devices
=== Power-up sequence===
The typical power-up sequence is the following:
# (optional) PMIC_LICELL is powered
# 3.3VIN main power supply rail is powered
# CPU_PORn (active-low) is driven low
# PMIC activates PMIC_VSNVS power output
# PMIC_PWRON signal is pulled-up (unless carrier board circuitry keeps this signal low for any reason)
# PMIC transitions from OFF to ON state
# PMIC initiates power-up sequence needed by MX6 processor
# BOARD_PGOOD signal is raised; this active-high signal indicates that carrier board circuitry interfacing Axel Lite I/O has to be powered up
# CPU_PORn is released.
=== Power rails and related signals ===
The following list describes in detail the power rails and the power related signals. Please note that PMIC regulators ouput voltages can be changed only if explicitly allowed.
* 3.3VIN: this is external main power rail. Voltage range is 3.3V±5%
* PMIC_CELL: PMIC's coin cell supply input/output
* BOARD_PGOOD: this output signal is used to indicate when carrier board's circuitry interfacing Axel Lite's I/Os has to be powered up.
For further details, please refer to the PMIC documentation: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MMPF0100%7CPF0100
{{AppliesToAxelLite}}
{{InfoBoxBottom}}
== Power Supply Unit (PSU) and recommended power-up sequence [5.1]==
Implementing correct power-up sequence for i.MX6 processors is not a trivial task because several power rails are involved. Axel Lite SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
[[File:AxelLite-power-sequence.png | 800px]]
The PSU is composed of two main blocks:
* power management integrated circuit (PMIC, Freescale PF0100E0 - on request this part is available in automotive grade)
* additional generic power management circuitry that completes PMIC functionalities.
The PSU:
* generates the proper power-up sequence required by i.MX processor and surrounding memories and peripherals
* synchronizes the powering up of carrier board in order to prevent back power
* provides some spare regulated voltages that can be used to power carrier board devices
=== Power-up sequence===
The typical power-up sequence is the following:
# (optional) PMIC_LICELL is powered
# 3.3VIN main power supply rail is powered
# CPU_PORn (active-low) is driven low
# PMIC activates PMIC_VSNVS power output
# PMIC_PWRON signal is pulled-up (unless carrier board circuitry keeps this signal low for any reason)
# PMIC transitions from OFF to ON state
# PMIC initiates power-up sequence needed by MX6 processor
# BOARD_PGOOD signal is raised; this active-high signal indicates that carrier board circuitry interfacing Axel Lite I/O has to be powered up
# CPU_PORn is released.
=== Power rails and related signals ===
The following list describes in detail the power rails and the power related signals. Please note that PMIC regulators ouput voltages can be changed only if explicitly allowed.
* 3.3VIN: this is external main power rail. Voltage range is 3.3V±5%
* PMIC_CELL: PMIC's coin cell supply input/output
* BOARD_PGOOD: this output signal is used to indicate when carrier board's circuitry interfacing Axel Lite's I/Os has to be powered up.
For further details, please refer to the PMIC documentation: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MMPF0100%7CPF0100
