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→Gigabit Ethernet
=== Gigabit Ethernet ===
On-board Ethernet PHY (Micrel KSZ9031RNX) provides interface signals required to implement the 10/100/1000 Mbps Ethernet port. The transceiver is connected to the Gigabit Ethernet Controller (GEM) through RGMII interface on MIO bank 1, pins PS_MIO[16:27].
{| class="wikitable"
|-
!Pin name
!Conn. pin
!Function
!Notes
|-
|ETH_TXRX0_P || J1.105 || Media Dependent Interface[0], positive pin || -
|-
|ETH_TXRX0_M || J1.103 || Media Dependent Interface[0], negative pin || -
|-
|ETH_TXRX1_P || J1.99 || Media Dependent Interface[1], positive pin || -
|-
|ETH_TXRX1_M || J1.97 || Media Dependent Interface[1], negative pin || -
|-
|ETH_TXRX2_P || J1.102 || Media Dependent Interface[2], positive pin || -
|-
|ETH_TXRX2_M || J1.100 || Media Dependent Interface[2], negative pin || -
|-
|ETH_TXRX3_P || J1.96 || Media Dependent Interface[3], positive pin || -
|-
|ETH_TXRX3_M || J1.94 || Media Dependent Interface[3], negative pin || -
|-
|ETH_MDIO || J1.87 || Management Data Input/Output || -
|-
|ETH_MDC || J1.89 || Management Data Clock input || -
|-
|ETH_INTn || J1.91 || Activity LED || -
|-
|ETH_LED2 || J1.93 || Link LED || -
|-
|DVDDH || J1.107 || 1.8V digital VDD_I/O of Ethernet PHY || -
|-
|}
=== USB ===