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Hardware Manual (Bora)

514 bytes added, 15:24, 23 July 2013
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Design Overview
== NOR flash bank ==
NOR flash is a Serial Peripheral Interface (SPI) device. By default this device is connected to SPI channel 0 and acts as boot memory.The following table reports the NOR flash specifications: {| class="wikitable" | |-| '''CPU connection'''||SPI Channel 0|-| '''Size min'''||8 MB |-| '''Size max'''||64 MB |-| '''Bootable'''||Yes|-|}
== NAND flash bank ==
On board main storage memory is a 8-bit wide NAND flash. By default it is connected to chip select.The following table reports the NAND flash specifications: {| class="wikitable" | |-| '''CPU connection'''||Static memory controller |-| '''Page size'''|| 512 byte, 2 kbyte or 4 kbyte|-| '''Size min'''||128 MB |-| '''Size max'''||2 GB |-| '''Width'''||8 bit |-| '''Bootable'''||Yes |-|}  
== Memory map ==

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