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FAQs (Diva)

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=Introduction=
This page collects all the Frequently Asked Question regarding Diva
 
= General =
=== Q: Where can I found Diva SOM information? ===
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= System design =
 
=== Q: Can you suggest some guidelines for the carrier board design? ===
'''A''': As a starting point, you can refer to the Wiki page dedicated to the [[Carrier_board_design_guidelines_%28SOM%29]], that will highlight some best practices that applies to all SOMs. For specific information on Diva, please refer to the Diva Integration Guide [[Integration_guide_%28Diva%29]]
 
=== Q: Where can I found information regarding the PRUs? ===
'''A''': the Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS) consists of dual 32-bit RISC cores (Programmable Real-Time Units, or PRUs), memories, interrupt controller, and internal peripherals that enable additional peripheral interfaces and protocols. The programmable nature of the PRUs, along with their access to pins and events, provide flexibility in implementing custom peripheral interfaces, fast real-time responses, power saving techniques, specialized data handling and DMA operations, and in offloading tasks from the other processor cores of the system-on-chip (SoC). For detailed information, please refer to the following pages:
* http://elinux.org/Ti_AM33XX_PRUSSv2
* http://processors.wiki.ti.com/index.php/Category:PRU
* http://processors.wiki.ti.com/index.php/Programmable_Realtime_Unit
* http://processors.wiki.ti.com/index.php/Programmable_Realtime_Unit_Subsystem
* http://processors.wiki.ti.com/index.php/Programmable_Realtime_Unit_Software_Development
 
= Using DIVELK =
=== Q: I've received the DIVELK package. How am I supposed to start working with it? ===
* has a proper subnet IP address
For detailed information, please refer to [[http://wiki.dave.eu/index.php/Booting_Linux_Kernel#Configuration_net_nfs | Configuration net_nfs]]
 
=== Q: Where can I found information regarding the PRUs? ===
'''A''': the Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS) consists of dual 32-bit RISC cores (Programmable Real-Time Units, or PRUs), memories, interrupt controller, and internal peripherals that enable additional peripheral interfaces and protocols. The programmable nature of the PRUs, along with their access to pins and events, provide flexibility in implementing custom peripheral interfaces, fast real-time responses, power saving techniques, specialized data handling and DMA operations, and in offloading tasks from the other processor cores of the system-on-chip (SoC). For detailed information, please refer to the following pages:
* http://elinux.org/Ti_AM33XX_PRUSSv2
* http://processors.wiki.ti.com/index.php/Category:PRU
* http://processors.wiki.ti.com/index.php/Programmable_Realtime_Unit
* http://processors.wiki.ti.com/index.php/Programmable_Realtime_Unit_Subsystem
* http://processors.wiki.ti.com/index.php/Programmable_Realtime_Unit_Software_Development
 
=== Q: Can you suggest some guidelines for the carrier board design? ===
'''A''': As a starting point, you can refer to the Wiki page dedicated to the [[Carrier_board_design_guidelines_%28SOM%29]], that will highlight some best practices that applies to all SOMs. For specific information on Diva, please refer to the Diva Integration Guide [[Integration_guide_%28Diva%29]]

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