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AURA SOM/AURA Hardware/Pinout Table

61 bytes added, 09:00, 21 December 2023
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" |Pin labels renaming<br>Add pinmux spreadsheet download
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|Pin ALT-1
|FLEXSPI_A_DATA0FLEXSPI1_A_DATA00
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|Pin ALT-4
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|Pin ALT-1
|FLEXSPI_A_DATA1FLEXSPI1_A_DATA01
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|Pin ALT-4
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|Pin ALT-1
|FLEXSPI_A_DATA2FLEXSPI1_A_DATA02
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|Pin ALT-4
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|Pin ALT-1
|FLEXSPI_A_DATA3FLEXSPI1_A_DATA03
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|Pin ALT-4
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|Pin ALT-1
|FLEXSPI_A_SS0_BFLEXSPI1_A_SS0_B
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|Pin ALT-4
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|Pin ALT-1
|FLEXSPI_A_SCLKFLEXSPI1_A_SCLK
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|Pin ALT-4
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|Pin ALT-4
|SAI1.MCLKSAI1_MCLK
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|Pin ALT-5
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|Pin ALT-1
|USHDC2.WPUSHDC2_WP
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|Pin ALT-2
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|Pin ALT-2
|ISI_LINE_VALIDCAM_HSYNC
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|Pin ALT-3
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|Pin ALT-1
|SECO_TXSECO_UART_TX
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|Pin ALT-2
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|Pin ALT-1
|SECO_RXSECO_UART_RX
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|Pin ALT-2
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|Pin ALT-2
|ISI_FRAME_VALIDCAM_VSYNC
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|Pin ALT-3
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|Pin ALT-5
|GPIO1.IO09GPIO1_IO09
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|Pin ALT-6
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|Pin ALT-5
|GPIO1.IO08GPIO1_IO08
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|Pin ALT-6
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|Pin ALT-5
|GPIO1.IO10GPIO1_IO10
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| rowspan="2" |J1.28
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|Pin ALT-5
|GPIO1.IO15GPIO1_IO15
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|J1.30
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|Pin ALT-1
|SAI3_TX_DATA[0]SAI3_TX_DATA00
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|Pin ALT-2
|PDM.CLKPDM_CLK
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|Pin ALT-3
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|Pin ALT-5
|DAP.TCLK_SWCLKJTAG_MUX_TCK
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|Pin ALT-6
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|Pin ALT-5
|DAP.TMS_SWDIOJTAG_MUX_TMS
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|Pin ALT-6
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|Pin ALT-5
|DAP.TDO_TRACESWOJTAG_MUX_TDO
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|Pin ALT-6
| rowspan="3" |
|Pin ALT-0
|CCMSRCGPCMIX.CLK01CCMSRCGPCMIX_CLK01
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|Pin ALT-4
| rowspan="3" |
|Pin ALT-0
|CCMSRCGPCMIX.CLK02CCMSRCGPCMIX_CLK02
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|Pin ALT-4
| rowspan="3" |
|Pin ALT-0
|CCMSRCGPCMIX.CLK01CCMSRCGPCMIX_CLK01
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|Pin ALT-4
| rowspan="6" |
|Pin ALT-0
|SAI1_RX_DATA[0]SAI1_RX_DATA00
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|Pin ALT-1
|SAI1.MCLKSAI1_MCLK
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|Pin ALT-2
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|Pin ALT-5
|GPIO1.IO14GPIO1_IO14
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| rowspan="3" |J1.64
| rowspan="3" |
|Pin ALT-0
|CCMSRCGPCMIX.CLK04CCMSRCGPCMIX_CLK04
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|Pin ALT-4
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|Pin ALT-7
|SAI3_TX_DATA[0]SAI3_TX_DATA00
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| rowspan="8" |J1.70
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|Pin ALT-5
|DAP-TDIJTAG_MUX_TDI
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|Pin ALT-6
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|Pin ALT-1
|SAI3_RX_DATA[0]SAI3_RX_DATA00
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|Pin ALT-2
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|Pin ALT-2
|PDM.CLKPDM_CLK
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|Pin ALT-3
| rowspan="6" |
|Pin ALT-0
|DAP.TDIJTAG_MUX_TDI
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|Pin ALT-1
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|Pin ALT-5
|GPIO3.IO28GPIO3_IO28
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|Pin ALT-6
| rowspan="4" |
|Pin ALT-0
|DAP.TMS_SWDIOJTAG_MUX_TMS
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|Pin ALT-4
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|Pin ALT-5
|GPIO3.IO29GPIO3_IO29
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|Pin ALT-6
| rowspan="4" |
|Pin ALT-0
|DAP.TCLK_SWCLKJTAG_MUX_TCK
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|Pin ALT-4
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|Pin ALT-5
|GPIO3.IO30GPIO3_IO30
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|Pin ALT-6
| rowspan="6" |
|Pin ALT-0
|DAP.TDO_TRACESWOJTAG_MUX_TDO
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|Pin ALT-1
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|Pin ALT-5
|GPIO3.IO31GPIO3_IO31
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|Pin ALT-6
| rowspan="6" |
|Pin ALT-0
|ENET_QOS.MDCENET_QOS_MDC
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|Pin ALT-1
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|Pin ALT-3
|USB1.OTG_IDUSB1_OTG_ID
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|Pin ALT-4
| rowspan="6" |
|Pin ALT-0
|ENET_QOS.MDIOENET_QOS_MDIO
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|Pin ALT-1
|-
|Pin ALT-3
|USB1.OTG_PWRUSB1_OTG_PWR
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|Pin ALT-4
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|Pin ALT-1
|FLEXSPI_A_DQSFLEXSPI1_A_DQS
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|Pin ALT-4
|Pin ALT-0
|USDHC1_DATA3
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|Pin ALT-1
|FLEXSPI1_A_SS1_B
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|Pin ALT-4
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|Pin ALT-1
|FLEXSPI_A_DATA4FLEXSPI1_A_DATA04
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|Pin ALT-4
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|Pin ALT-1
|FLEXSPI_A_DATA5FLEXSPI1_A_DATA05
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|Pin ALT-4
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|Pin ALT-1
|FLEXSPI_A_DATA6FLEXSPI1_A_DATA06
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|Pin ALT-4
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|Pin ALT-1
|FLEXSPI_A_DATA7FLEXSPI1_A_DATA07
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|Pin ALT-4
| rowspan="4" |
|Pin ALT-0
|ENET2.RGMII_TD3ENET1_RGMII_TD3
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|Pin ALT-2
|SAI2_RX_DATA[0]SAI2_RX_DATA00
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|Pin ALT-4
| rowspan="5" |
|Pin ALT-0
|ENET2.RGMII_TD2ENET1_RGMII_TD2
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|Pin ALT-1
|ENET2.TX_CLK ENET1_TX_CLK // CCMSRCGPMCMIX.ENET_REF_CLK_ROOT
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|Pin ALT-2
|SAI2_RX_DATA[1]SAI2_RX_DATA01
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|Pin ALT-4
| rowspan="5" |
|Pin ALT-0
|ENET2.RGMII_TD1ENET1_RGMII_TD1
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|Pin ALT-1
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|Pin ALT-2
|SAI2_RX_DATA[2]SAI2_RX_DATA02
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|Pin ALT-4
| rowspan="5" |
|Pin ALT-0
|ENET2.RGMII_TD0ENET1_RGMII_TD0
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|Pin ALT-1
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|Pin ALT-2
|SAI2_RX_DATA[3]SAI2_RX_DATA03
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|Pin ALT-4
| rowspan="5" |
|Pin ALT-0
|ENET2.RGMI_TXCENET1_RGMI_TXC
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|Pin ALT-1
|ENET2.TX_ERENET1_TX_ER
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|Pin ALT-2
| rowspan="5" |
|Pin ALT-0
|ENET2.RGMI_TX_CTLENET1_RGMI_TX_CTL
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|Pin ALT-1
| rowspan="5" |
|Pin ALT-0
|ENET2.MDCENET1_MDC
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|Pin ALT-1
| rowspan="5" |
|Pin ALT-0
|ENET2.MDIOENET1_MDIO
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|Pin ALT-1
| rowspan="5" |
|Pin ALT-0
|ENET2.RGMII_RX_CTLENET1_RGMII_RX_CTL
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|Pin ALT-1
| rowspan="5" |
|Pin ALT-0
|ENET2.RGMII_RD0ENET1_RGMII_RD0
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|Pin ALT-1
| rowspan="5" |
|Pin ALT-0
|ENET2.RGMII_RD1ENET1_RGMII_RD1
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|Pin ALT-1
| rowspan="6" |
|Pin ALT-0
|ENET2.RGMII_RD1ENET1_RGMII_RD1
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|Pin ALT-1
| rowspan="6" |
|Pin ALT-0
|ENET2.RGMII_RD3ENET1_RGMII_RD3
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|Pin ALT-1
| rowspan="5" |
|Pin ALT-0
|ENET2.RGMII_RXCENET1_RGMII_RXC
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|Pin ALT-1
|ENET2.RX_ERENET1_RX_ER
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|Pin ALT-2
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