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Carrier board design guidelines (SOM)

37 bytes removed, 10:01, 23 October 2012
PCB
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| TX and RX via mismatch||0||0||1
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| Max PCB trace length ||-||-||3"
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|}
* Keep as best as possibile the same route for TX and RX traces
* If less than minimum gap is used, use a GND trace for improve trace separation
 
==== Case #2: PHY is not integrated on SOM and a RGMII PHY is used ====
This section refers to the case of:

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