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Created page with "{{InfoBoxTop}} {{Applies To Bora}} {{Applies To BoraX}} {{Applies To BoraLite}} {{InfoBoxBottom}} = Introduction = This page provides the information about the PL initializa..."
{{InfoBoxTop}}
{{Applies To Bora}}
{{Applies To BoraX}}
{{Applies To BoraLite}}
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= Introduction =
This page provides the information about the PL initialization signals: PROGRAM_B, INIT_B, DONE
= PL Logic =
Please refer to [https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf#page=218 Zynq Technical Reference Manual UG-585] for more information about usage and configuration of initialization circuit and signals.
As written in UG-585 ''the Table 6-24: PL Initialization Signals'', the user can initialize the PL using the signals.
BORA, BORAX and BORALite SOM are configured in the following way:
* PROGRAM_B has an internal 10Kohm pull-up as indicated on Xilinx [https://www.xilinx.com/support/answers/56272.html AR#56272]
* INIT_B is directly connected to SOM connector
* DONE does not require and external pull-up or pull-down but can be used for connecting a user led for a configuration completed indication (see for example [https://mirror.dave.eu/bora/hw/BoraXEVB/S-EVBBX0000C0R-1.6.1_color.pdf#page=4 BoraXEVB schematics])
= External pull-ups =
* PROGRAM_B: for as stronger pull-up, as indicated in the UG-585, it is possible to pull-up it using a 3V3 controlled power domain
* INIT_B: for using this signal as ''PL initializing signal Low-to-High transition'', place an external pull-up to a 3V3 controlled power domain
== 3V3 on Carrier board ==
'''Attention''': the 3V3 Carrier power domain, has to be driven and controlled via BOARD_PGOOD signal as indicated on [[Power_(Bora/BoraLite)| Power page]]
A controlled switch can be placed in the Carrier board following the schematics example here below:
[[File:BORA_BOARD_PGOOD_3V3.png|center|thumb|3V3 controlled via BOARD_PGOOD]]
{{Applies To Bora}}
{{Applies To BoraX}}
{{Applies To BoraLite}}
{{InfoBoxBottom}}
= Introduction =
This page provides the information about the PL initialization signals: PROGRAM_B, INIT_B, DONE
= PL Logic =
Please refer to [https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf#page=218 Zynq Technical Reference Manual UG-585] for more information about usage and configuration of initialization circuit and signals.
As written in UG-585 ''the Table 6-24: PL Initialization Signals'', the user can initialize the PL using the signals.
BORA, BORAX and BORALite SOM are configured in the following way:
* PROGRAM_B has an internal 10Kohm pull-up as indicated on Xilinx [https://www.xilinx.com/support/answers/56272.html AR#56272]
* INIT_B is directly connected to SOM connector
* DONE does not require and external pull-up or pull-down but can be used for connecting a user led for a configuration completed indication (see for example [https://mirror.dave.eu/bora/hw/BoraXEVB/S-EVBBX0000C0R-1.6.1_color.pdf#page=4 BoraXEVB schematics])
= External pull-ups =
* PROGRAM_B: for as stronger pull-up, as indicated in the UG-585, it is possible to pull-up it using a 3V3 controlled power domain
* INIT_B: for using this signal as ''PL initializing signal Low-to-High transition'', place an external pull-up to a 3V3 controlled power domain
== 3V3 on Carrier board ==
'''Attention''': the 3V3 Carrier power domain, has to be driven and controlled via BOARD_PGOOD signal as indicated on [[Power_(Bora/BoraLite)| Power page]]
A controlled switch can be placed in the Carrier board following the schematics example here below:
[[File:BORA_BOARD_PGOOD_3V3.png|center|thumb|3V3 controlled via BOARD_PGOOD]]