Bureaucrats, dave_user, Administrators
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Created page with "<section begin=History/> {| style="border-collapse:collapse; " ! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History |- ! style="borde..."
<section begin=History/>
{| style="border-collapse:collapse; "
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
|-
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Version
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |1.0.0
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Dec 2020
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | First version
|}
<section end=History/>
__FORCETOC__
<section begin=Body/>
==Part number composition==
BORA SOM module part number is identified by the following digit-code table:
{|class="wikitable" style="width:50%"
!style="width:10%"|Part number structure
!style="width:40%"|Options
!style="width:20%"|Description
|-
!SOC
|
* A: XC7Z010 ARM Cortex-A9 667MHz - Speed grade ''-1''
* B: XC7Z010 ARM Cortex-A9 766MHz - Speed grade ''-2''
* C: XC7Z010 ARM Cortex-A9 866MHz - Speed grade ''-3''
* D: XC7Z020 ARM Cortex-A9 667MHz - Speed grade ''-1''
* E: XC7Z020 ARM Cortex-A9 766MHz - Speed grade ''-2''
* F: XC7Z020 ARM Cortex-A9 866MHz - Speed grade ''-3''
* I: XC7Z014S ARM Cortex-A9 766MHz - Speed grade ''-2''
|System on chip definition (and FPGA speed grade)
|-
!NOR SPI
|
* 0: 0MB
* 4: 16MB
|QUAD SPI NOR flash memory size
|-
!RAM
|
* 1: 1GB
* 9: 512MB
|DDR3 Memory RAM size
|-
!NAND
|
* 0: 0MB
* 1: 1GB NAND SLC
* 7: 128MB NAND SLC
* 8: 256MB NAND SLC
* 9: 512MB NAND SLC
|Flash memory NAND size
|-
!Boot/Misc
|
* 0: NOR boot, FPGA 34 fixed PSU, no Voltage Monitor
* 1: NOR boot, FPGA 34 variable PSU, no Voltage Monitor
* 2: NOR boot, FPGA 34 fixed PSU, Voltage Monitor
* 3: NOR boot, FPGA 34 variable PSU, Voltage Monitor
|Boot and Voltage Monitor options
|-
!Temperature range
|
* C - Commercial grade: suitable for 0/70°C environment
* I - Industrial grade: suitable for -40/85°C environment
* S - Super Commercial grade: suitable for 0/85°C environment
* Q - Military Grade: -40-125°C
|
|-
!PCB revision
|
* 0: first version
* 1: revision B
* 2: revision C
* 3: revision D - SnPb version
|PCB release may change for manufacturing purposes (i.e. text fixture adaptation)
|-
!Manufacturing option
|
* R: RoHS compliant
* D: No RoHS, conformal coating, sealing
* P: SnPb process, sealing, acrylic coating
|typically connected to production process and quality
|-
!Software Configuration
| -00: standard factory u-boot pre-programmed
-XX: custom version
|If customers require custom SW deployed this section should be defined and agreed. Please contact [https://www.dave.eu/helpdesk technical support]
|}
=== Example ===
BORA SOM code '''DBRF4110C2R-00'''
* DBR - BORA SOM module
* F - XC7Z020 ARM Cortex-A9 866MHz - Speed grade ''-3''
* 4 - 16MB NOR Flash
* 1 - 1GB DDR3
* 1 - 1GB NAND flash
* 0 - NOR boot, FPGA bank 34 fixed PSU, without Voltage monitor
* C - Commercial temperature range
* 2 - PCB revision C
* R- RoHS manufacturing process
* -00 - standard u-boot pre-programmed
----
[[Category:BORA]]
{| style="border-collapse:collapse; "
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
|-
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Version
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |1.0.0
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Dec 2020
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | First version
|}
<section end=History/>
__FORCETOC__
<section begin=Body/>
==Part number composition==
BORA SOM module part number is identified by the following digit-code table:
{|class="wikitable" style="width:50%"
!style="width:10%"|Part number structure
!style="width:40%"|Options
!style="width:20%"|Description
|-
!SOC
|
* A: XC7Z010 ARM Cortex-A9 667MHz - Speed grade ''-1''
* B: XC7Z010 ARM Cortex-A9 766MHz - Speed grade ''-2''
* C: XC7Z010 ARM Cortex-A9 866MHz - Speed grade ''-3''
* D: XC7Z020 ARM Cortex-A9 667MHz - Speed grade ''-1''
* E: XC7Z020 ARM Cortex-A9 766MHz - Speed grade ''-2''
* F: XC7Z020 ARM Cortex-A9 866MHz - Speed grade ''-3''
* I: XC7Z014S ARM Cortex-A9 766MHz - Speed grade ''-2''
|System on chip definition (and FPGA speed grade)
|-
!NOR SPI
|
* 0: 0MB
* 4: 16MB
|QUAD SPI NOR flash memory size
|-
!RAM
|
* 1: 1GB
* 9: 512MB
|DDR3 Memory RAM size
|-
!NAND
|
* 0: 0MB
* 1: 1GB NAND SLC
* 7: 128MB NAND SLC
* 8: 256MB NAND SLC
* 9: 512MB NAND SLC
|Flash memory NAND size
|-
!Boot/Misc
|
* 0: NOR boot, FPGA 34 fixed PSU, no Voltage Monitor
* 1: NOR boot, FPGA 34 variable PSU, no Voltage Monitor
* 2: NOR boot, FPGA 34 fixed PSU, Voltage Monitor
* 3: NOR boot, FPGA 34 variable PSU, Voltage Monitor
|Boot and Voltage Monitor options
|-
!Temperature range
|
* C - Commercial grade: suitable for 0/70°C environment
* I - Industrial grade: suitable for -40/85°C environment
* S - Super Commercial grade: suitable for 0/85°C environment
* Q - Military Grade: -40-125°C
|
|-
!PCB revision
|
* 0: first version
* 1: revision B
* 2: revision C
* 3: revision D - SnPb version
|PCB release may change for manufacturing purposes (i.e. text fixture adaptation)
|-
!Manufacturing option
|
* R: RoHS compliant
* D: No RoHS, conformal coating, sealing
* P: SnPb process, sealing, acrylic coating
|typically connected to production process and quality
|-
!Software Configuration
| -00: standard factory u-boot pre-programmed
-XX: custom version
|If customers require custom SW deployed this section should be defined and agreed. Please contact [https://www.dave.eu/helpdesk technical support]
|}
=== Example ===
BORA SOM code '''DBRF4110C2R-00'''
* DBR - BORA SOM module
* F - XC7Z020 ARM Cortex-A9 866MHz - Speed grade ''-3''
* 4 - 16MB NOR Flash
* 1 - 1GB DDR3
* 1 - 1GB NAND flash
* 0 - NOR boot, FPGA bank 34 fixed PSU, without Voltage monitor
* C - Commercial temperature range
* 2 - PCB revision C
* R- RoHS manufacturing process
* -00 - standard u-boot pre-programmed
----
[[Category:BORA]]
