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Created page with "{{InfoBoxTop}} {{AppliesToNaon}} {{InfoBoxBottom}} {{WorkInProgress}} ==J1 odd pins (1 to 139)== {| class="wikitable" {{table}} | align="center" style="background:#f0f0f0;"|'..."
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{{AppliesToNaon}}
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{{WorkInProgress}}
==J1 odd pins (1 to 139)==
{| class="wikitable" {{table}}
| align="center" style="background:#f0f0f0;"|'''Pin'''
| align="center" style="background:#f0f0f0;"|'''Pin Name'''
| align="center" style="background:#f0f0f0;"|'''Internal Connections'''
| align="center" style="background:#f0f0f0;"|'''"Ball/'''
|-
| pin #"||Supply Group||Type||Voltage||Note
|-
| J1.1||DGND||DGND||-||||G||||
|-
| J1.3||DGND||DGND||-||||G||||
|-
| J1.5||USB0_DM||CPU.USB0_DM||AH11||||A, I/O||||
|-
| J1.7||UART0_RXD||CPU.UART0_RXD||AH5||||I||||
|-
| J1.9||VBAT||PMIC.VBACKUP||D7||||S||||
|-
| J1.11||MDIO_MDCLK||CPU.MDCLK/GP1[11]||H28||||I/O||||Module mount option
|-
| ||UART4_RXD/GP3_1||CPU.VOUT[1]_B_CB_C[4]/EMAC[1]_MRXD[0]/VIN[1]A_D[1]/UART4_RXD/GP3[1]||AG25||||I/O||||
|-
| J1.13||ADC_GND||DGND||-||||G||||
|-
| J1.15||ADC0_IN||TSC.IN1||16||||A||||
|-
| J1.17||USB0_ID||CPU.USB0_ID||AG10||||A I||||
|-
| J1.19||UART0_RTSn/DCAN1_RX||CPU.UART0_RTSn/UART4_TXD/DCAN1_RX/SPI[1]_SCS[2]n/SD2_SDCD||AF5||||I/O||||
|-
| J1.21||UART0_CTSn/DCAN1_TX||CPU.UART0_RTSn/UART4_RXD/DCAN1_TX/SPI[1]_SCS[3]n/SD0_SDCD||AE6||||I/O||||
|-
| J1.23||VIN0A_D16/CAM_D8||CPU.VIN[0]A_D[16]/CAM_D[8]/I2C[2]_SCL/GP0[10]||AA21||||I/O||||
|-
| J1.25||VIN0A_D17/CAM_D9||CPU.VIN[0]A_D[17]/CAM_D[9]/EMAC[1]_RMRXER/GP0[11]||AB21||||I/O||||
|-
| J1.27||VIN0A_D18/CAM_D10||CPU.VIN[0]A_D[18]/CAM_D[10]/EMAC[1]_RMRXD[1]/I2C3[3]_SCL/GP0[12]||AF20||||I/O||||
|-
| J1.29||VIN0A_D19/CAM_D11||CPU.VIN[0]A_D[19]/CAM_D[11]/EMAC[1]_RMRXD[0]/I2C3[3]_SDA/GP0[13]||AF21||||I/O||||
|-
| J1.31||VIN0A_D20/CAM_D12||CPU.VIN[0]A_D[20]/CAM_D[12]/EMAC[1]_RMCRSDV/SPI[3]_SCS[0]n/GP0[14]||AC17||||I/O||||
|-
| J1.33||VIN0A_D21/CAM_D13||CPU.VIN[0]A_D[21]/CAM_D[13]/EMAC[1]_RMTXD[0]/SPI[3]_SCLK/GP0[15]||AE18||||I/O||||
|-
| J1.35||DGND||DGND||-||||G||||
|-
| J1.37||SPI1_D0/GP1_26||CPU.SPI[1]_D[0]/GP1[26]||AA6||||I/O||||
|-
| J1.39||TSC_XP||TSC.X+||2||||I||||Please consider the use of ESD protection devices on carrier board when these pins are connected to actual touch screen.
|-
| J1.41||TSC_XM||TSC.X-||4||||I||||
|-
| J1.43||TSC_YP||TSC.Y+||3||||I||||
|-
| J1.45||TSC_YM||TSC.Y-||5||||I||||
|-
| J1.47||VOUT0_R_CR9||CPU.VOUT[0]_R_CR[9]||AC13||||O||||"RGB mode: red
|-
| YUV444 mode: Cr"
|-
| J1.49||VOUT0_R_CR7||CPU.VOUT[0]_R_CR[7]||AF12||||O||||"RGB mode: red
|-
| YUV444 mode: Cr"
|-
| J1.51||VOUT0_R_CR5||CPU.VOUT[0]_R_CR[5]||AF8||||O||||"RGB mode: red
|-
| YUV444 mode: Cr"
|-
| J1.53||VOUT0_G_Y_YC9||CPU.VOUT[0]_G_Y_YC[9]||AF14||||O||||"RGB mode: green
|-
| YUV444 mode: Y
|-
| Y/C mode: Y"
|-
| J1.55||VOUT0_G_Y_YC7||CPU.VOUT[0]_G_Y_YC[7]||AD14||||O||||"RGB mode: green
|-
| YUV444 mode: Y
|-
| Y/C mode: Y"
|-
| J1.57||VOUT0_G_Y_YC5||CPU.VOUT[0]_G_Y_YC[5]||AB12||||O||||"RGB mode: green
|-
| YUV444 mode: Y
|-
| Y/C mode: Y"
|-
| J1.59||VOUT0_B_CB_C9||CPU.VOUT[0]_B_CB_C[9]||AG15||||O||||"RGB mode: blue
|-
| YUV444 mode: Cb
|-
| Y/C mode: muxed Cb/Cr"
|-
| J1.61||VOUT0_B_CB_C7||CPU.VOUT[0]_B_CB_C[7]||AB10||||O||||"RGB mode: blue
|-
| YUV444 mode: Cb
|-
| Y/C mode: muxed Cb/Cr"
|-
| J1.63||DGND||DGND||-||||G||||
|-
| J1.65||VOUT0_B_CB_C5||CPU.VOUT[0]_B_CB_C[5]||AD15||||O||||"RGB mode: blue
|-
| YUV444 mode: Cb
|-
| Y/C mode: muxed Cb/Cr"
|-
| J1.67||TIM2_IO/GP0_8||CPU.AUD_CLKIN1/MCA[0]_AXR[8]/MCA[1]_AHCLKX/MCA[4]_AHCLKX/ATL_CLKOUT2/EDMA_EVT3/TIM2_IO/GP0[8]||R5||||I/O||||
|-
| J1.69||VOUT0_VSYNC||CPU.VOUT[0]_VSYNC||AB13||||O||||
|-
| J1.71||VOUT0_CLK||CPU.VOUT[0]_CLK||AD12||||O||||
|-
| J1.73||KP_ROW1||KEY.ROW1||24||||I||||
|-
| J1.75||KP_ROW3||KEY.ROW3||2||||I||||
|-
| J1.77||EMAC1_RGMII_TXD2||CPU.EMAC[0]_MTXD[4]/EMAC[1]_RMRXER/GPMC_A[11]/UART4_RTSn||G23||||I/O||||Module mount option
|-
| ||KP_ROW7||KEY.ROW7||8||||I||||
|-
| J1.79||EMAC1_RGMII_TXD1||CPU.EMAC[0]_MTXD[1]/GPMC_A[8]/UART4_RXD||H25||||I/O||||Module mount option
|-
| ||KP_COL4||KEY.COL4||4||||I||||
|-
| J1.81||KP_COL1||KEY.COL1||12||||I||||
|-
| J1.83||KP_COL3||KEY.COL3||3||||I||||
|-
| J1.85||EMAC1_RGMII_TXD0||CPU.EMAC[0]_MTXD[3]/EMAC[1]_RMRXD[1]/GPMC_A[10]/UART4_CTSn||H23||||I/O||||Module mount option
|-
| ||KP_COL6||KEY.COL6||9||||I||||
|-
| J1.87||EMAC1_RGMII_TXC||CPU.EMAC[0]_MTXD[5]/EMAC[1]_RMCRSDV/GPMC_A[12]/UART1_RXD||F27||||I/O||||Module mount option
|-
| ||SPI1_SCS0N/GP1_16||CPU.SPI[1]_SCS[0]n/GP1[16]||AD3||||I/O||||
|-
| J1.89||DGND||DGND||||||G||||
|-
| J1.91||EMAC_REFCLK||CPU.EMAC_RMREFCLK/TIM2_IO/GP1[10]||J27||||I/O||||
|-
| J1.93||USB0_DRVVBUS||CPU.USB0_DRVVBUS/GP0[7]||AF11||||I/O||||
|-
| J1.95||USB1.VBUS||CPU.USB1_VBUSIN||AG14||||A, I||||
|-
| J1.97||HDMI_DP2||CPU.HDMI_DP2||AG21||||O||||
|-
| J1.99||HDMI_DN2||CPU.HDMI_DN2||AH21||||O||||
|-
| J1.101||HDMI_DP1||CPU.HDMI_DP1||AG20||||O||||
|-
| J1.103||HDMI_DN1||CPU.HDMI_DN1||AH20||||O||||
|-
| J1.105||HDMI_DP0||CPU.HDMI_DP0||AG19||||O||||
|-
| J1.107||HDMI_DN0||CPU.HDMI_DN0||AH19||||O||||
|-
| J1.109||HDMI_CLKP||CPU.HDMI_CLKP||AG18||||O||||
|-
| J1.111||HDMI_CLKN||CPU.HDMI_CLKN||AH18||||O||||
|-
| J1.113||DGND||DGND||||||G||||
|-
| J1.115||TIM5_IO/GP0_19||CPU.MCA[3]_AXR[1]/TSI[0]_PACVAL/TIM5_IO/GP0[19]||G2||||I/O||||
|-
| J1.117||VIN1A_HSYNC/GP2_28||CPU.VOUT[1]_CLK/EMAC[1]_MTCLK/VIN[1]A_HSYNC/PATA_HDDIR/GP2[28]||AE24||||I/O||||
|-
| J1.119||SD1_DAT0||CPU.SD1_DAT[0]||P1||||I/O||||
|-
| J1.121||SD1_DAT1||CPU.SD1_DAT[1]_SDIRQn||P5||||I/O||||
|-
| J1.123||SD1_DAT2||CPU.SD1_DAT[2]_SDRWn||P4||||I/O||||
|-
| J1.125||SD1_DAT3||CPU.SD1_DAT[3]||P6||||I/O||||
|-
| J1.127||SD1_DAT4||CPU.SD0_DAT[0]/SD1_DAT[4]/SC1_DATA/GP0[3]||R7||||I/O||||
|-
| J1.129||SD1_DAT5||CPU.SD0_DAT[1]_SDIRQn/SD1_DAT[5]/SC1_CLK/GP0[4]||Y5||||I/O||||
|-
| J1.131||TV_OUT1||CPU.TV_OUT0||AH24||||O||||
|-
| J1.133||TV_OUT2||CPU.TV_OUT1||AH22||||O||||
|-
| J1.135||SD1_CMD||CPU.SD1_CMD/GP0[0]||P2||||I/O||||
|-
| J1.137||SD1_CLK||CPU.SD1_CLK||P3||||O||||
|-
| J1.139||DGND||DGND||-||||G||||
|-
|
|}
==J1 even pins (2 to 140)==
==J2 odd pins (1 to 139)==
==J2 odd pins (1 to 139)==
==Legend and additional notes==
(1) Some pins provide multiple routing options. This means that
{{AppliesToNaon}}
{{InfoBoxBottom}}
{{WorkInProgress}}
==J1 odd pins (1 to 139)==
{| class="wikitable" {{table}}
| align="center" style="background:#f0f0f0;"|'''Pin'''
| align="center" style="background:#f0f0f0;"|'''Pin Name'''
| align="center" style="background:#f0f0f0;"|'''Internal Connections'''
| align="center" style="background:#f0f0f0;"|'''"Ball/'''
|-
| pin #"||Supply Group||Type||Voltage||Note
|-
| J1.1||DGND||DGND||-||||G||||
|-
| J1.3||DGND||DGND||-||||G||||
|-
| J1.5||USB0_DM||CPU.USB0_DM||AH11||||A, I/O||||
|-
| J1.7||UART0_RXD||CPU.UART0_RXD||AH5||||I||||
|-
| J1.9||VBAT||PMIC.VBACKUP||D7||||S||||
|-
| J1.11||MDIO_MDCLK||CPU.MDCLK/GP1[11]||H28||||I/O||||Module mount option
|-
| ||UART4_RXD/GP3_1||CPU.VOUT[1]_B_CB_C[4]/EMAC[1]_MRXD[0]/VIN[1]A_D[1]/UART4_RXD/GP3[1]||AG25||||I/O||||
|-
| J1.13||ADC_GND||DGND||-||||G||||
|-
| J1.15||ADC0_IN||TSC.IN1||16||||A||||
|-
| J1.17||USB0_ID||CPU.USB0_ID||AG10||||A I||||
|-
| J1.19||UART0_RTSn/DCAN1_RX||CPU.UART0_RTSn/UART4_TXD/DCAN1_RX/SPI[1]_SCS[2]n/SD2_SDCD||AF5||||I/O||||
|-
| J1.21||UART0_CTSn/DCAN1_TX||CPU.UART0_RTSn/UART4_RXD/DCAN1_TX/SPI[1]_SCS[3]n/SD0_SDCD||AE6||||I/O||||
|-
| J1.23||VIN0A_D16/CAM_D8||CPU.VIN[0]A_D[16]/CAM_D[8]/I2C[2]_SCL/GP0[10]||AA21||||I/O||||
|-
| J1.25||VIN0A_D17/CAM_D9||CPU.VIN[0]A_D[17]/CAM_D[9]/EMAC[1]_RMRXER/GP0[11]||AB21||||I/O||||
|-
| J1.27||VIN0A_D18/CAM_D10||CPU.VIN[0]A_D[18]/CAM_D[10]/EMAC[1]_RMRXD[1]/I2C3[3]_SCL/GP0[12]||AF20||||I/O||||
|-
| J1.29||VIN0A_D19/CAM_D11||CPU.VIN[0]A_D[19]/CAM_D[11]/EMAC[1]_RMRXD[0]/I2C3[3]_SDA/GP0[13]||AF21||||I/O||||
|-
| J1.31||VIN0A_D20/CAM_D12||CPU.VIN[0]A_D[20]/CAM_D[12]/EMAC[1]_RMCRSDV/SPI[3]_SCS[0]n/GP0[14]||AC17||||I/O||||
|-
| J1.33||VIN0A_D21/CAM_D13||CPU.VIN[0]A_D[21]/CAM_D[13]/EMAC[1]_RMTXD[0]/SPI[3]_SCLK/GP0[15]||AE18||||I/O||||
|-
| J1.35||DGND||DGND||-||||G||||
|-
| J1.37||SPI1_D0/GP1_26||CPU.SPI[1]_D[0]/GP1[26]||AA6||||I/O||||
|-
| J1.39||TSC_XP||TSC.X+||2||||I||||Please consider the use of ESD protection devices on carrier board when these pins are connected to actual touch screen.
|-
| J1.41||TSC_XM||TSC.X-||4||||I||||
|-
| J1.43||TSC_YP||TSC.Y+||3||||I||||
|-
| J1.45||TSC_YM||TSC.Y-||5||||I||||
|-
| J1.47||VOUT0_R_CR9||CPU.VOUT[0]_R_CR[9]||AC13||||O||||"RGB mode: red
|-
| YUV444 mode: Cr"
|-
| J1.49||VOUT0_R_CR7||CPU.VOUT[0]_R_CR[7]||AF12||||O||||"RGB mode: red
|-
| YUV444 mode: Cr"
|-
| J1.51||VOUT0_R_CR5||CPU.VOUT[0]_R_CR[5]||AF8||||O||||"RGB mode: red
|-
| YUV444 mode: Cr"
|-
| J1.53||VOUT0_G_Y_YC9||CPU.VOUT[0]_G_Y_YC[9]||AF14||||O||||"RGB mode: green
|-
| YUV444 mode: Y
|-
| Y/C mode: Y"
|-
| J1.55||VOUT0_G_Y_YC7||CPU.VOUT[0]_G_Y_YC[7]||AD14||||O||||"RGB mode: green
|-
| YUV444 mode: Y
|-
| Y/C mode: Y"
|-
| J1.57||VOUT0_G_Y_YC5||CPU.VOUT[0]_G_Y_YC[5]||AB12||||O||||"RGB mode: green
|-
| YUV444 mode: Y
|-
| Y/C mode: Y"
|-
| J1.59||VOUT0_B_CB_C9||CPU.VOUT[0]_B_CB_C[9]||AG15||||O||||"RGB mode: blue
|-
| YUV444 mode: Cb
|-
| Y/C mode: muxed Cb/Cr"
|-
| J1.61||VOUT0_B_CB_C7||CPU.VOUT[0]_B_CB_C[7]||AB10||||O||||"RGB mode: blue
|-
| YUV444 mode: Cb
|-
| Y/C mode: muxed Cb/Cr"
|-
| J1.63||DGND||DGND||-||||G||||
|-
| J1.65||VOUT0_B_CB_C5||CPU.VOUT[0]_B_CB_C[5]||AD15||||O||||"RGB mode: blue
|-
| YUV444 mode: Cb
|-
| Y/C mode: muxed Cb/Cr"
|-
| J1.67||TIM2_IO/GP0_8||CPU.AUD_CLKIN1/MCA[0]_AXR[8]/MCA[1]_AHCLKX/MCA[4]_AHCLKX/ATL_CLKOUT2/EDMA_EVT3/TIM2_IO/GP0[8]||R5||||I/O||||
|-
| J1.69||VOUT0_VSYNC||CPU.VOUT[0]_VSYNC||AB13||||O||||
|-
| J1.71||VOUT0_CLK||CPU.VOUT[0]_CLK||AD12||||O||||
|-
| J1.73||KP_ROW1||KEY.ROW1||24||||I||||
|-
| J1.75||KP_ROW3||KEY.ROW3||2||||I||||
|-
| J1.77||EMAC1_RGMII_TXD2||CPU.EMAC[0]_MTXD[4]/EMAC[1]_RMRXER/GPMC_A[11]/UART4_RTSn||G23||||I/O||||Module mount option
|-
| ||KP_ROW7||KEY.ROW7||8||||I||||
|-
| J1.79||EMAC1_RGMII_TXD1||CPU.EMAC[0]_MTXD[1]/GPMC_A[8]/UART4_RXD||H25||||I/O||||Module mount option
|-
| ||KP_COL4||KEY.COL4||4||||I||||
|-
| J1.81||KP_COL1||KEY.COL1||12||||I||||
|-
| J1.83||KP_COL3||KEY.COL3||3||||I||||
|-
| J1.85||EMAC1_RGMII_TXD0||CPU.EMAC[0]_MTXD[3]/EMAC[1]_RMRXD[1]/GPMC_A[10]/UART4_CTSn||H23||||I/O||||Module mount option
|-
| ||KP_COL6||KEY.COL6||9||||I||||
|-
| J1.87||EMAC1_RGMII_TXC||CPU.EMAC[0]_MTXD[5]/EMAC[1]_RMCRSDV/GPMC_A[12]/UART1_RXD||F27||||I/O||||Module mount option
|-
| ||SPI1_SCS0N/GP1_16||CPU.SPI[1]_SCS[0]n/GP1[16]||AD3||||I/O||||
|-
| J1.89||DGND||DGND||||||G||||
|-
| J1.91||EMAC_REFCLK||CPU.EMAC_RMREFCLK/TIM2_IO/GP1[10]||J27||||I/O||||
|-
| J1.93||USB0_DRVVBUS||CPU.USB0_DRVVBUS/GP0[7]||AF11||||I/O||||
|-
| J1.95||USB1.VBUS||CPU.USB1_VBUSIN||AG14||||A, I||||
|-
| J1.97||HDMI_DP2||CPU.HDMI_DP2||AG21||||O||||
|-
| J1.99||HDMI_DN2||CPU.HDMI_DN2||AH21||||O||||
|-
| J1.101||HDMI_DP1||CPU.HDMI_DP1||AG20||||O||||
|-
| J1.103||HDMI_DN1||CPU.HDMI_DN1||AH20||||O||||
|-
| J1.105||HDMI_DP0||CPU.HDMI_DP0||AG19||||O||||
|-
| J1.107||HDMI_DN0||CPU.HDMI_DN0||AH19||||O||||
|-
| J1.109||HDMI_CLKP||CPU.HDMI_CLKP||AG18||||O||||
|-
| J1.111||HDMI_CLKN||CPU.HDMI_CLKN||AH18||||O||||
|-
| J1.113||DGND||DGND||||||G||||
|-
| J1.115||TIM5_IO/GP0_19||CPU.MCA[3]_AXR[1]/TSI[0]_PACVAL/TIM5_IO/GP0[19]||G2||||I/O||||
|-
| J1.117||VIN1A_HSYNC/GP2_28||CPU.VOUT[1]_CLK/EMAC[1]_MTCLK/VIN[1]A_HSYNC/PATA_HDDIR/GP2[28]||AE24||||I/O||||
|-
| J1.119||SD1_DAT0||CPU.SD1_DAT[0]||P1||||I/O||||
|-
| J1.121||SD1_DAT1||CPU.SD1_DAT[1]_SDIRQn||P5||||I/O||||
|-
| J1.123||SD1_DAT2||CPU.SD1_DAT[2]_SDRWn||P4||||I/O||||
|-
| J1.125||SD1_DAT3||CPU.SD1_DAT[3]||P6||||I/O||||
|-
| J1.127||SD1_DAT4||CPU.SD0_DAT[0]/SD1_DAT[4]/SC1_DATA/GP0[3]||R7||||I/O||||
|-
| J1.129||SD1_DAT5||CPU.SD0_DAT[1]_SDIRQn/SD1_DAT[5]/SC1_CLK/GP0[4]||Y5||||I/O||||
|-
| J1.131||TV_OUT1||CPU.TV_OUT0||AH24||||O||||
|-
| J1.133||TV_OUT2||CPU.TV_OUT1||AH22||||O||||
|-
| J1.135||SD1_CMD||CPU.SD1_CMD/GP0[0]||P2||||I/O||||
|-
| J1.137||SD1_CLK||CPU.SD1_CLK||P3||||O||||
|-
| J1.139||DGND||DGND||-||||G||||
|-
|
|}
==J1 even pins (2 to 140)==
==J2 odd pins (1 to 139)==
==J2 odd pins (1 to 139)==
==Legend and additional notes==
(1) Some pins provide multiple routing options. This means that
