Difference between revisions of "NaonEVB-Mid"
DevWikiAdmin (talk | contribs) |
|||
| (15 intermediate revisions by 2 users not shown) | |||
| Line 5: | Line 5: | ||
===Introduction=== | ===Introduction=== | ||
| − | NaonEVB-Mid is a carrier board designed to evaluate the functionalities of [[Naon | + | NaonEVB-Mid is a carrier board designed to evaluate the functionalities of [[:Category:Naon|NAON]]. |
| − | The following picture shows block diagram of NaonEVB- | + | |
| + | [[File:Naonevb-mid-dvi-01.png|600px|frameless|border]] | ||
| + | |||
| + | |||
| + | The following picture shows block diagram of NaonEVB-Mid board. | ||
[[File:Naonevb-mid-block diagram.png|thumbnail|center|300px|NaonEVB-Mid block diagram]] | [[File:Naonevb-mid-block diagram.png|thumbnail|center|300px|NaonEVB-Mid block diagram]] | ||
| Line 19: | Line 23: | ||
This section describes how to quick start NaonEVB-Mid-based system, provided that it is programmed according to NELK configuration. | This section describes how to quick start NaonEVB-Mid-based system, provided that it is programmed according to NELK configuration. | ||
| − | # connect the serial cable | + | # connect the serial cable provided with the board to J17 connector |
# connect this cable to PC COM port through a NULL-modem cable (not provided) | # connect this cable to PC COM port through a NULL-modem cable (not provided) | ||
# start your favourite terminal software on PC; communication parameters are: | # start your favourite terminal software on PC; communication parameters are: | ||
| Line 35: | Line 39: | ||
<pre class="board-terminal"> | <pre class="board-terminal"> | ||
| − | U-Boot 2010.06- | + | U-Boot 2010.06-00011-gd371eb4 (Apr 22 2013 - 12:17:17) [nelk-4.0.0-Naon-min] |
TI8148-GP rev 2.1 | TI8148-GP rev 2.1 | ||
| Line 41: | Line 45: | ||
ARM clk: 600MHz | ARM clk: 600MHz | ||
DDR clk: 400MHz | DDR clk: 400MHz | ||
| + | L3 clk: 200MHz | ||
| + | DSS clk: 200MHz | ||
| + | IVA clk: 266MHz | ||
| + | ISS clk: 400MHz | ||
| + | DSP clk: 500MHz | ||
DRAM: 512 MiB | DRAM: 512 MiB | ||
| Line 50: | Line 59: | ||
| − | U-Boot 2010.06- | + | U-Boot 2010.06-00011-gd371eb4 (Apr 22 2013 - 12:17:53) [nelk-4.0.0-Naon] |
TI8148-GP rev 2.1 | TI8148-GP rev 2.1 | ||
| Line 56: | Line 65: | ||
ARM clk: 600MHz | ARM clk: 600MHz | ||
DDR clk: 400MHz | DDR clk: 400MHz | ||
| + | L3 clk: 200MHz | ||
| + | DSS clk: 200MHz | ||
| + | IVA clk: 266MHz | ||
| + | ISS clk: 400MHz | ||
| + | DSP clk: 500MHz | ||
I2C: ready | I2C: ready | ||
DRAM: 512 MiB | DRAM: 512 MiB | ||
| − | NAND: | + | NAND: HW ECC BCH8 Selected |
| − | HW ECC BCH8 Selected | ||
1024 MiB | 1024 MiB | ||
MMC: OMAP SD/MMC: 0 | MMC: OMAP SD/MMC: 0 | ||
| − | Net: Detected MACID: | + | MUX: configuring for evb_mid |
| + | Net: Detected MACID:00:50:C2:1E:AF:E3 | ||
cpsw | cpsw | ||
| − | |||
NAON# | NAON# | ||
</pre> | </pre> | ||
| Line 77: | Line 90: | ||
<pre class="board-terminal"> | <pre class="board-terminal"> | ||
bootdelay=3 | bootdelay=3 | ||
| + | baudrate=115200 | ||
autoload=yes | autoload=yes | ||
verify=yes | verify=yes | ||
| + | bootfile=naon/uImage | ||
ramdisk_file=ramdisk.gz | ramdisk_file=ramdisk.gz | ||
| − | spi_updatek=sf probe 0:0; sf erase 0x80000 | + | loadaddr=0x81000000 |
| + | spi_load_1st=tftp ${loadaddr} naon/MLO | ||
| + | nand_load_1st=mw.b ${loadaddr} 0xFF 0x20000; tftp ${loadaddr} naon/MLO | ||
| + | spi_update_1st=sf probe 0:0; sf erase 0x0 0x20000; sf write ${loadaddr} 0x0 0x20000 | ||
| + | nand_update_1st=nand erase 0x0 0x20000; nandecc hw 2; nand write.i ${loadaddr} 0x0 0x20000 | ||
| + | load=mw.b ${loadaddr} 0xFF 0x40000; tftp ${loadaddr} naon/u-boot.bin | ||
| + | spi_update=sf probe 0:0; sf erase 0x20000 0x40000; sf write ${loadaddr} 0x20000 0x40000 | ||
| + | nand_update=nand erase 0x20000 0x40000; nandecc hw 2; nand write.i ${loadaddr} 0x20000 0x40000 | ||
| + | loadk=mw.b ${loadaddr} 0xFF 0x400000; tftp ${loadaddr} ${bootfile} | ||
| + | spi_updatek=sf probe 0:0; sf erase 0x80000 0x400000; sf write ${loadaddr} 0x80000 0x400000 | ||
| + | nand_updatek=nand erase 0xA0000 0x400000; nandecc hw 2; nand write.i ${loadaddr} 0xA0000 0x400000 | ||
| + | console=ttyO0 | ||
| + | addcons=setenv bootargs ${bootargs} console=${console},115200n8 earlyprintk | ||
| + | addmem=setenv bootargs ${bootargs} mem=${mem} vram=${vram} notifyk.vpssm3_sva=${notify_mem} | ||
| + | addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gateway}:${netmask}:${hostname}:${ethdev} | ||
| + | nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} panic=5 rootdelay=5 | ||
| + | net_nfs=run loadk nfsargs addip addcons addmem; bootm ${buf} | ||
nandargs=setenv bootargs root=/dev/mtdblock12 rw rootfstype=jffs2 | nandargs=setenv bootargs root=/dev/mtdblock12 rw rootfstype=jffs2 | ||
| − | spi_nand=run nandargs addip addcons addmem; sf probe 0:0; sf read ${loadaddr} 0x80000 | + | spi_nand=run nandargs addip addcons addmem; sf probe 0:0; sf read ${loadaddr} 0x80000 0x400000; bootm ${loadaddr} |
| + | nand_nand=run nandargs addip addcons addmem; nandecc hw 2; nand read ${loadaddr} 0xA0000 0x400000; bootm $(loadaddr} | ||
mmcargs=setenv bootargs root=/dev/mmcblk0p1 rw | mmcargs=setenv bootargs root=/dev/mmcblk0p1 rw | ||
| − | spi_mmc=run mmcargs addip addcons addmem; sf probe 0:0; sf read ${loadaddr} 0x80000 | + | spi_mmc=run mmcargs addip addcons addmem; sf probe 0:0; sf read ${loadaddr} 0x80000 0x400000; bootm ${loadaddr} |
| − | + | ipaddr=192.168.0.77 | |
| − | + | serverip=192.168.0.23 | |
| − | + | netmask=255.255.255.0 | |
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
gateway=192.168.0.254 | gateway=192.168.0.254 | ||
hostname=naon | hostname=naon | ||
| − | + | rootpath=/home/shared/devel/dave/naon-DAA/sw/linux/sdk/rfs/nelk | |
| − | + | ethdev=eth1 | |
| − | |||
| − | |||
mem=176M | mem=176M | ||
vram=46M | vram=46M | ||
notify_mem=0xBF900000 | notify_mem=0xBF900000 | ||
| − | + | ethaddr=00:17:EB:52:6A:8A | |
| − | + | ethact=cpsw | |
| − | + | naon_host=evb_mid | |
| − | |||
| − | cpsw | ||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
stdin=serial | stdin=serial | ||
stdout=serial | stdout=serial | ||
stderr=serial | stderr=serial | ||
| − | |||
| − | |||
</pre> | </pre> | ||
| − | If you have the SD/MMC provided with the development kit, you can run the following command: | + | ==== Booting from SD/MMC ==== |
| + | |||
| + | If you have the bootable SD/MMC provided with the development kit and it contains the boot.scr script file, the following command is automatically executed by U-Boot: | ||
| + | |||
| + | <pre class="board-terminal"> | ||
| + | echo trying to boot from NELK MMC; mmc rescan 0; fatload mmc 0 80900000 boot.scr; source 80900000; run net_nfs | ||
| + | </pre> | ||
| + | |||
| + | If the boot.scr script file is not available, you can manually boot the system from SD using the following commands: | ||
| + | |||
| + | <pre class="board-terminal"> | ||
| + | mmc rescan 0 | ||
| + | fatload mmc 0 81000000 uImage | ||
| + | setenv mmcargs 'setenv bootargs root=/dev/mmcblk0p2 rw' | ||
| + | run mmcargs addip addcons addmem | ||
| + | bootm 81000000 | ||
| + | </pre> | ||
| + | |||
| + | |||
| + | If a Linux kernel image has been preliminary programmed on the SPI NOR flash, you can run the following command: | ||
<pre class="board-terminal"> | <pre class="board-terminal"> | ||
| Line 134: | Line 163: | ||
To start Linux (from on-board SPI NOR flash) and mount the development root file system (over SD/MMC). | To start Linux (from on-board SPI NOR flash) and mount the development root file system (over SD/MMC). | ||
| − | If you have installed the [[:Category:DVDK| | + | ==== Booting from network ==== |
| + | |||
| + | If you have installed the [[:Category:DVDK|'''DAVE Embedded Systems''' Virtual Development Kit]], you can start the Virtual Machine and start Linux loading the kernel through tftp and mounting the NFS root file system with the following command: | ||
<pre class="board-terminal"> | <pre class="board-terminal"> | ||
| Line 146: | Line 177: | ||
====Bootstrap settings==== | ====Bootstrap settings==== | ||
| − | + | Please refer to [[Bootstrap settings (NaonEVB-Mid)]] | |
====JTAG interfaces==== | ====JTAG interfaces==== | ||
| Line 154: | Line 185: | ||
====Video interfaces==== | ====Video interfaces==== | ||
NaonEVB-Mid provides a rich set of video input/output interfaces. Please refer to [[Video input/output interfaces (NaonEVB-Mid)|this page]] for more details. | NaonEVB-Mid provides a rich set of video input/output interfaces. Please refer to [[Video input/output interfaces (NaonEVB-Mid)|this page]] for more details. | ||
| − | + | ==Schematics== | |
{{ImportantMessage|text=Please note that Orcad CIS is required to get all the information about BOM variants included in .dsn files. | {{ImportantMessage|text=Please note that Orcad CIS is required to get all the information about BOM variants included in .dsn files. | ||
PDF files show the view of the default BOM variant used to manufacture the board. Components that are not populated are denoted as "Do Not Stuff".}} | PDF files show the view of the default BOM variant used to manufacture the board. Components that are not populated are denoted as "Do Not Stuff".}} | ||
| − | * Orcad: http://www.dave.eu/ | + | * Orcad: http://www.dave.eu/system/files/area-riservata/naonevb-mid-1.0.6.zip |
| − | * PDF: http://www.dave.eu/ | + | * PDF: http://www.dave.eu/system/files/area-riservata/naonevb-mid-NADP_S-NADP0000C0R_1.0.6.pdf |
| + | |||
| + | == PinMux == | ||
| + | |||
| + | * File .dat for the [http://www.ti.com/tool/pinmuxtool PinMux utility] containing the cpu pin configuration for the NaonEVB-Mid carrier board : http://www.dave.eu/system/files/area-riservata/naon-evbs-pinmux.zip | ||
| + | |||
==BOM== | ==BOM== | ||
| − | * http://www.dave.eu/ | + | * http://www.dave.eu/system/files/area-riservata/naonevb-mid-BOM_S.NADP0000C0R.1.0.6.zip |
==Layout== | ==Layout== | ||
| − | * http://www.dave.eu/ | + | * http://www.dave.eu/system/files/area-riservata/naonevb-mid-CS064311A_component_view.pdf |
==Mechanical== | ==Mechanical== | ||
| − | * DXF: http://www.dave.eu/ | + | * DXF: http://www.dave.eu/system/files/area-riservata/naonevb-mid-CS064311A.zip |
| − | * IDF (3D): http://www.dave.eu/ | + | * IDF (3D): http://www.dave.eu/system/files/area-riservata/naonevb-mid-CS064311-3D.zip |
Latest revision as of 14:20, 16 November 2016
| HOME | SOMs | SBCs | ToloMEO Embedded Assistant |  GET A QUOTE
|
 ONLINE HELPDESK
|
| Roadmap | IoT Services | ML/AI services | Embedded Design Services |
Info Box
|
Contents
Introduction[edit | edit source]
NaonEVB-Mid is a carrier board designed to evaluate the functionalities of NAON.
The following picture shows block diagram of NaonEVB-Mid board.
The following images show top and bottom side of NaonEVB-Mid carrier board respectively. Peripherals and interfaces external to Naon SOM are highlighted.
Quick start (NELK)[edit | edit source]
This section describes how to quick start NaonEVB-Mid-based system, provided that it is programmed according to NELK configuration.
- connect the serial cable provided with the board to J17 connector
- connect this cable to PC COM port through a NULL-modem cable (not provided)
- start your favourite terminal software on PC; communication parameters are:
- baud rate: 115200 Bps
- data bits: 8
- stop bits: 1
- parity: none
- (optional) to connect the system to Ethernet LAN, please plug cable on connector J11
- (optional) to connect the system to HDMI TV/LCD, please plug cable on connector J6
- connect a 12Vcc power supply to J14 as shown in the following picture:
Once power has been applied, U-Boot bootloader will be executed and the following messages will be printed on serial console (please note that messages may vary due different U-Boot releases):
U-Boot 2010.06-00011-gd371eb4 (Apr 22 2013 - 12:17:17) [nelk-4.0.0-Naon-min] TI8148-GP rev 2.1 ARM clk: 600MHz DDR clk: 400MHz L3 clk: 200MHz DSS clk: 200MHz IVA clk: 266MHz ISS clk: 400MHz DSP clk: 500MHz DRAM: 512 MiB Using default environment Hit any key to stop autoboot: 0 8192 KiB AT45DB642D at 0:0 is now current device ## Starting application at 0x81000000 ... U-Boot 2010.06-00011-gd371eb4 (Apr 22 2013 - 12:17:53) [nelk-4.0.0-Naon] TI8148-GP rev 2.1 ARM clk: 600MHz DDR clk: 400MHz L3 clk: 200MHz DSS clk: 200MHz IVA clk: 266MHz ISS clk: 400MHz DSP clk: 500MHz I2C: ready DRAM: 512 MiB NAND: HW ECC BCH8 Selected 1024 MiB MMC: OMAP SD/MMC: 0 MUX: configuring for evb_mid Net: Detected MACID:00:50:C2:1E:AF:E3 cpsw NAON#
These messages are printed by U-Boot, which has a serial console that allow basic interaction with the system. Please find more information in the U-Boot category page.
At the end of its boot sequence, U-Boot prints NAON# prompt and waits for user commands.
The default u-boot environment can be printed using the print command:
bootdelay=3
baudrate=115200
autoload=yes
verify=yes
bootfile=naon/uImage
ramdisk_file=ramdisk.gz
loadaddr=0x81000000
spi_load_1st=tftp ${loadaddr} naon/MLO
nand_load_1st=mw.b ${loadaddr} 0xFF 0x20000; tftp ${loadaddr} naon/MLO
spi_update_1st=sf probe 0:0; sf erase 0x0 0x20000; sf write ${loadaddr} 0x0 0x20000
nand_update_1st=nand erase 0x0 0x20000; nandecc hw 2; nand write.i ${loadaddr} 0x0 0x20000
load=mw.b ${loadaddr} 0xFF 0x40000; tftp ${loadaddr} naon/u-boot.bin
spi_update=sf probe 0:0; sf erase 0x20000 0x40000; sf write ${loadaddr} 0x20000 0x40000
nand_update=nand erase 0x20000 0x40000; nandecc hw 2; nand write.i ${loadaddr} 0x20000 0x40000
loadk=mw.b ${loadaddr} 0xFF 0x400000; tftp ${loadaddr} ${bootfile}
spi_updatek=sf probe 0:0; sf erase 0x80000 0x400000; sf write ${loadaddr} 0x80000 0x400000
nand_updatek=nand erase 0xA0000 0x400000; nandecc hw 2; nand write.i ${loadaddr} 0xA0000 0x400000
console=ttyO0
addcons=setenv bootargs ${bootargs} console=${console},115200n8 earlyprintk
addmem=setenv bootargs ${bootargs} mem=${mem} vram=${vram} notifyk.vpssm3_sva=${notify_mem}
addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gateway}:${netmask}:${hostname}:${ethdev}
nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} panic=5 rootdelay=5
net_nfs=run loadk nfsargs addip addcons addmem; bootm ${buf}
nandargs=setenv bootargs root=/dev/mtdblock12 rw rootfstype=jffs2
spi_nand=run nandargs addip addcons addmem; sf probe 0:0; sf read ${loadaddr} 0x80000 0x400000; bootm ${loadaddr}
nand_nand=run nandargs addip addcons addmem; nandecc hw 2; nand read ${loadaddr} 0xA0000 0x400000; bootm $(loadaddr}
mmcargs=setenv bootargs root=/dev/mmcblk0p1 rw
spi_mmc=run mmcargs addip addcons addmem; sf probe 0:0; sf read ${loadaddr} 0x80000 0x400000; bootm ${loadaddr}
ipaddr=192.168.0.77
serverip=192.168.0.23
netmask=255.255.255.0
gateway=192.168.0.254
hostname=naon
rootpath=/home/shared/devel/dave/naon-DAA/sw/linux/sdk/rfs/nelk
ethdev=eth1
mem=176M
vram=46M
notify_mem=0xBF900000
ethaddr=00:17:EB:52:6A:8A
ethact=cpsw
naon_host=evb_mid
stdin=serial
stdout=serial
stderr=serial
Booting from SD/MMC[edit | edit source]
If you have the bootable SD/MMC provided with the development kit and it contains the boot.scr script file, the following command is automatically executed by U-Boot:
echo trying to boot from NELK MMC; mmc rescan 0; fatload mmc 0 80900000 boot.scr; source 80900000; run net_nfs
If the boot.scr script file is not available, you can manually boot the system from SD using the following commands:
mmc rescan 0 fatload mmc 0 81000000 uImage setenv mmcargs 'setenv bootargs root=/dev/mmcblk0p2 rw' run mmcargs addip addcons addmem bootm 81000000
If a Linux kernel image has been preliminary programmed on the SPI NOR flash, you can run the following command:
run spi_mmc
To start Linux (from on-board SPI NOR flash) and mount the development root file system (over SD/MMC).
Booting from network[edit | edit source]
If you have installed the DAVE Embedded Systems Virtual Development Kit, you can start the Virtual Machine and start Linux loading the kernel through tftp and mounting the NFS root file system with the following command:
run net_nfs
Please note that you need to modify some u-boot environment variables before running the net_nfs configuration. For further information, please refer to Configuration net_nfs.
Hardware information[edit | edit source]
Bootstrap settings[edit | edit source]
Please refer to Bootstrap settings (NaonEVB-Mid)
JTAG interfaces[edit | edit source]
Please refer to JTAG interfaces (NaonEVB-Mid).
Video interfaces[edit | edit source]
NaonEVB-Mid provides a rich set of video input/output interfaces. Please refer to this page for more details.
Schematics[edit | edit source]
 Please note that Orcad CIS is required to get all the information about BOM variants included in .dsn files. PDF files show the view of the default BOM variant used to manufacture the board. Components that are not populated are denoted as "Do Not Stuff". |
- Orcad: http://www.dave.eu/system/files/area-riservata/naonevb-mid-1.0.6.zip
- PDF: http://www.dave.eu/system/files/area-riservata/naonevb-mid-NADP_S-NADP0000C0R_1.0.6.pdf
PinMux[edit | edit source]
- File .dat for the PinMux utility containing the cpu pin configuration for the NaonEVB-Mid carrier board : http://www.dave.eu/system/files/area-riservata/naon-evbs-pinmux.zip
