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===Overview===
DM8148 processor provides a rich video subsystem that integrates several input ports. These are described in detail on chapter 12 of [http://www.ti.com/litv/pdf/sprugz8a| Technical Reference Manual].
There are three video inputs:
* VIN0(in turn splittable in two subports)* VIN1(in turn splittable in two subports)
* camera parallel interface (CPI).
From the architectural standpoint , VIN0 and VIN1 ports belong to the HDVPSS subsytems. For the sake of completeness a simplified block diagram of it is shown below.
[[File:Dm8148-hdvpss-bd.png|thumbnail|center]]