Template:Power sequence

History
Issue Date	Notes
Year/Month/Day	TBD

Power Supply Unit (PSU) and recommended power-up sequence

Implementing correct power-up sequence for TBD: SOC ' processors is not a trivial task because several power rails are involved.

{{{nome-som}}} SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:

[[File:{{{nome-som}}}-power-sequence.png | 800px]]

The PSU is composed of two main blocks:

• power management integrated circuit
• additional generic power management circuitry that completes PMIC functionalities

The PSU:

• generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals
• synchronizes the powering up of carrier board in order to prevent back power
• provides some spare regulated voltages that can be used to power carrier board devices

Power-up sequence

TBD: descrizione dei segnali che intervengono nella PS

Note on BOARD_PGOOD usage

TBD: verificare le note sul BOARD_PGOOD

BOARD_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals.

Depending on the kind of such loads, BOARD_PGOOD might not be able to drive them properly. In these cases a simple 2-input AND port can be used to address this issue. The following picture depicts a principle schematic showing this solution.

VDD_SOM denotes the power rail used to power {{{nome-som}}} SoM.

[[File:{{{nome-som}}}-power-good.png]]

[[Category:{{{nome-som}}}]]