View source for TI DM8148 EZSDK software organization

===Introduction===
DM8148 digital media processor implements a multi-processor architecture. As such, software architecture is quite complex with respect to the typical single-processor embedded linux system. 

The following picture shows a simplified block diagram of this software architecture.
[[File:Dm8148-ezsdk-sw-arch.png|thumbnail|center|DM8148 simplified software architecture (EZSDK)]]

Three different software domains are visible (*):
# the first one runs on the ARM Cortex-A8 processor; this is a usual embedded linux system
# the second one runs on two ARM Cortex-M3 processors, called Media controllers according to Texas Instruments nomenclature; this is based on SYS/BIOS RTOS (http://processors.wiki.ti.com/index.php/Category:SYSBIOS)
# the third one runs on DSP; no default implementation is provided.
ARM Cortex-A8 is the main processor that drives - for example - the boot process of the entire chip. From the initialization standpoint, media controllers and DSP are slave with respect to Cortex-A8. This means that media controllers' and DSP's firmwares need to be loaded by Cortex-A8.

A fundamental role is played by memory layout definition. For more details please refer to [[Memory_organization_%28Naon%29#RAM_Memory_Map]].

(*) Actually a fourth domain - running on the two ARM9s integrated in codec block - exists. Since this piece of software is not accessible at all, this block needs to be considered as a hardware black box.
====SysLink====
SysLink can be considered as a sort of "glue logic" that allows all these different processors to communicate each other. More information about SysLink can be found here: http://processors.wiki.ti.com/index.php/Category:SysLink.