Difference between revisions of "SDV04"

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(LVDS - J20)
Line 53: Line 53:
  
 
J1 is a TE Connectivity 204-pin SODIMM socket. The pinout matches the [[Pinout_(AxelLite) | Axel Lite pinout]] and the [[Pinout_(AXEL_ULite) | Axel ULite pinout]].
 
J1 is a TE Connectivity 204-pin SODIMM socket. The pinout matches the [[Pinout_(AxelLite) | Axel Lite pinout]] and the [[Pinout_(AXEL_ULite) | Axel ULite pinout]].
 
  
 
=== J6 - JTAG ===
 
=== J6 - JTAG ===
Line 85: Line 84:
 
|-
 
|-
 
|10 || JTAG_VREF || - || -
 
|10 || JTAG_VREF || - || -
 +
|-
 +
|}
 +
 +
=== MicroSD - J13 ===
 +
 +
J13 is a microSD memory card connector. It can be used as a <b>boot device</b> properly configuring the J18 pin header connector.
 +
 +
The following table reports the connector's pinout:
 +
 +
{| class="wikitable"
 +
|-
 +
!Pin#
 +
!Pin name
 +
!Function
 +
!Notes
 +
|-
 +
|1 ||SD1_DAT2||| DATA[2] || -
 +
|-
 +
|2 ||SD1_DAT3||| Card Detect/DATA[3] || -
 +
|-
 +
|3 ||SD1_CMD||| CMD line || -
 +
|-
 +
|4 ||VDD||| 3.3V Power Supply || -
 +
|-
 +
|5 ||SD1_CLK||| Clock || -
 +
|-
 +
|6, 9, 10, 11, 12 ||DGND||| - || -
 +
|-
 +
|7 ||SD1_DAT0||| DATA[0] || -
 +
|-
 +
|8 ||SD1_DAT1||| DATA[1] || -
 +
|-
 +
|13 ||SD1_CD|| Card detect || -
 
|-
 
|-
 
|}
 
|}
Line 161: Line 193:
 
|}
 
|}
  
=== LVDS - J20 ===
+
=== LVDS - J20 - (for Axel ULite SOM)===
  
 
J20 is a 10x2 DF13A-20DP header. The following table reports the connector's pinout:
 
J20 is a 10x2 DF13A-20DP header. The following table reports the connector's pinout:
Line 204: Line 236:
 
|}
 
|}
  
=== MicroSD - J13 ===
+
=== LVDS0/LVDS1 - J21 - (for AxelLite SOM)===
 
 
J13 is a microSD memory card connector. It can be used as a <b>boot device</b> properly configuring the J18 pin header connector.
 
  
The following table reports the connector's pinout:
+
J21 is a 20x2 DF13E-40DP header. The following table reports the connector's pinout:
  
 
{| class="wikitable"  
 
{| class="wikitable"  
Line 217: Line 247:
 
!Notes
 
!Notes
 
|-
 
|-
|1 ||SD1_DAT2||| DATA[2] || -
+
|1, 3 ||3.3V_LCD || +3.3V || -
 +
|-
 +
|5, 6, 11, 12, 17<br>23, 26, 29, 32, 35 ||DGND || Ground || -
 +
|-
 +
|14, 16, 18 || 5V_LCD || +5V LCD Backlight || -
 +
|-
 +
|20, 22, 24 || 12V_LCD || +12V LCD Backlight || -
 +
|-
 +
|2 || LVDS0_TX1_N || TX1- (Odd) || -
 +
|-
 +
|4 || LVDS0_TX1_P || TX1+ (Odd) || -
 +
|-
 +
|7 || LVDS0_TX0_N || TX0- (Odd) || -
 +
|-
 +
|8 || LVDS0_TX3_N || TX3- (Odd) || -
 +
|-
 +
|9 || LVDS0_TX0_P|| TX0+ (Odd) || -
 +
|-
 +
|10 || LVDS0_TX3_P || TX3+ (Odd) || -
 +
|-
 +
|13 || LVDS0_TX2_N || TX2- (Odd) || -
 +
|-
 +
|15 || LVDS0_TX2_P || TX2+ (Odd) || -
 +
|-
 +
|19 || LVDS0_CLK_N || CLK- (Odd) || -
 +
|-
 +
|21 || LVDS0_CLK_P || CLK+ (Odd) || -
 +
|-
 +
|25 || LVDS1_TX0_N || TX0- (Even) || -
 +
|-
 +
|27 || LVDS1_TX0_P || TX0+ (Even) || -
 +
|-
 +
|28 || LVDS1_TX1_N || TX1- (Even) || -
 +
|-
 +
|30 || LVDS1_TX1_P || TX1+ (even) || -
 
|-
 
|-
|2 ||SD1_DAT3||| Card Detect/DATA[3] || -
+
|31 || LVDS1_TX2_N || TX2- (Even) || -
 
|-
 
|-
|3 ||SD1_CMD||| CMD line || -
+
|33 || LVDS1_TX2_P || TX2+ (even) || -
 
|-
 
|-
|4 ||VDD||| 3.3V Power Supply || -
+
|34 || LVDS1_CLK_N || CLK- (Even) || -
 
|-
 
|-
|5 ||SD1_CLK||| Clock || -
+
|36 || LVDS1_CLK_P || CLK+ (Even) || -
 
|-
 
|-
|6, 9, 10, 11, 12 ||DGND||| - || -
+
|37 || LVDS1_TX3_N || TX3- (Even) || -
 
|-
 
|-
|7 ||SD1_DAT0||| DATA[0] || -
+
|38 || BL PWM || Backlight PWM control || -
 
|-
 
|-
|8 ||SD1_DAT1||| DATA[1] || -
+
|39 || LVDS1_TX3_P || TX3+ (even) || -
 
|-
 
|-
|13 ||SD1_CD|| Card detect || -
+
|40 || BL EN || Backligth Enable || -
 
|-
 
|-
 
|}
 
|}

Revision as of 12:40, 24 September 2018

Info Box
SDVX.png Applies to SDVX

Introduction[edit | edit source]

SDV04.png

SDV04 is a carrier board designed to host directly AXEL ULITE and AXEL LITE SoMs. It exports major specific peripherals connectors for each SoMs.

Block Diagram[edit | edit source]

The following picture shows SDV04's block diagram:

Connection layout[edit | edit source]

The following picture shows SDV04's connection layout:

SFCZG-connectors.png

Features[edit | edit source]

  • 10/100 Ethernet
  • 1x USB HOST, 1x USB OTG
  • Serial port (RS232)
  • Single/Dual channel LVDS connector - for AxelLite SOM
  • Single channel LVDS connector - for AxelUlite SOM
  • I2C touch connector
  • Audio connector with internal power amplifier
  • Pin strip expansion connectors for GPIOs

Connectors pinout[edit | edit source]

J16 - PSU[edit | edit source]

J16 is a Molex 26-60-4020 2x1-pn 3.56mm pitch connector. The following table reports the connector's pinout:

Pin# Pin name Function Notes
1 DGND Ground -
2 EXT_12V 12V Power Supply -

J1 - SODIMM connector[edit | edit source]

J1 is a TE Connectivity 204-pin SODIMM socket. The pinout matches the Axel Lite pinout and the Axel ULite pinout.

J6 - JTAG[edit | edit source]

J6 is a SAMTEC FSI-110-03-G-S connector. The following table reports the connector's pinout:

Pin# Pin name Function Notes
1 DGND - -
2 JTAG_TCK - -
3 JTAG_TMS - -
4 JTAG_TDO - -
5 JTAG_TDI - -
6 JTAG_nTRST - -
7 CPU_PORn - -
8 N.C. - -
9 N.C. - -
10 JTAG_VREF - -

MicroSD - J13[edit | edit source]

J13 is a microSD memory card connector. It can be used as a boot device properly configuring the J18 pin header connector.

The following table reports the connector's pinout:

Pin# Pin name Function Notes
1 SD1_DAT2 DATA[2] -
2 SD1_DAT3 Card Detect/DATA[3] -
3 SD1_CMD CMD line -
4 VDD 3.3V Power Supply -
5 SD1_CLK Clock -
6, 9, 10, 11, 12 DGND - -
7 SD1_DAT0 DATA[0] -
8 SD1_DAT1 DATA[1] -
13 SD1_CD Card detect -

USB HOST - J11[edit | edit source]

J11 is a standard USB Type A Vertical Female host connector.

The following table reports the connector's pinout:

Pin# Pin name Function Notes
1 5V VDD -
2 USB_DN USB Data- -
3 USB_DP USB Data+ -
4 DGND Ground -

USB OTG - J12[edit | edit source]

J12 is a Molex 53398-0471 4 pin connector. It can be used both as Host or OTG connector depending on internal USB_OTG_ID signal connection

The following table reports the connector's pinout:

Pin# Pin name Function Notes
1 5V VDD -
2 USB_OTG_DN USB OTG Data- -
3 USB_OTG_DP USB OTG Data+ -
4 DGND Ground -

TOUCH - J5[edit | edit source]

J5 is Molex 53398-0671 6 pin connector. It can be used to interface a CPT Capacitive touchscreen device integrated into a standard LCD panel.

The following table reports the connector's pinout:

Pin# Pin name Function Notes
1 VDD 5V or 3V3 depending on internal connection -
2 SDA I2C SDA -
3 SCL I2C SCL -
4 INT Interrupt -
5 RES Reset -
6 DGND Ground -

LVDS - J20 - (for Axel ULite SOM)[edit | edit source]

J20 is a 10x2 DF13A-20DP header. The following table reports the connector's pinout:

Pin# Pin name Function Notes
1, 2 3.3V_LCD0 +3.3V -
4, 7, 10,
13, 16
DGND Ground -
3 GPIO VDD or GND (internal mount) -
5 LVDS_TX0_N TX0- -
6 LVDS_TX0_P TX0+ -
9 LVDS_TX1_P TX1+ -
8 LVDS_TX1_N TX1- -
11 LVDS_TX2_N TX2- -
12 LVDS_TX2_P TX2+ -
14 LVDS_CLK_N Clock- -
15 LVDS_CLK_P Clock+ -
17 BL PWM Backlight PWM control -
18 5V LCD Backlight 5V power supply - -
19 GPIO VDD or GND (internal mount) -
20 BL EN Backligth Enable -

LVDS0/LVDS1 - J21 - (for AxelLite SOM)[edit | edit source]

J21 is a 20x2 DF13E-40DP header. The following table reports the connector's pinout:

Pin# Pin name Function Notes
1, 3 3.3V_LCD +3.3V -
5, 6, 11, 12, 17
23, 26, 29, 32, 35
DGND Ground -
14, 16, 18 5V_LCD +5V LCD Backlight -
20, 22, 24 12V_LCD +12V LCD Backlight -
2 LVDS0_TX1_N TX1- (Odd) -
4 LVDS0_TX1_P TX1+ (Odd) -
7 LVDS0_TX0_N TX0- (Odd) -
8 LVDS0_TX3_N TX3- (Odd) -
9 LVDS0_TX0_P TX0+ (Odd) -
10 LVDS0_TX3_P TX3+ (Odd) -
13 LVDS0_TX2_N TX2- (Odd) -
15 LVDS0_TX2_P TX2+ (Odd) -
19 LVDS0_CLK_N CLK- (Odd) -
21 LVDS0_CLK_P CLK+ (Odd) -
25 LVDS1_TX0_N TX0- (Even) -
27 LVDS1_TX0_P TX0+ (Even) -
28 LVDS1_TX1_N TX1- (Even) -
30 LVDS1_TX1_P TX1+ (even) -
31 LVDS1_TX2_N TX2- (Even) -
33 LVDS1_TX2_P TX2+ (even) -
34 LVDS1_CLK_N CLK- (Even) -
36 LVDS1_CLK_P CLK+ (Even) -
37 LVDS1_TX3_N TX3- (Even) -
38 BL PWM Backlight PWM control -
39 LVDS1_TX3_P TX3+ (even) -
40 BL EN Backligth Enable -

Audio - J14[edit | edit source]

J14 is a 53375-0610 Molex 6x2.5mm pin connector.

The following table reports the connector's pinout:

Pin# Pin name Function Notes
1 HSOL Left channel Headphone/line output -
2 HSOR Right channel Headphone/line output -
3 SPKP Speaker + output -
4 SPKM Speaker - output -
5 MIC IN Microphone input -
6 MIC BIAS Microphone bias -

JP1 pin strip connectors[edit | edit source]

JP1 is a 2x6-pin, 2.54mm pitch header, pinstrip connector. The following table reports the connector's pinout:

Pin# Pin name Function Notes
1 3.3V - -
2 DGND Ground -
3 GPIO_IN_0 -
4 GPIO_OUT_0 -
5 GPIO_IN_1 -
6 GPIO_OUT_1 -
7 GPIO_IN_2 -
8 GPIO_OUT_2 -
9 GPIO_IN_3 -
10 GPIO_OUT_3 -
11 GPIO_IN_4 -
12 GPIO_OUT_4 -