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{{AppliesToAxel}}
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{{AppliesToAxelEsattaAppliesToAXEL Lite TN}}{{AppliesToSBCX}}
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{{WarningMessage|text=This technical note was validated against specific versions of hardware and software. What is described here may not work with other versions.}}
!Axel Lite
|-
| rowspan="25" |SoC
|SoC
|NXP i.MX6Q
|-
|ARM core frequency
[MHz]
|996
|-
|L1 cache (D)
[kB]
|32
|-
|L1 cache (I)
[kB]
|32
|-
|L2 cache
[MB]
|1
|-
| rowspan="6" |SDRAM
|Frequency
[MHz]
|533(*)
|-
|Bus witdth
|2048
|}
(*) It is worth remembering that i.MX6DualLite/Solo could achieve better results in terms of memory bandwidth, even though their SDRAM bus frequency is lower (400 MHz). This is due to an errata of the ARM PL310 L2 cache controller. This bug is not present in the i.MX6DualLite/Solo SoC's, which integrate a newer version of the controller.
===Software configuration===
<pre class="board-terminal">
armbian@sbcx:~/devel/stream/lmbench$ gcc -v
gcc version 8.3.0 (Debian 8.3.0-6)
</pre>
==Overall results==
This section details illustrates the overall results that were achieved by the different benchmarks.
===STREAM===
{| class="wikitable"
|+
Overall results!Function!Best rate[MB/s]!Mito8MEfficiency [%]|-|Copy|1139.8!|14.0
|-
|Scale|ARM frequency[MHz]|7921124.8|13.8
|-
|Add|Frequency[MHz]|16001185.1|14.6
|-
|Triad|Bus witdth[bit]|321214.4|14.9
|}
As expected, the efficiency is relatively low. Generally, 32-bit ARM architectures are known to have mediocre performances when it comes to memory bandwidth.
Please see [https://www.cs.virginia.edu/stream/ this page] for more details about STREAM benchmark.
===LMbench===
===pmbw===
==Useful links==
*Joshua Wyatt Smith and Andrew Hamilton, [http://inspirehep.net/record/1424637/files/1719033_626-630.pdf Parallel benchmarks for ARM processors in the highenergy context]
*T Wrigley, G Harmsen and B Mellado, [http://inspirehep.net/record/1424631/files/1719033_275-280.pdf Memory performance of ARM processors and itsrelevance to High Energy Physics]
====Building====
To build STREAM:
* clone its git repository
*modify the <code>Makefile</code> as shown below
*issue the <code>make</code> command.
<pre class="board-terminal">
git clone https://github.com/jeffhammond/STREAM.git
===LMbench===
armbian@sbcx:~/devel/stream/STREAM$ sudo lmbench-run
=====================================================================
Remember you can find the results of the benchmark
under /var/lib/lmbench/results
</pre>
===pmbw===
====Building====
Building pmbw is straightforward. Please click on ''Expand'' to show the box that illustrates the procedure.
<pre class="board-terminal mw-collapsible mw-collapsed">
armbian@sbcx:~/devel/pmbw$ git clone https://github.com/bingmann/pmbw.git
Cloning into 'pmbw'...
mv -f .deps/stats2gnuplot.Tpo .deps/stats2gnuplot.Po
g++ -W -Wall -g -O2 -o stats2gnuplot stats2gnuplot.o -lpthread -lrt
</pre>
====Running the tests====
The benchmark was run as follows:<pre class="board-terminal">armbian@sbcx:~/devel/pmbw/pmbw$ sudo nice -n -2 ./pmbw -S 0Running benchmarks with no upper array size limit.Detected 1695 MiB physical RAM and 4 CPUs. Allocating 1024 MiB for testing.Running nthreads=1 factor=1073741824 areasize=1024 thrsize=ARM core clock 1024 testsize= 800 MHz1024 repeats=1048576 testvol=1073741824 testaccess=268435456run time =0.424801 -> rerunning test with repeat factor=3791455289Running nthreads=1 factor=3791455289 areasize=1024 thrsize=1024 testsize=ARM core clock = 1300 MHz=1024 repeats=3702594 testvol=3791456256 testaccess=947864064...</pre> To generate the charts plotting the results, the following command was issued:<pre class="board-terminal">./stats2gnuplot stats.txt | gnuplot</pre>
